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2021-08-23Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini
fsl-qoriq: Fixes related to env, spi, usb, crypto, configs, distro-boot for Layerscape Boards like lx2, sl28, ls2088ardb. powerpc: Fixes for t208xrdb revd board and cortina related configs update for T208xRDB, T4240RDB.
2021-08-23Merge tag 'for-v2021.10-rc3' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-i2c i2c changes for for-v2021.10-rc3 new driver: - Introduce mcp230xx support from Sebastian Reichel new feature: - i2c-gpio: add support for "sda-gpios" + "scl-gpios" i2c-gpio bindings. from Samuel Holland - bootcount: add a new driver with syscon as backend from Nandor Han
2021-08-22Merge branch '2021-08-21-assorted-changes'Tom Rini
2021-08-22bootcount: add a new driver with syscon as backendNandor Han
The driver will use a syscon regmap as backend and supports both 16 and 32 size value. The value will be stored in the CPU's endianness. Signed-off-by: Nandor Han <nandor.han@vaisala.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-22i2c: i2c-gpio: Support the named GPIO bindingSamuel Holland
To avoid confusion about the order of the GPIOs, the i2c-gpio binding was updated to use a separate property for each GPIO instead of an array. However, the driver only supports the old binding. Add support for the new binding as well, so the driver continues to work as device trees are updated. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-08-22gpio: mcp230xx: Introduce new driverSebastian Reichel
Introduce driver for I2C based MCP230xx GPIO chips, which are quite common and already well supported by the Linux kernel. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-22i2c: add dm_i2c_reg_clrsetSebastian Reichel
Add function to apply a bitmask to an i2c register, so that specific bits can be cleared and/or set. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-21display_options: Do not use %llu in print_sizeMatwey V. Kornilov
tiny-printf variant doesn't know how to handle %llu format string, but both tiny-printf and print_size can meet in SPL when TFTP is used to obtain main u-boot image. This is known to lead to critical boot issue at AM335x platform when printf is catched in infinite loop. To avoid such issues and make print_size function tiny-printf friendly, use %u instead of %luu. Note, that the size value is guaranteed to be less than 1024 in this conditional branch, so the cast to unsigned int is safe. Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-21tiny-printf: Handle %pM format when CONFIG_SPL_NET_SUPPORT is enabledMatwey V. Kornilov
%pM format string is used to print MAC-address and this is required while SPL network boot. This patch fixes the SPL boot issues like the following: Trying to boot from USB eth ## Error: flags type check failure for "ethaddr" <= "40309614M" (type: m) ## Error inserting "ethaddr" variable, errno=1 eth0: eth_cpsw## Error: flags type check failure for "eth1addr" <= "81f01114M" (type: m) ## Error inserting "eth1addr" variable, errno=1 , eth1: usb_ether eth_cpsw Waiting for PHY auto negotiation to complete......... TIMEOUT ! Problem booting with BOOTP SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ### Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-21Fix flashing of eMMC user area with FastbootOleh Kravchenko
'gpt' and 'mmc0' fastboot partitions have been treated as the same device, but it is wrong. Fill disk_partition structure with eMMC user partition info to properly flash data. Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Marek Vasut <marex@denx.de> Cc: Sean Anderson <sean.anderson@seco.com> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2021-08-21Fix flash and erase of eMMC Boot2 with FastbootOleh Kravchenko
The current U-Boot version has the next matches for boot partitions: > mmc0boot0 to EMMC_BOOT1 > mmc0boot1 to EMMC_BOOT1 (should be EMMC_BOOT2) This patch fixes a typo for the boot partition number. Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2021-08-21clk: clk_versaclock: Add support for versaclock driverAdam Ford
The driver is based on the Versaclock driver from the Linux code, but due differences in the clock API between them, some pieces had to be changed. This driver creates a mux, pfd, pll, and a series of fod ouputs. Rate Usecnt Name ------------------------------------------ 25000000 0 `-- x304-clock 25000000 0 `-- clock-controller@6a.mux 25000000 0 |-- clock-controller@6a.pfd 2800000000 0 | `-- clock-controller@6a.pll 33333333 0 | |-- clock-controller@6a.fod0 33333333 0 | | `-- clock-controller@6a.out1 33333333 0 | |-- clock-controller@6a.fod1 33333333 0 | | `-- clock-controller@6a.out2 50000000 0 | |-- clock-controller@6a.fod2 50000000 0 | | `-- clock-controller@6a.out3 125000000 0 | `-- clock-controller@6a.fod3 125000000 0 | `-- clock-controller@6a.out4 25000000 0 `-- clock-controller@6a.out0_sel_i2cb A translation function is added so the references to <&versaclock X> get routed to the corresponding clock-controller@6a.outX. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2021-08-20configs: lx2160a: load device-tree in RAM for distro bootPriyanka Jain
Update boot-commands to load device-tree from boot-device at 'fdt_addr_r' address in DDR during distro-boot. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-19Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini
2021-08-18crypto/fsl: fix missed dma_addr_t -> caam_dma_addr_t conversionHoria Geantă
One of the "dma_addr_t" instances was left out when converting to "caam_dma_addr_t". Fixes: 2ff17d2f74c5 ("crypto: fsl: refactor for 32 bit version CAAM support on ARM64") Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-18board: T4240rdb: Extend cs4340_get_fw_addr() functionalityKuldeep Singh
T4240RDB supports booting from 2 nor banks(default and altbank). The corresponding defconfig can only have one entry defined and therefore, extend cs4340_get_fw_addr() function to overwrite firmware address which will be later used in cortina firmware. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-18board: t208x: Extend cs4340_get_fw_addr() functionalityKuldeep Singh
T2080RDB supports booting from 2 nor banks(default and altbank). The corresponding defconfig can only have one entry defined and therefore, extend cs4340_get_fw_addr() function to overwrite firmware address which will be later used in cortina firmware. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-18board: ls2088ardb: Extend cs4340_get_fw_addr() functionalityKuldeep Singh
LS2088A-RDB supports TFA boot source and has 2 nor banks(default and altbank) and QSPI as boot source. The corresponding defconfig can only have one entry defined and therefore, extend cs4340_get_fw_addr() function to overwrite firmware address which will be later used in cortina firmware. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-18net: cortina: Add support for tfa boot in cortina firmwareKuldeep Singh
Add support for boards supporting TFA boot separately in cortina firmware. Please note, a weak function is defined to retrieve firmware address values as CONFIG_CORTINA_FW_ADDR is now defined in defconfig and can only have one possible value defined. This weak function will help in overwrting the values to get proper addresses as per boot source. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-18configs: Migrate CORTINA_FW_ADDR and CORTINA_FW_LENGTH to KconfigKuldeep Singh
Use moveconfig.py script to convert below defines to Kconfig and move these entries to defconfigs. CONFIG_CORTINA_FW_ADDR CONFIG_CORTINA_FW_LENGTH Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-18env: Kconfig: Add default option for PHY_CORTINAKuldeep Singh
Add PHY_CORTINA as default option in SYS_MMC_ENV_DEV Kconfig entry as PHY_CORTINA require SYS_MMC_ENV_DEV value similar to FMAN_ENET or QE. This helps in resolving compilation failure. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-18armv8: fsl : create bootcmd and mcinitcmd as per boot sourceWasim Khan
NXP platforms expect custom bootcmd and mcinitcmd to be updated as per boot source with default environment. Check env variable fsl_bootcmd_mcinitcmd_set to prepare bootcmd and mcinitcmd Fixes: cbf77d201870 (armv8: fsl-layerscape: Fix automatic setting of bootmcd with TF-A) Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-18board: fsl_validate: Fix resource leak issueKshitiz Varshney
Free dynamically allocated memory before every return statement in calc_img_key_hash() and calc_esbchdr_esbc_hash() function. Verified the secure boot changes using ls1046afrwy board. Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-18board: freescale: t208xrdb: enable Power-On Reset for rev D boardsCamelia Groza
Starting with board revision D, the MISCCSR CPLD register needs to be configured to enable Power-on Reset for software reset commands. Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-18lx2160a: Enable CONFIG_SPI_FLASH_MT35XU for lx2160a-rdb/qdsKuldeep Singh
LX2160A-RDB/QDS has micron mt35xu512aba flash which requires flag CONFIG_SPI_FLASH_MT35XU on to probe flash successfully. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-18board: sl28: drop unneeded and outdated flash partitionsMichael Walle
This board doesn't use the MTD subsystem in u-boot, thus there is no need to specify the partitions. They are outdated anyway. Just drop them. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-18arm: Finish migration of HAS_FSL_XHCI_USBTom Rini
This symbol was largely migrated, except for one case. Update it. Cc: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-18spi: nxp_fspi: Ensure width is respected in spi-mem operationsMichael Walle
Import linux commit 007773e16a6f ("spi: nxp-fspi: Ensure width is respected in spi-mem operations") to fix SPI access on boards which don't have all SPI I/O lines connected to the flash. Since commit 71025f013ccb ("mtd: spi-nor-core: Rework hwcaps selection") u-boot figures out the capabilities by looking at spi_mem_supports_op(). The FlexSPI driver doesn't take the board layout into account. Fix that. Fixes: 383fded70c4f ("spi: nxp_fspi: new driver for the FlexSPI controller") Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-08-17Merge https://source.denx.de/u-boot/custodians/u-boot-tegraTom Rini
2021-08-17board: sifive: overwrite board_fdt_blob_setup in u-boot properZong Li
Add board_fdt_blob_setup to return the device tree location which is passed by prior stage in u-boot proper. The generic board_fdt_blob_setup always returns _end, it mignt be ok because u-boot SPL would currently put the dtb there, but it would be broken if we put the dtb to another place and assigned the location into a1 register for u-boot proper. Use the location passed by prior stage would make more sence, because we actually pass the location to u-boot proper and want to use that one, rather than the dtb which in _end. We can't use CONFIG_OF_PRIOR_STAGE because it doens't distinguish the implementation of u-boot SPL and u-boot proper, so u-boot SPL need to reply on the prior stage to pass device tree location as well, but we don't pass the DT from boot rom now. In addition, when CONFIG_OF_PRIOR_STAGE is enabled, the u-boot-spl.bin and u-boot.itb won't include the device tree. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-08-17board: sifive: compile stuff only related to SPL in SPL buildZong Li
As (3581811dc26f "riscv: sifive/fu540: Move SPL related functions to spl.c"), we put the SPL stuff in spl.c, we don't need to compile unleashed.c and unmatched.c in SPL build. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-08-17riscv: cpu: fu740: Fix typo of dateZong Li
Fixed the typo of date of copyright declaration. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-08-17qemu-riscv64_smode: fix extlinux (define preboot)Dimitri John Ledkov
Commit 37304aaf60bf ("Convert CONFIG_USE_PREBOOT and CONFIG_PREBOOT to Kconfig") removed preboot commands in RISC-V targets and broke extlinux support as reported by Fu Wei <wefu@redhat.com>. The patch finishes migration of CONFIG_USE_PREBOOT and CONFIG_REBOOT to Kconfig. Fixes: 37304aaf60bf ("Convert CONFIG_USE_PREBOOT and CONFIG_PREBOOT to Kconfig") Reported-By: Fu Wei <wefu@redhat.com> Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com> Signed-off-by: Dimitri John Ledkov <dimitri.ledkov@canonical.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-08-16board: apalis-tk1: launch toradex easy installer in usb recoveryMarcel Ziswiler
The USB recovery mode is used by Toradex to load the Toradex Easy Installer image which supports further system images installation. Prepare for loading and launching the Toradex Easy Installer if the USB Recovery mode is activated. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2021-08-16Prepare v2021.10-rc2v2021.10-rc2Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-16configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-16Merge https://source.denx.de/u-boot/custodians/u-boot-stmTom Rini
Highlights: - Handle TF-A boot with FIP for STM32MP1 - Fix board_get_usable_ram_top(0) for STM32MP1 - DT alignement with kernel v5.14 for STM32MP1 - SPI-NOR DT update for DHSOM - Add UCLASS API for ECDSA singnature and implement it for STM32MP1
2021-08-16test: dm: Add test for ECDSA UCLASS supportAlexandru Gagniuc
This test verifies that ECDSA_UCLASS is implemented, and that ecdsa_verify() works as expected. The definition of "expected" is "does not find a device, and returns -ENODEV". The lack of a hardware-independent ECDSA implementation prevents us from having one in the sandbox, for now. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-08-16Kconfig: FIT_SIGNATURE should not select RSA_VERIFYAlexandru Gagniuc
FIT signatures can now be implemented with ECDSA. The assumption that all FIT images are signed with RSA is no longer valid. Thus, instead of 'select'ing RSA, only 'imply' it. This doesn't change the defaults, but allows one to explicitly disable RSA support. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-08-16arm: stm32mp1: Implement ECDSA signature verificationAlexandru Gagniuc
The STM32MP ROM provides several service. One of them is the ability to verify ecdsa256 signatures. Hook the ROM API into the ECDSA uclass. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-08-16lib: ecdsa: Implement UCLASS_ECDSA verification on targetAlexandru Gagniuc
Implement the crypto_algo .verify() function for ecdsa256. Because it backends on UCLASS_ECDSA, this change is focused on parsing the keys from devicetree and passing this information to the specific UCLASS driver. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-08-16dm: crypto: Define UCLASS API for ECDSA signature verificationAlexandru Gagniuc
Define a UCLASS API for verifying ECDSA signatures. Unlike UCLASS_MOD_EXP, which focuses strictly on modular exponentiation, the ECDSA class focuses on verification. This is done so that it better aligns with mach-specific implementations, such as stm32mp. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-08-16ARM: dts: stm32: Reduce DHCOR SPI NOR frequency to 50 MHzMarek Vasut
The SPI NOR is a bit further away from the SoC on DHCOR than on DHCOM, which causes additional signal delay. At 108 MHz, this delay triggers a sporadic issue where the first bit of RX data is not received by the QSPI controller. There are two options of addressing this problem, either by using the DLYB block to compensate the extra delay, or by reducing the QSPI bus clock frequency. The former requires calibration and that is overly complex for SPL, so opt for the second option. This incurs 20ms delay during boot, when SPL loads U-Boot to DRAM. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-16ARM: stm32: Set environment sector size to 4k on DHSOMMarek Vasut
The DHSOM SPI NOR is using 4k erase blocks, make use of it and define the default environment sector size to 4k. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-16arm: dts: stm32mp15: alignment with v5.14Patrick Delaunay
Device tree alignment with Linux kernel v5.14-rc3 - ARM: dts: stm32: move stmmac axi config in ethernet node on stm32mp15 - ARM: dts: stm32: Configure qspi's mdma transfer to block for stm32mp151 - ARM: dts: stm32: add a new DCMI pins group on stm32mp15 - ARM: dts: stm32: fix ltdc pinctrl on microdev2.0-of7 Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-16stm32mp: correctly handle board_get_usable_ram_top(0)Patrick Delaunay
The function board_get_usable_ram_top can be called after relocation with total_size = 0 to get the uppermost pointer that is valid to access in U-Boot. When total_size = 0, the reserved memory should be not take in account with lmb library and 'gd->ram_base + gd->ram_size' can be used. It is the case today in lib/efi_loader/efi_memory.c:efi_add_known_memory() and this patch avoids that the reserved memory for OP-TEE is not part of the EFI available memory regions. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-16stm32mp1: stm32prog: remove stm32prog_get_tee_partitions with FIPPatrick Delaunay
The MTD tee partitions used to save the OP-TEE binary are needed when TF-A doesn't use the FIP container to load binaries. This patch puts under CONFIG_STM32MP15x_STM32IMAGE flag the associated code in U-Boot binary and prepare the code cleanup when CONFIG_STM32MP15x_STM32IMAGE support will be removed after TF-A migration to FIP support. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-16doc: st: stm32mp1: Add FIP support for trusted bootPatrick Delaunay
TF-A for STM32MP15 now supports the FIP: it is a packaging format which includes the secure monitor, u-boot-nodtb.bin and u-boot.dtb This FIP file is loaded by FSBL = TF-A BL2. This patch updates the board documentation to use this FIP file and no more u-boot.stm32 (with STM32 image header) which is no more generated. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-16arm: stm32mp: add defconfig for trusted boot with FIPPatrick Delaunay
Add TF-A FIP support for trusted boot on STM32MP15x, when STM32MP15x_STM32IMAGE is not activated. With FIP support the SSBL partition is named "fip" and its size is 4MB, so the ENV partition name in device tree (for SD card or eMMC) or offset in defconfig (CONFIG_ENV_OFFSET / CONFIG_ENV_OFFSET_REDUND) need to be modified. With FIP the TEE MTD partitions are removed because the OP-TEE binray are included in the FIP containers. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-08-16arm: stm32mp: handle the OP-TEE nodes in DT with FIP supportPatrick Delaunay
With FIP support in TF-A (when CONFIG_STM32MP15x_STM32IMAGE is not activated), the DT nodes needed by OP-TEE are added by OP-TEE firmware in U-Boot device tree, present in FIP. These nodes are only required in trusted boot, when TF-A load the file u-boot.stm32, including the U-Boot device tree with STM32IMAGE header, in this case OP-TEE can't update the U-Boot device tree. Moreover in trusted boot mode with FIP, as the OP-TEE nodes are present in U-Boot device tree only when needed the function stm32_fdt_disable_optee can be removed. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
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