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2023-06-02efi_loader: check return value of part_get_info()Heinrich Schuchardt
part_get_info() may return an error code. Check it. Update function description of dp_part_node(). Addresses-Coverity-ID: 184067 ("Unchecked return value") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-06-02doc: android: Fix a typoBin Meng
%s/than/then Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-06-02doc: fix loady man-pageHeinrich Schuchardt
* loady may return $? = 1. * Move misplaced description Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-06-02doc: loadx man-pageHeinrich Schuchardt
Provide a man-page for the loadx command. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-06-02doc: loadb man-pageHeinrich Schuchardt
Provide a man-page for the loadb command. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-05-30Merge branch '2023-05-30-TI-fixes-Apple-M2-support'Tom Rini
- Fixes for some TI K3 platforms and merge the Apple M2 support I had intended to pick up earlier.
2023-05-30pci: apple: Add support for M2 Pro/MaxMark Kettenis
The PCIe controller on the M2 Pro/Max is different from the one found on earlier Apple SoCs. Some registers moved and te meaning of the bits in some other registers changed. But they are still similar enough to handle both controllers in the same driver. Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-05-30arm: apple: Add initial Apple M2 Pro/Max supportMark Kettenis
Apple's M2 Pro/Max SoC are somewhat similar to the M1 Pro/Max but need a tweaked memory map. USB, NVMe, UART and WDT are working with the existing drivers. Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-05-30arm: mach-k3: security: separate out validating binary logicManorit Chawdhry
K3 GP devices allows booting the secure binaries on them by bypassing the x509 header on them. ATF and OPTEE firewalling required the rproc_load to be called before authentication. This change caused the failure for GP devices that strips off the headers. The boot vector had been set before the headers were stripped off causing the runtime stripping to fail and stripping becoming in-effective. Separate out the secure binary check on GP/HS devices so that the boot_vector could be stripped before calling rproc_load. This allows keeping the authentication later when the cluster is on along with allowing the stripping of the binaries in case of gp devices. Fixes: 1e00e9be62e5 ("arm: mach-k3: common: re-locate authentication for atf/optee") Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-05-30arm: mach-k3: Increase SYSFW max image sizeDave Gerlach
When booting with HS silicon, the system firmware image is 278270, which is slightly larger than currently allocated amount. This can cause unexpected behavior if this overlap interferes with other things in memory, so increase this with a slightly margin added as well to avoid any boot issues that can appear after system firmware gets loaded. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tero Kristo <kristo@kernel.org> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Reviewed-by: Dhruva Gole <d-gole@ti.com>
2023-05-30Kconfig: j721e: Change K3_MCU_SCRATCHPAD_BASE to non firewalled regionManorit Chawdhry
In non-combined boot flow for K3, all the firewalls are locked by default until sysfw comes up. Rom configures some of the firewall for its usage along with the SRAM for R5 but the PSRAM region is still locked. The K3 MCU Scratchpad for j721e was set to a PSRAM region triggering the firewall exception before sysfw came up. The exception started happening after adding multi dtb support that accesses the scratchpad for reading EEPROM contents. The commit changes R5 MCU scratchpad for j721e to an SRAM region. Old Map: ┌─────────────────────────────────────┐ 0x41c00000 │ SPL │ ├─────────────────────────────────────┤ 0x41c40000 (approx) │ STACK │ ├─────────────────────────────────────┤ 0x41c85b20 │ Global data │ │ sizeof(struct global_data) = 0xd8 │ ├─────────────────────────────────────┤ gd->malloc_base = 0x41c85bfc │ HEAP │ │ CONFIG_SYS_MALLOC_F_LEN = 0x70000 │ ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR │ SPL BSS │ (0x41cf5bfc) │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │ └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX                 (0x41cffbfc) New Map: ┌─────────────────────────────────────┐ 0x41c00000 │ SPL │ ├─────────────────────────────────────┤ 0x41c40000 (approx) │ EMPTY │ ├─────────────────────────────────────┤ 0x41c81920 │ STACK │ │ SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 │ ├─────────────────────────────────────┤ 0x41c85920 │ Global data │ │ sizeof(struct global_data) = 0xd8 │ ├─────────────────────────────────────┤ gd->malloc_base = 0x41c859f0 │ HEAP │ │ CONFIG_SYS_MALLOC_F_LEN = 0x70000 │ ├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR │ SPL BSS │ (0x41cf59f0) │ CONFIG_SPL_BSS_MAX_SIZE = 0xA000 │ ├─────────────────────────────────────┤ 0x41cff9fc │ NEW MCU SCRATCHPAD │ │ SYS_K3_MCU_SCRATCHPAD_SIZE = 0x200 │ └─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX                 (0x41cffbfc) Fixes: ab977c8b91b4 ("configs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT") Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> [n-francis@ti.com: SRAM allocation addressing diagram] Signed-off-by: Neha Francis <n-francis@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
2023-05-30configs: j721e: Merge the HS and non-HS defconfigsManorit Chawdhry
K3 devices have runtime type board detection. Make the default defconfig include the secure configuration. Then remove the HS specific config. Non-HS devices will continue to boot due to runtime device type detection. If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS devices these can be ignored. Reviewed-by: Bryan Brattlof <bb@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Acked-by: Andrew Davis <afd@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-05-30arm: k3: config.mk: Add missing dependencies on tispl.bin HSAndrew Davis
When building for secure devices using non-buildman based image generation the signed tispl.bin file is called tispl.bin_HS. Also build the unsigned tispl.bin file as expected. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-05-29Prepare v2023.07-rc3v2023.07-rc3Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-29configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-25Merge tag 'u-boot-imx-20230525' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20230525 ------------------- - i.MX93 series - Fixes CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16412
2023-05-21serial: mxs: Add MXS AUART driverMarek Vasut
Add trivial driver for the MXS AUART IP. This is the other UART IP present in i.MX23 and i.MX28, used to drive the non-DUART ports. Signed-off-by: Marek Vasut <marex@denx.de>
2023-05-21imx9: imx93_evk: enable sysresetPeng Fan
Enable sysreset for i.MX93 EVK. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: imx93_evk: update ddr timing filePeng Fan
Update DDR timing file generated by DDR Config Tool 1. Dynamic refresh rate is set by default 2. The 3rd freq will be 625MTS based on power and performance better than 100MTS. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: Calculate DDR size from DDRC settingYe Li
To avoid using static setting for ECC enabled DDR size, switch to calculate DDR size from DDRC setting Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21ddr: imx9: update the rank setting for multi fsp supportJacky Bai
The rank setting flow should be updated to support multi fsp config. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21ddr: imx93: update the ddr init to support mult setpointsJacky Bai
Update the DDR init flow for multi-setpoint support on i.MX93. A new fsp_cfg struct need to be added in the timing file to store the diff part of the DDRC and DRAM MR register for each setpoint. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21ddr: imx93: Add 625M bypass clock supportJacky Bai
Add 625M bypass clock that may be used DRAM 625M bypass mode support. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21ddr: imx9: Change the saved ddr data base to 0x2051c000Jacky Bai
change the ddr saved info to the last 16KB of the OCRAM. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: imx93_evk: Update spl stack & bss base addressPeng Fan
As the ddr timing info will be saved at the last 16KB of the OCRAM, spl stack & bss base should be updated to avoid conflict. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21ddr: imx9: Add workaround for DDRPHY rank-to-rank errataYe Li
According to DDRPHY errata, the Rank-to-Rank Spacing and tphy_rdcsgap specification does not include the Critical Delay Difference (CDD) to properly define the required rank-to-rank read command spacing after executing PHY training firmware. Following the errata workaround, at the end of data training, we get all CDD values through the MessageBlock, then re-configure the DDRC timing of WWT/WRT/RRT/RWT with comparing MAX CDD values. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2023-05-21arm: dts: imx93: add tmuPeng Fan
Add tmu nodes and thermal zone Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21arm: dts: imx93: sync device tree with LinuxPeng Fan
Sync device tree with next-20230426 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: allow to bootaux Mcore with input addressYe Li
Currently bootaux only supports to boot M33 core from TCM. Since ATF has changed to use x2 parameter for M33 image address, update the bootaux command to use input address, so we can support boot from any possilbe address like TCM, DDR, Flexspi NOR. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: imx93_evk: add low drive mode support on 11x11 EVKPeng Fan
Add a static u-boot config for i.MX93 low drive mode support. When low drive mode is enabled, VDD_SOC is set to 0.75V. Bus clocks, A55 core clock (900Mhz), DDR clock (1866MTS), and some peripherals clocks (USDHC/FLEXSPI/PDM/DISP_PIX/CAM_PIX) must decrease to meet max frequencies in low drive mode. Also set standby voltage for buck1 Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: use i.MX generic rom api functionPeng Fan
There is no need to save gd with using the generic rom api function, so simplify code. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: correct coding stylePeng Fan
The end brace should be in a new line Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: add i.MX93 variants supportPeng Fan
According to datasheet, iMX93 has fused parts with CORE1 or NPU or both disabled. So update code to support it, the kernel device tree runtime update will be added in future patches. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: clock: config arm alt root to 500mhzPeng Fan
Config the A55 alt root clock to 500MHz(LD mode frequency) by default. Normally, this clock root is only used as an intermediate clock soure for A55 core/dsu when change the ARM PLL frequency. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: clock: add CONFIG_IMX9_LOW_DRIVE_MODE supportPeng Fan
Add CONFIG_IMX9_LOW_DRIVE_MODE in imx9 clk, later we will add board support Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: clock: clear HW_CTRL_SELPeng Fan
The HW_CTRL_SEL should be cleared when configuring PLL to avoid potential glitch Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: Get market segment and speed gradingPeng Fan
Get the chip's market segment and speed grading from fuse and print them in boot log as other i.MX series. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: soc: support reset causePeng Fan
Support print reset cause. Since SRSR is not accessible from non-secure world, so first save it to grp0, then read it in non-secure world. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21watchdog: ulp_wdog: guard reset_cpu with condition checkPeng Fan
There will be build error if CONFIG_SYSRESET is enabled, so guard the reset_cpu with condition check here Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de>
2023-05-21imx9: imx93_evk: enable CONFIG_WDTPeng Fan
Without this config, there is boot error: Error binding ulp_wdt driver Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: imx93_evk: select IMX_TMUPeng Fan
Select thermal config to print current temperature Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: imx93_evk: drop unused macroPeng Fan
Drop unused macro Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: imx93_evk: enable CPU_IMXPeng Fan
select CONFIG_CPU_IMX to display cpu info Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: Change hard coded MAC to read from fuseYe Li
The MAC addresses are hard coded for bring up. Change it to support reading from fuse. Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: cut off OPTEE memory region from U-BootPeng Fan
OPTEE memory region is set secure access only in ATF with configuration to TRDC, and need to remove it from U-Boot, otherwise U-Boot and Kernel may crash when accessing the memory Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: simplify clk settingsPeng Fan
Simplify the clk root settings with an array Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: correct getting LPI2C clkPeng Fan
LPI2C_CLK_ROOT should be used instead of LPUART_CLK_ROOT for i2c Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: use parameter freq when set_arm_clkPeng Fan
The freq parameter was ignored, should use it when configuring ARM PLL Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: add more PLL settingsPeng Fan
Add more PLL settings for A55 and Display Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-05-21imx9: configure M33 systick to 24MPeng Fan
The M33 systick should be 24M per reference mannual, so correct it. Signed-off-by: Peng Fan <peng.fan@nxp.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-06 15:52:18 +0000