| Age | Commit message (Collapse) | Author |
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this is cosmetic change. no functional change is intended.
- remove redundant white spaces
- replace white spaces with tab
- align position of last letter/word
- sort lines in CFG_EXTRA_ENV_SETTINGS
- add comment after #endif
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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The pcie1ln_sel bits for the RK3588 are getting set but not cleared due
to an incorrect write mask.
Use a newly introduced constant for the write mask to fix this.
Also introduce a GENMASK-based constant for PCIE30_PHY_MODE.
This fix is adapted from the upstream Linux commit by Sebastian Reichel:
55491a5fa163 ("phy: rockchip-snps-pcie3: fix clearing PHP_GRF_PCIESEL_CON bits")
Fixes: 50e54e80679b ("phy: rockchip: snps-pcie3: Add support for RK3588")
Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Misconfigured `PHP_GRF_PCIESEL` values are causing bifurcation issues,
for example on the FriendlyElec CM3588 NAS board which uses bifurcation
on both PCIe PCIe ports (all four lanes) to enable four M.2 NVMe
sockets. Without this fix, NVMe devices do not get recognized.
Correct the `PHP_GRF_PCIESEL` register configuration and simplify the
bifurcation logic, enabling proper PCIe bifurcation based on the
data-lanes property.
This fix is adapted from the upstream Linux commit by Michal Tomek:
f8020dfb311d ("phy: rockchip-snps-pcie3: fix bifurcation on rk3588")
Fixes: 50e54e80679b ("phy: rockchip: snps-pcie3: Add support for RK3588")
Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Several identifiers use "rochchip" instead of "rockchip".
Fix this by replacing every instance of "rochchip" with "rockchip".
Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Replace "rochchip" by "rockchip" in two instances.
Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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The NanoPi R6S is a SBC by FriendlyElec based on the Rockchip RK3588s.
It comes with 4GB or 8GB of RAM, a microSD card slot, 32GB eMMC storage,
one RTL8211F 1GbE and two RTL8125 2.5GbE Ethernet ports, one USB 2.0
Type-A and one USB 3.0 Type-A port, a HDMI port, a 12-pin GPIO FPC
connector, a fan connector, IR receiver as well as some buttons and LEDs.
Add initial support for this board using the upstream devicetree sources.
Kernel commit:
f1b11f43b3e9 ("arm64: dts: rockchip: Add support for NanoPi R6S")
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de>
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The NanoPi R6C is a SBC by FriendlyElec based on the Rockchip RK3588s.
It comes with 4GB or 8GB of RAM, a microSD card slot, optional 32GB eMMC
storage, one M.2 M-Key connector, one RTL8211F 1GbE and one RTL8125
2.5GbE Ethernet port, one USB 2.0 Type-A and one USB 3.0 Type-A port, a
HDMI port, a 30-pin GPIO header as well as multiple buttons and LEDs.
Add initial support for this board using the upstream devicetree sources.
Tested in U-Boot proper:
- Booting from eMMC works
- 1GbE Ethernet works using the eth_eqos driver (tested by ping)
- 2.5GbE Ethernet works using the eth_rtl8169 driver (tested by ping),
but the status LEDs on this specific port currently aren't working
- NVMe SSD in M.2 socket does get recognized (tested with `nvme scan`
followed by `nvme details`)
Kernel commit:
d5f1d7437451 ("arm64: dts: rockchip: Add support for NanoPi R6C")
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Sebastian Kropatsch <seb-dev@mail.de>
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This enables PCIe support on Tiger as exposed on
Q7_PCIE[0123]_[RT]X_[PN] signals and more specifically on the `PCI
Express` connector on the Haikou devkit.
This was tested with a PCIe to NVMe adapter (e.g.
https://www.amazon.de/dp/B07RZZ3TJG).
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Jaguar has an M.2 M-KEY slot for NVMes, connected to the PCIe3 4-lane
PHY on RK3588.
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y is technically not necessary since
it's required only for the M.2 E-KEY slot on the main PCB, but that is
used typically for WiFi+BT modules, or on the mezzanine connector but
the features exposed behind that connector aren't supported in U-Boot
(no DT for it right now). However, if the PHY driver is missing, we get
the following error message:
pcie_dw_rockchip pcie@fe170000: failed to get pcie phy (ret=-19)
and you would need to know which PCIe controller that is before deciding
to ignore it. While after enabling the PHY driver, we are greeted with:
pcie_dw_rockchip pcie@fe170000: PCIe-2 Link Fail
which is a bit more acceptable (to me).
The other option would be to disable the PCIe2 PHYs/controllers in the
DT, which I'm not too fond of.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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The Jaguar SBC provides an M.2 slot connected to the pcie3 controller.
In contrast to a number of other boards the pcie-refclk is gpio-controlled,
so the necessary clock and is added to the list of pcie3 clocks.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240423074956.2622318-1-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 0ec7e1096332bc2b9bc881c21cfd234058f747b3 ]
(cherry picked from commit 76a89655ae740dddb57187b5b52071ed99187452)
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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ROCK Pi E v3.0 uses DDR4 SDRAM instead of DDR3 SDRAM used in v1.2x.
prepare new rk3328-rock-pi-e-v3.dts in u-boot which just includes
upstream rk3328-rock-pi-e.dts.
defconfig still uses
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock-pi-e.dtb"
because v3.0 and prior are compatible.
Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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inno_poll passes the reg offset that is used by readl_poll_sleep_timeout
without any base addr.
Fix it.
Bug:
inno_hdmi_phy phy@ff430000: Pre-PLL locking failed
inno_hdmi_phy phy@ff430000: PHY: Failed to power on phy@ff430000: -110.
failed to power on phy (ret=-110)
inno_hdmi_phy phy@ff430000: Pre-PLL locking failed
inno_hdmi_phy phy@ff430000: PHY: Failed to power on phy@ff430000: -110.
failed to power on phy (ret=-110)
Fixes: aa2271184603 ("phy: rockchip: Add Rockchip INNO HDMI PHY driver")
Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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No meaningful changes were made to this SoM since February 2021. Nobody
from Theobroma has booted anything recent on that product since July
2021 at the latest. The product isn't available to buy anymore and
disappeared from our website.
This product is therefore unmaintained and it would be disingenuous to
say the opposite, so drop support for RK3368 Lion.
If you're a user of Lion, feel free to revert this patch or contact our
sales/support department.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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It turns out only Puma had a working git:// URL. Though that is now
fixed, having HTTPS URLs make it easier to directly reach our cgit
webserver to check what's up without having to change the URL manually.
Depending on your terminal settings, this also makes it possible to
open the link from it.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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On Puma v2.1 with a KSZ9031, the Ethernet PHY often doesn't detect the
link in the 4-second default timeout.
After some boot-loop test for about a thousand boots, 70% were below
10s, 90% below 15s and 100% below 30s. Let's play it safe and make it
30s so that hopefully all links that should be detected are.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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fix following error found by clang:
CC arch/arm/mach-rockchip/cpu-info.o
arch/arm/mach-rockchip/cpu-info.c:23:13: error: incomplete definition of type 'struct rockchip_cru'
23 | switch (cru->glb_rst_st) {
| ~~~^
./arch/arm/include/asm/arch-rockchip/clock.h:181:8: note: forward declaration of 'struct rockchip_cru'
181 | struct rockchip_cru;
| ^
1 error generated.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Commit 2ce40542e0eb ("power: rk8xx: properly print all supported PMICs
name") fixed all PMICs name that were broken but broke the only one that
was not broken already: RK808. This one is a special case because the ID
registers are marked as reserved and always return 0, so the variant
cannot be derived the same way it is done for other PMICs from Rockchip.
Fixes: 2ce40542e0eb ("power: rk8xx: properly print all supported PMICs name")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
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In commit 100f489f58a6 ("rockchip: rk3399: Fix loading FIT from SD-card
when booting from eMMC"), the spi1 bootph properties were mistakenly
removed meaning, so re-add them back to fix SPI-NOR flash not being
found in U-Boot pre-reloc as required for RK3399 Puma.
Fixes: 100f489f58a6 ("rockchip: rk3399: Fix loading FIT from SD-card when booting from eMMC")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Enable the IO domain on Ringneck. Based on the current HW design, this
should do nothing else than making sure vccio6 iodomain is controlled by
the GRF and not GPIO0B6.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Port the PX30 part of the Rockchip IO Domain driver from Linux.
This differs from linux version in that the io iodomain bit is enabled
in the write ops instead of in an init ops as in linux, this way we can
avoid keeping a full state of all supplies that have been configured.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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There are some sub-nodes under the grf DT nodes, so add bind callback
function in syscon_px30 driver to scan them recursively.
Fixes: e9ccb2f526ed ("rockchip: add px30 architecture core")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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The Haikou Devkit exposes 4 buttons over GPIO so let's enable their
support so their status can be queried from the `button` command from
the CLI.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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PX30 supports ARMv8 Cryptography Extensions so let's enable it by
default for all PX30 to make FIT verification when enabled much faster.
While A35 shouldn't be impacted by ARMV8_SET_SMPEN cache coherency
according to the Kconfig help text, let's enable it just in case since
it exists in the documentation[1].
For u-boot part of the FIT image, it is now taking 5ms against currently
35ms. fdt-1 check lowered from 3ms to <1ms. atf-1 from 6ms to <1ms.
[1] https://developer.arm.com/documentation/100236/0100/register-descriptions/aarch64-system-registers/cpu-extended-control-register--el1?lang=en
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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This enables FIT verification in SPL for its payload (bl31, u-boot.itb,
...). This makes PX30 Ringneck match what happens on other Theobroma
boards.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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USB gadget simply doesn't work right now on PX30. Tested on PX30 EVB and
PX30 Ringneck with Linux mainline and Rockchip 5.10 Linux as well as
U-Boot.
We don't want to our users to assume that USB gadget is supported on Q7
USB P1 on Ringneck Haikou, so let's remove its support, which also
removes the ums CLI command, fastboot and Android image booting
support.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
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We don't set many options in the board Kconfig entry file but instead
use defconfigs, select in some cases on the target itself, or update the
"default" options of the main entries when needed. In this case we can
remove most of the board Kconfig entries and just add them to the
defconfig like other platforms.
Signed-off-by: Tom Rini <trini@konsulko.com>
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Marek Mojík <marek.mojik@nic.cz> says:
Hello all,
this is a continuation of previous work by Pali to add support for the
Turris 1.x board. As the patches were based on u-boot v2022.04, a
nontrivial rebasing was needed.
Some notes:
- Some options that are in SD defconfig are disabled in NOR defconfig
because over the years u-boot grew and the old NOR defconfig will not
fit into NOR memory.
- SD boot with RAM larger than 2GB will only allocate 2GB of RAM (We
were not able to fix this yet)
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Add support for CZ.NIC Turris 1.x routers.
CZ.NIC Turris 1.0 (RTRS01) and 1.1 (RTRS02) are open source routers, they
have dual-core PowerPC Freescale P2020 CPU and are based on reference
Freescale P2020RDB-PC-A board design.
Hardware design is fully open source, all firmware and hardware design
files are available at Turris project website:
https://docs.turris.cz/hw/turris-1x/turris-1x/
https://project.turris.cz/en/hardware.html
The P2020 BootROM can load U-Boot either from NOR flash or from SD card.
We add the new defconfigs, turris_1x_nor_defconfig, which configures
U-Boot for building the NOR image, and turris_1x_sdcard_defconfig, which
configures U-Boot for building an image suitable for SD card.
The defconfig for NOR image is stripped-down a - many config options
enabled in SD defconfig are disabled for NOR defconfig. This is because
U-Boot grew non-trivially in the last two years and it would not fit
into the space allocated for U-Boot in the NOR memory. In the future we
may try to use LTO to reduce the size of the code and enable more
options.
The design of CZ.NIC Turris 1.x routers is based on Freescale P2020RDB-PC-A
board, so some code from boards/freescale/p1_p2_rdb_pc is used and linked
into Turris 1.x board code.
Turris 1.x code in this patch uses modern distroboot and can boot Linux
kernel from various locations, including NAND, SD card, USB flash disks,
NVMe disks or SATA disks (connected to extra SATA/SCSI PCIe controllers).
Via distroboot is implemented also rescue NOR boot for factory recovery,
triggered by reset button, like on other existing Turris routers.
SD boot with RAM larger than 2GB will only allocate 2GB of RAM (We were
not able to fix this yet)
[ Because various CONFIG_ macros were migrated to Kconfig since the last
time this worked on upstream U-Boot (in 2022), a non-trivial rebasing
was needed and some issues were solved. ]
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Mojík <marek.mojik@nic.cz>
Reviewed-by: Marek Behún <kabel@kernel.org>
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include/asm/config.h
Use the CONFIG_IS_ENABLED() macro when checking for DM_SERIAL so that
CFG_SYS_NS16550_CLK is not defined as get_serial_clock() in SPL if SPL
does not have DM_SERIAL enabled.
Signed-off-by: Marek Mojík <marek.mojik@nic.cz>
Reviewed-by: Marek Behún <kabel@kernel.org>
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Use CONFIG_VAL() for SYS_MONITOR_BASE in start.S so that correct value
is used for SPL.
Signed-off-by: Marek Mojík <marek.mojik@nic.cz>
Reviewed-by: Marek Behún <kabel@kernel.org>
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The find_law() function searches for LAW just by physical address. This
is unsuitable for cases with overlapping LAWs. Extend it to
find_law_by_addr_id(), which searches for LAW by physical address and
target id.
Add a static inline definition of the original find_law() into fsl_law.h
header.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Mojík <marek.mojik@nic.cz>
Reviewed-by: Marek Behún <kabel@kernel.org>
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p1_p2_rdb_pc_fix_fdt_model() for fixing DT model string
This allows boards to fixup / overwrite DT model string when booting OS.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Mojík <marek.mojik@nic.cz>
Reviewed-by: Marek Behún <kabel@kernel.org>
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When U-Boot is running from flash memory (execute in place) then
gd->fdt_blob before relocation points to read-only flash memory.
So U-Boot calls board_fix_fdt() with read-only gd->fdt_blob pointer which
cause immediate CPU crash when callback is trying to modify gd->fdt_blob.
Fix this issue by introducing a new config option OF_INITIAL_DTB_READONLY
which moves fix_fdt callback after the reloc_fdt callback. This makes
CONFIG_OF_BOARD_FIXUP working also if U-Boot before relocation is not
running from read/write (S)RAM memory.
This is required for mpc85xx boards when booting from flash NOR.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Mojík <marek.mojik@nic.cz>
Reviewed-by: Marek Behún <kabel@kernel.org>
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https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
Updates for RPi for 2024.10:
- board: rpi: remove leftover CONFIG_HW_WATCHDOG block
- arm: bcm283x: remove unused empty hw_watchdog_disable
- board: raspberrypi: Fix format specifier for printing rev_scheme
- Revert "arm: dts: bcm283x: Add minimal smbios information"
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This was added in commit 45a6d231b2f (bcm2835_wdt: support for the
BCM2835/2836 watchdog), which did do 'select HW_WATCHDOG'. That
incarnation of the watchdog driver later got removed in
c7adc0b5f98 (watchdog: bcm2835_wdt: Remove unused BCM283x watchdog
driver and its references), but this block was left behind.
Another rpi watchdog driver has since been added, but that does not
select HW_WATCHDOG, so this remains dead and unused. Remove it.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
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This empty stub was originally added as one branch of an #ifdef in
commit 45a6d231b2f (bcm2835_wdt: support for the BCM2835/2836
watchdog). That incarnation of the rpi watchdog driver was later
removed in c7adc0b5f98 (watchdog: bcm2835_wdt: Remove unused BCM283x
watchdog driver and its references), but this now unused stub was left
behind. The later (re-)added rpi watchdog driver does not define a
hw_watchdog_disable() function, as that is properly integrated in the
watchdog framework.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
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rev_scheme is an unsigned integer and must not be printed
as a signed integer.
Signed-off-by: Francois Berder <fberder@outlook.fr>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
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This reverts commit 33041972727e84d3f95e26c83322521f61827584.
With the ability to generate this SMBIOS details autmotically the
small amount of details that this patch provided are generated
automatically so this is now obsolete so we can just drop it.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Matthias Brugger <mbrugger@suse.com>
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https://source.denx.de/u-boot/custodians/u-boot-dfu
u-boot-dfu-20240711
Usb gadget:
- A welcome cleanup: epautoconf workaround is dropped to use
.match_ep() instead
- Introduce handle_interrupts() op for USB_GADGET_GENERIC, which
allows a per-driver interrupt handling
Fastboot:
- Fix mssing include when building with TCP only
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The build option to support images of type 'IMAGE_FORMAT_LEGACY' is
CONFIG_LEGACY_IMAGE_FORMAT so update the pytest to check for the correct
option.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
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The ARASAN MMC controller on Keystone 3 class of devices need the SDCD
line to be connected for proper functioning.
In cases where this can't be connected, add a quirk to force the
controller into test mode and set the TESTCD bit. Use the flag
"ti,fails-without-test-cd", to implement this above quirk when required.
Additionally, this quirk also avoids waiting for the controller debounce
time.
This commit is similar to linux kernel commit c7666240ec76
("drivers: mmc: sdhci_am654: Add the quirk to set TESTCD bit").
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
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Add and use the correct number of ddr phy registers to update the
corresponding settings.
Fixes: cbf5c99ef317 ("board: phytec: common: Introduce a method to inject DDR timings deltas")
Signed-off-by: Dominik Haller <d.haller@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
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When building with the igep00x0_defconfig, the following warning is shown:
$ make -j $(nproc)
...
LD spl/u-boot-spl
OBJCOPY spl/u-boot-spl-nodtb.bin
SYM spl/u-boot-spl.sym
CAT spl/u-boot-spl-dtb.bin
COPY spl/u-boot-spl.bin
MKIMAGE MLO
===================== WARNING ======================
This board does not use CONFIG_DM_I2C (Driver Model
for I2C drivers). Please update the board to use
CONFIG_DM_I2C before the v2022.04 release. Failure to
update by the deadline may result in board removal.
See doc/develop/driver-model/migration.rst for more info.
====================================================
The only reason why I2C is enabled for the IGEP boards is that the TWL4030
driver requires it.
But both the TWL4034 and the OMAP I2C controller drivers were converted to
the driver model by commits daa69ffe3d4d ("drivers: i2c: omap24xx_i2c:
adopt omap_i2c driver to driver model") and fb1b7712ad3f power: make most
tps drivers and the twl4030 driver compatible with DM_I2C") respectively.
So there's no reason anymore to keep using the I2C legacy API and instead
the DM_I2C option could just be enabled.
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Enric Balletbo i Serra <eballetbo@gmail.com>
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In some FDTs, there is not enough free memory to add nodes, so this
operation fails.
Signed-off-by: Maxim Moskalets <maximmosk4@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This allows spliting partition list to several lines in environment file
ex:
--------------------
gpt_partition_list=
name=boot1,size=5MiB,start=0x100000;
name=boot2,size=5MiB;
name=rootfs1,size=70MiB;
name=rootfs2,size=70MiB;
name=overlay1,size=20MiB;
name=overlay2,size=20MiB;
name=art,size=4MiB;
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Fixes a compile error when building with only the TCP fastboot
implementation.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20240621015135.1570605-1-caleb.connolly@linaro.org
[mkorpershoek: wrapped commit msg to fix checkpatch]
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
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Christian Marangi <ansuelsmth@gmail.com> says:
This is an initial series that have all the initial trivial
fixes required for usage of OF_UPSTREAM for the mediatek SoC
This also contains the pcie-gen3 driver and the required tphy
support driver to make it work.
Subsequent series will follow with conversion of the mtk-clk
to permit usage of OF_UPSTREAM and upstream clk ID.
MT7981, MT7986 and MT7988 migration to upstream clock ID
is complete and working on MT7623.
Series CI tested with PR: https://github.com/u-boot/u-boot/pull/590
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Support alternative compatible for fixed-plls clocks used upstream with
the compatible mediatek,mt7986-apmixedsys.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Support alternative compatible for fixed-plls clocks used upstream with
the compatible mediatek,mt7988-apmixedsys.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Set pcie-phy optional for PCIe gen3. MT7988 doesn't require it and
making it mandatory prevent the driver to correctly probe.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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