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When looking at ufetch output it isn't immediately obvious which CPU
architecture the presented board has. This patch therefore adds the
CPU architecture string (for example "powerpc") to the "CPU:" line.
The new format is:
CPU: powerpc (1 cores, 1 in use)
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20241211-ufetch-v2-3-2b5432ffaeb1@posteo.net
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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The ufetch command is still quite useful on systems without block
device support; remove the CONFIG_BLK dependency and make sure the code
compiles/works with and without CONFIG_BLK.
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Link: https://lore.kernel.org/r/20241211-ufetch-v2-2-2b5432ffaeb1@posteo.net
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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On 32-bit architectures, LAST_LINE (_LAST_LINE - 1UL) is 64 bits long,
but size_t (from ARRAY_SIZE(...)) is 32 bits. This results in a warning
because the max() macro expects the same type on both sides:
cmd/ufetch.c: In function ‘do_ufetch’:
include/linux/kernel.h:179:24: warning: comparison of distinct pointer types lacks a cast [-Wcompare-distinct-pointer-types]
179 | (void) (&_max1 == &_max2); \
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cmd/ufetch.c:92:25: note: in expansion of macro ‘max’
92 | int num_lines = max(LAST_LINE + 1, ARRAY_SIZE(logo_lines));
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Fix this by casting LAST_LINE to size_t.
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Link: https://lore.kernel.org/r/20241211-ufetch-v2-1-2b5432ffaeb1@posteo.net
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Add support for the PCIe QMP PHY on the SM8550,
SM8650 and x1e80100 SoCs.
The driver is based on the Linux phy/qualcomm/phy-qcom-qmp-pcie.c
driver and adapted to U-Boot.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20241125-topic-pcie-phy-v1-1-bf08811d0a07@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Add support for the PCIe busses on Qualcomm platforms,
by using the pcie_dw_common infrastructure.
The driver is based on the Linux driver but only supporting
the "1_9_0" and compatible platforms like:
- sa8540p
- sc7280
- sc8180x
- sc8280xp
- sdm845
- sdx55
- sm8150
- sm8250
- sm8350
- sm8450
- sm8550
- sm8650
- x1e80100
But it has only been tested on:
- sc7280
- sm8550
- sm8650
- x1e80100
It supports setting the IOMMU SID table for supported platforms.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20241125-topic-pcie-controller-v1-2-45c20070dd53@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Add PCIe config space capability search function specific for
the host controller, which are bridges *to* PCI devices but
are not PCI devices themselves.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20241125-topic-pcie-controller-v1-1-45c20070dd53@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Enable the MSM RNG driver by default with the associated
command, this will fill KASLR seed when booting Linux.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20241125-topic-sm8x50-rng-v1-2-52b72821c3e9@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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On recent Qualcomm SoCs, the hardware random generator
is initialized and handled by the firmware because shared
between different Execution Environments (EE), thus the
initialization step should be skipped.
Also support the newer "TRNG" found on SM8550 and newer
SoCs that has inbuilt NIST SP800 90B compliant entropic source.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Alexey Minnekhanov <alexeymin@postmarketos.org>
Link: https://lore.kernel.org/r/20241125-topic-sm8x50-rng-v1-1-52b72821c3e9@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Add the PCIe clocks for the x1e80100 GCC.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20241125-topic-pcie-clk-v1-4-4315d1e4e164@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Add the PCIe clocks for the SM8650 GCC.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20241125-topic-pcie-clk-v1-3-4315d1e4e164@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Add the PCIe clocks for the SM8550 GCC.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20241125-topic-pcie-clk-v1-2-4315d1e4e164@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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The PCIe PIPE clock requires a special setup function to
mux & enable the clock from the PCIe PHY before the PHY
has enabled the clock.
Import the clk_phy_mux_enable() from the Linux driver to
use the same implementation regarding the PIPE clock.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20241125-topic-pcie-clk-v1-1-4315d1e4e164@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Add the PMC8380 regulator data found on the Snapdragon X Elite platforms.
The tables are imported from the Linux driver.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Link: https://lore.kernel.org/r/20241125-topic-hamoa-pmc8380-rpmh-regulators-v1-1-695c44ea8586@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Add the missing PCIe clk_req function for the x1e80100 TLMM.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20241125-topic-pcie-pinctrl-v1-3-4df323d90397@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Add the missing PCIe clk_req functions for the SM8650 TLMM.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20241125-topic-pcie-pinctrl-v1-2-4df323d90397@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Add the missing PCIe clk_req function for the SM8550 TLMM.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20241125-topic-pcie-pinctrl-v1-1-4df323d90397@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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This helps with reliability on some platforms. We should probably also
configure the hardware debounce timer eventually.
Link: https://lore.kernel.org/r/20241113045109.1838241-1-caleb.connolly@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Enable the X1E80100 pinctrl driver in the Qualcomm defconfig.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Caleb Connolly <caleb.connolly@linaro.org> # Yoga Slim 7x
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20241115-topic-x1e80100-pinctrl-v1-2-35f984226e47@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Add pinctrl driver for the TLMM block found in the X1E80100 SoC.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Caleb Connolly <caleb.connolly@linaro.org> # Yoga Slim 7x
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20241115-topic-x1e80100-pinctrl-v1-1-35f984226e47@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Enable the X1E80100 clock driver in the Qualcomm defconfig.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20241118-topic-x1e80100-clk-v1-2-8841e87ad81f@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Add Clock driver for the GCC block found in the X1E80100 SoC.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Tested-by: Caleb Connolly <caleb.connolly@linaro.org> # Yoga Slim 7x
Link: https://lore.kernel.org/r/20241118-topic-x1e80100-clk-v1-1-8841e87ad81f@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Introduce a defconfig for the Ride R3 and other QCS9100 boards with a
dedicated uefi partition. These can replace EDK2 entirely with U-Boot.
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Link: https://lore.kernel.org/r/20250110050817.3819282-7-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Enable the SA8775P clock driver in the Qualcomm defconfig.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20250110050817.3819282-6-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Copy PHY tables over from Linux to support SA8775.
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tag/?h=v6.13-rc6
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20250110050817.3819282-5-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Add initial set of clocks and resets for enabling U-Boot on QCS9100
based Ride platforms.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20250110050817.3819282-4-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Add initial support for the QCS9100 (derived from SA8775p) Ride platforms.
Define memory layout statically.
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20250110050817.3819282-3-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Add device tree support for the QCS9100 Ride and Ride Rev3 boards. The
QCS9100 is a variant of the SA8775p, and they are fully compatible with
each other. The QCS9100 Ride/Ride Rev3 board is essentially the same as
the SA8775p Ride/Ride Rev3 board, with the QCS9100 SoC mounted instead
of the SA8775p.
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>
Link: https://lore.kernel.org/r/20240911-add_qcs9100_support-v2-4-e43a71ceb017@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
[ upstream commit: 7dcc1dfaa3d1cd3aafed2beb7086ed34fdb22303 ]
(cherry picked from commit db6231faa8ef46e5ff5d5ece0c930a07c6358562)
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Link: https://lore.kernel.org/r/20250110050817.3819282-2-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Weijie Gao <weijie.gao@mediatek.com> says:
This patch series migrates MediaTek MT7629 to OF_UPSTREAM
Changes in v2:
* Remove mt7629-rfb.dtb from arch/arm/dts/Makefile
* Add wdt-reboot node to make reset command work
Link: https://lore.kernel.org/r/cover.1736851116.git.weijie.gao@mediatek.com
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david regan <dregan@broadcom.com> says:
Updates for Broadcom bcmbca devices,
make use of OF_UPSTREAM which uses Linux dts,
update bcmbca dts to current nand node naming convention,
enable basic nand functionality for bcmbca devices.
Link: https://lore.kernel.org/r/20250114045425.148801-1-dregan@broadcom.com
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Add defconfig & devicetree for IBM SBP1 board BMC based on AST2600 SoC.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Naresh Solanki <naresh.solanki@9elements.com>
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Move differences in DT files between upstream Linux DT and U-Boot DT to
mt7629-rfb-u-boot.dtsi.
Remove old copies of mt7629-related clock bindings, .dts, and .dtsi files.
Update defconfig to switch the whole mt7629 SoC to use OF_UPSTREAM.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
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The clock definitions in mt7629-clk.h indicate that CLK_PERIBUS_SEL is the
first element in the pericfg clock tree and also serves as a clock mux,
unlike other clocks belonging to the clock gate in pericfg.
This make the clock consumer get a wrong clock gate during request a clock
from <&pericfg>.
Since CLK_PERIBUS_SEL clock is not required in U-Boot, add a clock gate
offset for the pericfg clock tree to resolve this problem.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
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Enable rudimentary nand read/write capability.
Changes in v2:
- New patch in series added enabling of nand functionality
Signed-off-by: david regan <dregan@broadcom.com>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Anand Gore <anand.gore@broadcom.com>
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Update bcmbca dts to current nand node naming convention.
Changes in v2:
- Removed addition of nand-on-flash-bbt parameter
Signed-off-by: david regan <dregan@broadcom.com>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Anand Gore <anand.gore@broadcom.com>
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Make use of OF_UPSTREAM which uses Linux dts.
Changes in v2:
- Removed enabling of nand functionality
Signed-off-by: david degan <dregan@broadcom.com>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Anand Gore <anand.gore@broadcom.com>
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OSPI flash writing was broken on am62x SKs as the OSPI flash device has a
256k sector size but was set to 20k. This breaks OSPI flash writes because
the current implementation of the SF DFU backend requires that the DFU data
buffer size be the same as the sector erase size, and the USB DFU config
fragment (for both A53 and R5) reduced the size of the DFU data buffer,
presumably so that it can fit into SPL's much smaller heap.
Change the SYS_DFU_DATA_BUF_SIZE to the erase sector size, which still fits
within the post-relocation heap size in SPL.
Fixes: dfc2dff5a844 ("configs: am62x_evm_*: Enable USB and DFU support")
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
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When using the ACPI tables supplied by QEMU, we don't need to build the
FADT and MADT tables in U-Boot.
This patch avoids a build failure
make qemu-riscv64_smode_defconfig acpi.config
riscv64-linux-gnu-ld.bfd: lib/acpi/acpi_table.o:
in function `acpi_write_fadt':
lib/acpi/acpi_table.c:265:(.text.acpi_write_fadt+0x15c):
undefined reference to `acpi_fill_fadt'
riscv64-linux-gnu-ld.bfd: lib/acpi/acpi_table.o:
in function `acpi_write_madt':
lib/acpi/acpi_table.c:294:(.text.acpi_write_madt+0x52):
undefined reference to `acpi_fill_madt'
Fixes: f5f7962091e4 ("acpi: x86: Write FADT in common code")
Fixes: 4a3fc0f525da ("acpi: x86: Move MADT to common code")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
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Tom Rini <trini@konsulko.com> says:
One problem we have today is how the BLK symbol is set and used in
Kconfig files. Part of the challenge is that we use it as a gating
symbol for "we have a block device" and also for "enable block device
library code". What this series does is move to always use "select BLK"
by block drivers (a few were and a few others had it the inverse) and
then "depends on BLK" for functionality that needs a block device
present. The end result of this series is that a number of platforms
which had disabled EFI_LOADER now don't ask for it (they have no block
device) and espresso7420 has a regression about MMC support fixed. With
v2 of this I've picked up the review tags from v1 and also reworded the
body of the commit in the first patch.
Link: https://lore.kernel.org/r/20250115012322.215243-1-trini@konsulko.com
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Now that block drivers are all selecting the BLK symbol, there's no need
for other options to be select'ing BLK so that other required
functionality can be enabled. Remove these places.
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
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In the case of MTD_BLOCK and UBI_BLOCK they should be select'ing BLK as
they provide block device functionality and not depending on some other
block device already being enabled too (as is the typical case).
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
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The BLK symbol has a few meanings, one of which is that it controls the
driver model portion of a "block device". Rather than having this hidden
symbol be "default y if ..." it should be select'd by the various block
subsystems. Symbols such as PVBLOCK which already select'd BLK are
unchanged".
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
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In reworking the BLK usage in Kconfig, I found there's a few issues with
EFI_LOADER=y and BLK=n. In general, we can easily say that
lib/efi_loader/efi_file.c also should only be built with CONFIG_BLK.
That however leaves the bootmgr code, eficonfig code and then parts of
efi_device_path.c, efi_boottime.c and efi_setup.c which functionally
depend on BLK. While these calls can be if'd out, I'm unsure if the
result is usable. So rather than leave that buildable and imply that it
is, I'm leaving that combination non-buildable and commenting that
EFI_LOADER depends on BLK in the Kconfig currently.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
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At this point in time, DM is always enabled. So if MMC is enabled, it
should select DM_MMC. No drivers need to depend on DM_MMC being enabled
now, so remove that from dependency lists. This now means that a number
of platforms which select'd DM_MMC need to select MMC instead. This also
fixes a migration problem with espresso7420 in that MMC is built again
with the platform.
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
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At this point in time, we know that with the MMC symbol enabled we will
always also have the BLK symbol enabled, so we do not need to list that
as a dependency for MMC drivers.
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/24263
- Add i.MX95 EMDIO support
- Guard binman nodes with CONFIG_OPTEE on imx8m
- Enable CAAM in phycore-imx8mp SPL.
- Fix Fix NULL dereference in imx_pinctrl_probe().
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Delete tifs DT node as part of fixup.
TISCI API reported msmc_size, does not include 64KB reserved size for
tifs aka MSMC comms memory, see documentation[0].
As part of fixup, original code uses TISCI API reported msmc_size as
size for SRAM DT node.
tifs node is similar to l3-cache, which should hold address above
msmc_size, and should be deleted before passing control to OS.
[0] https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/general/core.html?highlight=msmc#tisci-msg-query-msmc
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
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Include k3_rproc.env to access rproc boot commands and specify rproc
firmware names for adding remoteproc support in J722S SoCs.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
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The default value for the mux to select the parent clock,
AUDIO_REFCLK1_CTRL_CLK_SEL is '11111' (31) but the mux input for 31
is marked as 'Reserved' so the ti-sci-clk call for get-parent fails.
Mark it to a valid value, '11100' (28) for MAIN_PLL4_HSDIV2_CLKOUT
to get rid of the linux failures during boot-time like:
"[ 1.573193] ti-sci-clk 44083000.system-controller:clock-controller:
get-parent failed for dev=157, clk=34, ret=-19"
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
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Upstream development stopped 2012.
Linux eliminated YAFFS2 in 2010.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Enable CAAM in spl.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
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