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2022-04-04sunxi: H3: fix non working console on uart2Angelo Dureghello
Fix non working console on uart2, that seems releated to both Allwinner H2+ and H3. Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com> [Andre: remove H2+, rearrange pin setup order] Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04Add ethernet0 alias in Nanopi NEO's device treeBaltazár Radics
This syncs the sun8i-h3-nanopi-neo.dts from the Linux tree, from tag v5.18-rc1. The alias is required to enable automatic MAC address generation. Signed-off-by: Baltazár Radics <baltazar.radics@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04i2c: sun8i_rsb: Add support for DM clocks and resetsSamuel Holland
Currently, clock/reset setup for this device is handled by a platform-specific function and is intermixed with non-DM pinctrl setup. Use the devicetree to get clocks/resets, which disentagles it from the pinctrl setup in preparation for moving to DM_PINCTRL. This also has the added benefit of picking the right clock/reset bits for H6 and new SoCs that have a rearranged PRCM MMIO space. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04i2c: sun8i_rsb: Initialize chips in .child_pre_probeSamuel Holland
Chips attached to the RSB bus require an initialization command before they can be used. (Specifically, this command programs the chip's runtime address.) The driver does this in its .probe_chip hook, under the assumption that .probe_chip is called during child probe. This is not the case; .probe_chip is only called by dm_i2c_probe, which is intended for use by board-level code, not for chips with OF nodes. Since this initialization command must be run before a child chip can be used, do it before probing each child. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04i2c: sun6i_p2wi: Add support for DM clocks and resetsSamuel Holland
Currently, clock/reset setup for this device is handled by a platform-specific function and is intermixed with non-DM pinctrl setup. Use the devicetree to get clocks/resets, which disentagles it from the pinctrl setup in preparation for moving to DM_PINCTRL. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04i2c: sun6i_p2wi: Initialize chips in .child_pre_probeSamuel Holland
Chips attached to the P2WI bus require an initialization command before they can be used. (Specifically, this switches the chip from I2C mode to P2WI mode.) The driver does this in its .probe_chip hook, under the assumption that .probe_chip is called during child probe. This is not the case; .probe_chip is only called by dm_i2c_probe, which is intended for use by board-level code, not for chips with OF nodes. Since this initialization command must be run before a child chip can be used, do it before probing each child. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04sunxi: Support building a SPL as a TOC0 imageSamuel Holland
Now that mkimage can generate TOC0 images, and the SPL can interpret them, hook up the build infrastructure so the user can choose which image type to build. Since the absolute load address is stored in the TOC0 header, that information must be passed to mkimage. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04sunxi: Support SPL in both eGON and TOC0 imagesSamuel Holland
SPL uses the image header to detect the boot device and to find the offset of the next U-Boot stage. Since this information is stored differently in the eGON and TOC0 image headers, add code to find the correct value based on the image type currently in use. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04tools: mkimage: Add Allwinner TOC0 supportSamuel Holland
Most Allwinner sunxi SoCs have separate boot ROMs in non-secure and secure mode. The "non-secure" or "normal" boot ROM (NBROM) uses the existing sunxi_egon image type. The secure boot ROM (SBROM) uses a completely different image type, known as TOC0. A TOC0 image is composed of a header and two or more items. One item is the firmware binary. The others form a chain linking the firmware signature to the root-of-trust public key (ROTPK), which has its hash burned in the SoC's eFuses. Signatures are made using RSA-2048 + SHA256. The pseudo-ASN.1 structure is manually assembled; this is done to work around bugs/quirks in the boot ROM, which vary between SoCs. This TOC0 implementation has been verified to work with the A50, A64, H5, H6, and H616 SBROMs, and it may work with other SoCs. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04sunxi: specify architecture when generating SPL boot imageIcenowy Zheng
As mkimage -T sunxi_egon now gains support for -A parameter, specify the architecture when generating SPL boot image for sunxi. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04mkimage: sunxi_egon: add support for riscvIcenowy Zheng
There's now a sun20i family in sunxi, which uses RISC-V CPU. Add support for making eGON.BT0 image for RISC-V. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04mkimage: sunxi_egon: refactor for multi-architecture supportIcenowy Zheng
Refactor some functions in mkimage sunxi_egon type, in order to prepare for adding support for more CPU architectures (e.g. RISC-V). In addition, compatibility for operation w/o specified architecture is kept, in this case the architecture is assumed as ARM. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04mkimage: add a flag to describe whether -A is specifiedIcenowy Zheng
The sunxi_egon type used to take no -A argument (because we assume sunxi targets are all ARM). However, as Allwinner D1 appears as the first RISC-V sunxi target, we need to support -A; in addition, as external projects rely on U-Boot mkimage to generate sunxi eGON.BT0 header, we need to keep compatibility with command line without -A. As the default value of arch in mkimage is not proper (IH_ARCH_PPC instead of IH_ARCH_INVALID), to keep more compatibility, add an Aflag field to image parameters to describe whether an architecture is explicitly specified. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04spi: sun4i_spi: Remove non-DM pin setupSamuel Holland
This is now handled automatically by the pinctrl driver. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04pinctrl: sunxi: Add SPI0 pinmuxesSamuel Holland
Pin lists and mux values were taken from the Linux drivers. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04pwm: sunxi: Remove non-DM pin setupSamuel Holland
This is now handled automatically by the pinctrl driver. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04pinctrl: sunxi: Add the A64 PWM pinmuxSamuel Holland
This is the only possible mux setting for the A64's PWM peripheral. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04sunxi: Remove non-DM MMC pin setupSamuel Holland
This is now handled automatically by the pinctrl driver. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04pinctrl: sunxi: Add MMC pinmuxesSamuel Holland
Pin lists and mux values were taken from the Linux drivers. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04i2c: sun8i_rsb: Only do non-DM pin setup for non-DM I2CSamuel Holland
When the DM_I2C driver is loaded, the pin setup is done automatically from the device tree by the pinctrl driver. Clean up the code in the process: remove #ifdefs and recognize that the pin configuration is the same for all sun8i/sun50i SoCs, not just those which select CONFIG_MACH_SUN8I. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04i2c: sun6i_p2wi: Only do non-DM pin setup for non-DM I2CSamuel Holland
When the DM_I2C driver is loaded, the pin setup is done automatically from the device tree by the pinctrl driver. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04sunxi: Remove options and setup code for I2C2-I2C4Samuel Holland
These options are not currently enabled anywhere. Any new users should use DM clocks and pinctrl. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04pinctrl: sunxi: Add I2C pinmuxesSamuel Holland
Where multiple options were available, the one matching board.c and the device trees was chosen. Pin lists and mux values were taken from the Linux drivers. Signed-off-by: Samuel Holland <samuel@sholland.org> [Andre: fixup H5 I2C1 pinmux] Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04net: sun8i_emac: Remove non-DM pin setupSamuel Holland
This is now handled automatically by the pinctrl driver. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04pinctrl: sunxi: Add sun8i EMAC pinmuxesSamuel Holland
Pin lists and mux values were taken from the Linux drivers. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04sunxi: Remove non-DM GMAC pin setupSamuel Holland
This is now handled automatically by the pinctrl driver. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04pinctrl: sunxi: Add sunxi GMAC pinmuxesSamuel Holland
Pin lists and mux values were taken from the Linux drivers. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04net: sunxi_emac: Remove non-DM pin setupSamuel Holland
This is now handled automatically by the pinctrl driver. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04pinctrl: sunxi: Add sun4i EMAC pinmuxesSamuel Holland
Pin lists and mux values were taken from the Linux drivers. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04pinctrl: sunxi: Add UART pinmuxesSamuel Holland
This includes UART0 and R_UART (s_uart) on all supported platforms, plus the additional UART configurations from arch/arm/mach-sunxi/board.c. Pin lists and mux values were taken from the Linux drivers. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04sunxi: pinctrl: Implement pin configurationSamuel Holland
The sunxi pinctrl hardware has bias and drive control. Add driver support for configuring those options. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04sunxi: pinctrl: Implement get_pin_muxing functionSamuel Holland
The pinmux command uses this function to display pinmux status. Since the driver cannot map pin numbers to a list of supported functions, only functions which are common across all pins can be reported by name. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04sunxi: pinctrl: Implement pin muxing functionsSamuel Holland
Implement the operations to get pin and function names, and to set the mux for a pin. The pin count and pin names are calculated as if each bank has the maximum number of pins. Function names are simply the index into a list of { function name, mux value } pairs. We assume all pins associated with a function use the same mux value for that function. This is generally true within a group of pins on a single port, but generally false when some peripheral can be muxed to multiple ports. For example, A64 UART3 uses mux 3 on port D, and mux 2 on port H. But all of the port D pins use the same mux value, and so do all of the port H pins. This applies even when the pins for some function are not contiguous, and when the lower-numbered mux values are unused. A good example of both of these cases is SPI0 on most SoCs. This strategy saves a lot of space (which is especially important for SPL), but where the mux value for a certain function differs across ports, it forces us to choose a single port for that function at build time. Since almost all boards use the default (i.e. reference design) pin muxes[1], this is unlikely to be a problem. [1]: See commit dda9fa734f81 ("sunxi: Simplify MMC pinmux selection") Signed-off-by: Samuel Holland <samuel@sholland.org> [Andre: add comment summarising the commit message] Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04sunxi: pinctrl: Create the driver skeletonSamuel Holland
Create a do-nothing driver for each sunxi pin controller variant. Since only one driver can automatically bind to a DT node, since the GPIO driver already requires a manual binding process, and since the pinctrl driver needs access to some of the same information, refactor the GPIO driver to be bound by the pinctrl driver. This commit should cause no functional change. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-04-04Prepare v2022.04v2022.04Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-04env: do not fail on non-existing env.in fileAndrey Zhizhikin
If include/generated/env.in does not exist, which is a typical case for clean build, quiet_cmd_gen_envp command tries to delete this file unconditionally. This produces following warning during the build: ENVP include/generated/env.in rm: cannot remove 'include/generated/env.in': No such file or directory Add '-f' option to the `rm` command to not complain if file does not exist. Fixes: f432eb6d8a9d ("env: Avoid using a leftover text-environment file") Reviewed-by: Sean Anderson <seanga2@gmail.com> Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
2022-04-01ARM: dts: colibri-imx6ull: fix mac address passingFrancesco Dolcini
colibri-imx6ull ethernet device is fec2, while the optional secondary ethernet is fec1, update the ethernet aliases in the .dts file so that ethaddr is set to fec2 and eth1addr to fec1. Without this change the ethernet interfaces have a different mac address between Linux and U-Boot. Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-03-31Merge tag 'efi-2022-04-rc6' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2022-04-rc6 Documentation: * Move VxWorks and Plan 9 to HTML documentation * Move all command man-pages to a separate directory Test: * Fix pylint errors UEFI * Fix build flags for initrddump.efi QEMU * Remove unused function to get RNG device
2022-03-31env: Avoid using a leftover text-environment fileSimon Glass
If include/generated/environment.h exists (perhaps leftover from a build of another board) it is used, even if the board currently being built does not have a text environment. This causes a build error. Fix it by emptying the file if it should not be there. Fixes: https://source.denx.de/u-boot/u-boot/-/issues/9 Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Sean Anderson <seanga2@gmail.com> Tested-by: Sean Anderson <seanga2@gmail.com>
2022-03-31efi_loader: initrddump: Actually use the custom CFLAGSAndy Shevchenko
It seems a copy'n'paste typo when tool had been introduced. It has never had the 'exit' suffix in the file name. Hence, the custom CFLAGS never been applied and, for example, BFD linker complains: LD lib/efi_loader/initrddump_efi.so ld.bfd: lib/efi_loader/initrddump.o: warning: relocation in read-only section `.text.efi_main' ld.bfd: warning: creating DT_TEXTREL in a shared object Remove wrong 'exit' suffix from the custom CFLAGS variable. Fixes: 65ab48d69ddb ("efi_selftest: provide initrddump test tool") Fixes: 9c045a49a9c9 ("efi_loader: move dtbdump.c, initrddump.c to lib/efi_loader") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-03-31test: fix pylint warnings in test_efi_bootmgrHeinrich Schuchardt
* Use f'' strings instead of .format(). * Correct sequence of imports. * Remove a superfluous import. * Add missing documentation. * Replace yield by return. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-03-31test: fix pylint warnings for test_efi_fit.pyHeinrich Schuchardt
* fix style of argument documentation * add encoding to open() calls Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-03-31doc: usage: Convert README.plan9 to reSTBin Meng
This converts the existing README.plan9 to reST, and puts it under the doc/usage/os directory. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-03-31doc: usage: Update vxworks doc to mention RISC-V supportBin Meng
At present the doc only mentions Arm, PowerPC and x86. RISC-V support has been added since VxWorks SR0650 support for a while, and U-Boot supports loading a RISC-V VxWorks kernel too. Let's document it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-03-31doc: usage: Convert README.vxworks to reSTBin Meng
This converts the existing README.vxworks to reST, and puts it under the doc/usage/os directory. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-03-31doc: usage: Update the extension command titleBin Meng
Update the extension command title for consistency with other commands. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-03-31doc: usage: Group all shell command docs into cmd/ sub-directoryBin Meng
Currently all shell command docs are put in the doc/usage root. Let's group them into cmd/ sub-directory. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-03-31doc: mmc devPatrick Delaunay
Provide human readable descriptions of the speed nodes instead of the name of constants from the code as it is already done for 'mmc rescan' command in commit 212f078496e4 ("doc: mmc rescan speed mode"). Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Aswath Govindraju <a-govindraju@ti.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-03-31qemu: arm: Remove platform specific function to get RNG deviceSughosh Ganu
The QEMU platform has a function defined to get the random number generator(RNG) device. However, the RNG device can be obtained simply by searching for a device belonging to the RNG uclass. Remove the superfluous platform function defined for the QEMU platform for getting the RNG device. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-31Merge branch '2022-03-31-critical-fixes'Tom Rini
- Fixes for 2 gateworks platforms, Edison platform, incorrectly showing 2 logos on LCD screens, not cleaning a generated environment file and correct the CONFIG_SYS_IMMR Kconfig migration on a number of MPC85xx platforms.
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