summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2021-08-11Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- Convert GoFlex Home Ethernet and SATA to Driver Model (Tony) - mvebu: Automatically detect CONFIG_SYS_TCLK (Pavel) - mvebu: sata_mv: Fix HDD identication during cold start (Tony) - a37xx: pci: Fix handling PIO config error responses (Pavel) - Other minor misc changes and board maintainer updates
2021-08-11Merge tag 'u-boot-amlogic-20210810' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-amlogic - odroid-n2: fix fdtfile suffix for n2-plus - sei610 & meson64_android cleanups to prepare android 11 boot support - use Android BCB mechanism for reboot reason instead of HW reboot flag - Switch meson64_android boot flow to use abootimg for A/B, AVB and DTBO support
2021-08-11arm: kirkwood: Goflex Home: Update board maintainerTony Dinh
Change maintainer to me. Suriyan no longer has this board and wishes to see someone maintaining it actively. Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11arm: kirkwood: Dockstar: Update board maintainerTony Dinh
Change maintainer to me. Eric no longer has this board and wishes to see someone maintaining it actively. Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11arm: mvebu: Hang if ddr3_init() failsPali Rohár
If ddr3_init() fails then DDR was not initialized and we cannot load and execute U-Boot. We cannot continue, we cannot do anything in this case, so hang. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11arm: a37xx: pci: Fix handling PIO config error responsesPali Rohár
Returning fabricated CRS value (0xFFFF0001) by PCIe Root Complex to OS is allowed only for 4-byte PCI_VENDOR_ID config read request and only when CRSSVE bit in Root Port PCIe device is enabled. In all other error PCIe Root Complex must return all-ones. So implement this logic in pci-aardvark.c driver properly. aardvark HW does not have Root Port PCIe device and U-Boot does not implement emulation of this device. So expect that CRSSVE bit is set as U-Boot can already handle CRS value for PCI_VENDOR_ID config read request. More callers of pci_bus_read_config() function in U-Boot do not check for return value, but check readback value. Therefore always fill readback value in pcie_advk_read_config() function. On error fill all-ones of correct size as it is required for PCIe Root Complex. And also correctly propagates error from failed config write request to return value of pcie_advk_write_config() function. Most U-Boot callers ignores this return value, but it is a good idea to return correct value from function. These issues about return value of failed config read requests, including special handling of CRS were reported by Lorenzo and Bjorn for Linux kernel driver pci-aardvark together with quotes from PCIe r4.0 spec, see details: https://lore.kernel.org/linux-pci/20210624213345.3617-1-pali@kernel.org/t/#u Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11arm: mvebu: sata_mv failed to identify HDDs during cold startTony Dinh
During cold start, with some HDDs, mv_sata_identify() does not populate the ID words on the 1st ATA ID command. In fact, the first ATA ID command will only power up the drive, and then the ATA ID command processing is lost in the process. Tests with: - Seagate ST9250320AS 250GB HDD and Seagate ST4000DM004-2CV104 4TB HDD. - Zyxel NSA310S (Kirkwood 88F6702), Marvell Dreamplug (Kirkwood 88F6281), Seagate GoFlex Home (Kirkwood 88F6281), Pogoplug V4 (Kirkwood 88F6192). Observation: - The Seagate ST9250320AS 250GB took about 3 seconds to spin up. - The Seagate ST4000DM004-2CV104 4TB took about 8 seconds to spin up. - mv_sata_identify() did not populate the ID words after the call to mv_ata_exec_ata_cmd_nondma(). - Attempt to insert a long delay of 30 seconds, ie. mdelay(30_000), after the call to ata_wait_register() inside mv_ata_exec_ata_cmd_nondma() did not help with the 4TB drive. The ID words were still empty after that 30s delay. Patch Description: - Added a second ATA ID command in mv_sata_identify(), which will be executed if the 1st ATA ID command did not return with valid ID words. - Use the HDD drive capacity in the ID words as a successful indicator of ATA ID command. - In the scenario where a box is rebooted, the 1st ATA ID command is always successful, so there is no extra time wasted. - In the scenario where a box is cold started, the 1st ATA command is the power up command. The 2nd ATA ID command alleviates the uncertainty of how long we have to wait for the ID words to be populated by the SATA controller. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Tony Dinh <mibodhi@gmail.com>
2021-08-11arm: kirkwood: Do not overwrite CONFIG_SYS_TCLKPali Rohár
Config option CONFIG_SYS_TCLK is set by kw88f6281.h and kw88f6192.h files to correct SOC/platform value. So do not overwrite it in board config include files. Kirkwood 88F6180 and 88F6192 uses 166 MHz TCLK and Kirkwood 88F6281 uses 200 MHz TCLK. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11arm: mvebu: axp: Set CONFIG_SYS_TCLK globallyPali Rohár
This mvebu axp platform always uses fixed 250 MHz TCLK. So specify this CONFIG_SYS_TCLK option in msys section of global file soc.h file instead of manual configuration in every board file. Now every #if-#else case of soc.h file defines CONFIG_SYS_TCLK, so remove useless default CONFIG_SYS_TCLK value from the end of soc.h file. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11arm: mvebu: msys: Set CONFIG_SYS_TCLK globallyPali Rohár
This mvebu msys platform always uses fixed 200 MHz TCLK. So specify this CONFIG_SYS_TCLK option in msys section of global file soc.h file instead of manual configuration in every board file. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11arm: mvebu: a37x: Detect CONFIG_SYS_TCLK from SAR registerPali Rohár
Bit 20 in SAR register specifies if TCLK is running at 200 MHz or 166 MHz. Use this information instead of manual configuration in every board file. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11arm: mvebu: a38x: Detect CONFIG_SYS_TCLK from SAR registerPali Rohár
Bit 15 in SAR register specifies if TCLK is running at 200 MHz or 250 MHz. Use this information instead of manual configuration in every board file. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11arm: kirkwood: GoFlex Home: Use Ethernet PHY name and address from device treeTony Dinh
In DM Ethernet, the old "egiga0" name is no longer valid, so replace these with Ethernet PHY names from device tree. Also, read Ethernet PHY address from device tree. Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11arm: kirkwood: GoFlex Home: Add DM SATA configsTony Dinh
Enable DM SATA in board file. Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-11arm: kirkwood: GoFlex Home: Add DM Ethernet, remove IDE, and add DM SATA configsTony Dinh
Add DM_ETH, SATA_MV and associated configs to goflexhome_defconfig. Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-08-10configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-10configs: sei510/610: android bootflow via abootimgGuillaume La Roque
Activate the following Kconfig options: * AVB for Android Verified Boot support * ADTIMG for merging DTBOs * ABOOTIMG for extracting Android boot image Also rework the partitioning tables: - add a misc partition to handle BCB messages - add a dtbo partition to store various DTBOs - add a vbmeta partition for AVB hashes - Merge vendor and system into the "super" partition Note: avb support is disables by default. To activate it: => setenv force_avb 1; => saveenv; Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-08-10configs: sei510/sei610: don't use hard-coded gpt uuidsMattijs Korpershoek
doc/README.gpt states: > The fields 'uuid' and 'uuid_disk' are optional if CONFIG_RANDOM_UUID is > enabled. A random uuid will be used if omitted or they point to an empty/ > non-existent environment variable. The environment variable will be > set to the generated UUID. The 'gpt guid' command reads the current > value of the uuid_disk from the GPT. Since we have CONFIG_RANDOM_UUID=y, remove the hard-coded uuids and use meaningful variable names instead. Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-08-10configs: sei510/sei610: reformat PARTS_defaultMattijs Korpershoek
There is a mix of spaces and tabs at the leading \. This makes updating theses lines harder. Add a single space before each \ for some consistency. Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-08-10configs: meson64_android: boot android via abootimgGuillaume La Roque
Since Android 10, we are required to use a "dtbo" partition which includes the various device-tree overlays [1]. It's also possible to provide a "dtb" partition. This is supported via the "abootimg" command. On Yukawa, the assumption is that we have only a "dtbo" partition, which includes all board dtbs and their dtbos [2] [1] https://source.android.com/devices/architecture/dto/partitions [2] https://android.googlesource.com/device/amlogic/yukawa/+/refs/heads/master/build/tasks/dtimages.mk#16 Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-08-10configs: meson64_android: define BOOT_CMD macroMattijs Korpershoek
BOOT_CMD might be different based on CONFIG_CMD_ABOOTIMG. To prepare for abootimg support, extract the boot command to a dedicated macro. Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-08-10configs: meson64_android: implement A/B slot supportMattijs Korpershoek
Implement A/B slot selection using the U-Boot ab_select command. Keep support for non A/B. Not: We need to redefine the recovery partition label, as RecoveryOS is included in the boot image for A/B systems [1] [1] https://source.android.com/devices/tech/ota/ab/ab_implement#recovery Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-08-10configs: meson64_android: implement AVB supportMattijs Korpershoek
AVB (Android Verified Boot) is well supported in U-Boot already. Add support for it in meson64_android. This is controlled by the "force_avb" environment variable and the CONFIG_CMD_AVB option. Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-08-10configs: meson64_android: increase SYS_MALLOC_LEN to 128M for AVBMattijs Korpershoek
To prepare for AVB support, increase SYS_MALLOC_LEN to 128M. This value has been found by testing the following on khadas vim3l: => avb init => avb verify Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-08-10configs: meson64: permit redefining SYS_MALLOC_LENMattijs Korpershoek
Permit redefining SYS_MALLOC_LEN for board specific configs. This is especially useful for Android with AVB, which requires a malloc length of 128M. Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-08-10board: amlogic: odroid-n2: fix fdtfile suffix for n2-plusChristian Hewitt
The N2+ dtb is meson-g12b-odroid-n2-plus.dtb, not n2_plus, so correct the suffix provided in the board file. Also align the board ident string shown during boot to match. Fixes: 8bc780106c13 ("board: amlogic: odroid: add runtime detection of the N2/N2+/C4/HC4 variants") Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-08-09Merge tag 'u-boot-imx-20210809' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20210809 - new SOC: add support for imx8ulp - Toradex fixes for colibri (vf / imx6 / imx7 / imx8x) - convert to DM for mx28evk - Fixes for Gateworks ventana boards CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/8639
2021-08-09Merge tag 'dm-pull-8aug21' of https://source.denx.de/u-boot/custodians/u-boot-dmTom Rini
Use log subsystem for dm_warn() Various minor bug fixes
2021-08-09imx: cmd: use struct cmd_tblPeng Fan
cmd_tbl_t is removed, need use struct cmd_tbl Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx: add i.MX8ULP EVK supportPeng Fan
Add i.MX8ULP EVK basic support, support SD/I2C/ENET/LPUART Log as below: I would keep some debug info for now, and after we move to be stable and production launch, we could drop that. U-Boot SPL 2021.07-rc4-00164-gb800e19a6b (Jun 29 2021 - 10:23:30 +0800) Normal Boot upower_init: soc_id=48 upower_init: version:11.11.6 upower_init: start uPower RAM service user_upwr_rdy_callb: soc=b user_upwr_rdy_callb: RAM version:12.6 Turn on switches ok Turn on memories ok Clear DDR retention ok Poll for freq_chg_req on SIM register and change to F1 frequency. Poll for freq_chg_req on SIM register and change to F0 frequency. Poll for freq_chg_req on SIM register and change to F1 frequency. Poll for freq_chg_req on SIM register and change to F2 frequency. Poll for freq_chg_req on SIM register and change to F1 frequency. Poll for freq_chg_req on SIM register and change to F2 frequency. complete De-Skew PLL is locked and ready WDT: Not found! Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 Load image from 0x3a800 by ROM_API NOTICE: BL31: v2.4(release):imx_5.10.35_2.0.0_imx8ulp_er-10-gf37e59b94 NOTICE: BL31: Built : 01:56:58, Jun 29 2021 NOTICE: upower_init: start uPower RAM service NOTICE: user_upwr_rdy_callb: soc=b NOTICE: user_upwr_rdy_callb: RAM version:12.6 U-Boot 2021.07-rc4-00164-gb800e19a6b (Jun 29 2021 - 10:23:30 +0800) CPU: Freescale i.MX8ULP rev1.0 at 744 MHz Reset cause: POR Boot mode: Single boot Model: FSL i.MX8ULP EVK DRAM: 2 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 2 Loading Environment from MMC... *** Warning - bad CRC, using default environment In: serial@293a0000 Out: serial@293a0000 Err: serial@293a0000 Net: Warning: ethernet@29950000 (eth0) using random MAC address - 96:35:88:62:e0:44 eth0: ethernet@29950000 Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: dts: add i.MX8ULP dtsiPeng Fan
Add i.MX8ULP dtsi Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09ddr: Add DDR driver for iMX8ULPYe Li
Add iMX8ULP DDR initialization driver which loads the DDR timing parameters and executes the training procedure. When enabling IMX8ULP_DRAM_PHY_PLL_BYPASS, using PHY PLL bypass mode to do DDR init Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09imx8ulp: add upower api supportPeng Fan
Add upower api support, this is modified from upower firmware exported package. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09imx8ulp: move struct mu_type to common headerPeng Fan
Move struct mu_type to common header to make it reusable by upower and S400 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09imx8ulp: Add workaround for eMMC bootYe Li
When booting from boot part1/2, the image offset should be 0, but ROM has a bug to return 0x8000. Has to workaround the issue before ROM fix it. Use a ROM function to know boot from emmc boot part or user part So we can set the image offset accordingly. Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09imx8ulp: Use DGO_GP5 to get boot configYe Li
Since CMC1 MR0 only reflects high 16 bits boot cfg used for AP domian, it does not connect to low 16 bits for RTD. So we can't get the correct boot mode. Change to use DGO_GP5 of SEC_SIM which is set by ROM. Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09imx8ulp: soc: correct reset causePeng Fan
The CMC1 SRS reflects the current reset cause, not SSRS. Then you could get "Reset cause: WARM-WDG" when issue reset in U-Boot. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09driver: misc: imx8ulp: Add fuse driver for imx8ulpYe Li
This driver uses FSB to read some fuses, but not support program fuse. It only works in SPL (secure mode), u-boot needs traps to ATF to read them. Some fuses can read from S400 API and others are from FSB. Also support program some fuses via S400 API Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09arm: imx8ulp: add iomuxc supportPeng Fan
Add i.MX8ULP iomuxc support Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx8ulp: add dummy imx_get_mac_from_fusePeng Fan
Add imx_get_mac_from_fuse for enet build pass Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx8ulp: Allocate DCNANO and MIPI_DSI to AD domainYe Li
Configure DCNANO and MIPI_DSI to be controlled by AD for single boot Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: iMX8ULP: Add boot device relevant functionsYe Li
Read from ROM API to get current boot device. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx8ulp: Probe the S400 MU device in arch initYe Li
Need probe the S400 MU device in arch_cpu_init_dm, so we can use S400 API in u-boot Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09imx8ulp: unify rdc functionsPeng Fan
Unify rdc function to rdc.c Update soc.c to use new rdc function Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx8ulp: release trdc and assign lpav from RTD to APDPeng Fan
Rlease LPAV from RTD to APD Release gpu2D/3D to APD Set TRDC MBC2 MEM1 for iomuxc0 access Since upower depends AP/M33 SW to configure IOMUX for its PMIC i2c and MODE pins. we have to open iomuxc0 access for A35 core (domain 7) in single boot. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09arm: imx8ulp: add trdc release requestPeng Fan
Add TRDC release request, then we could configure resources to be accessible by A35 Domain. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx8ulp: add rdc supportPeng Fan
There is xrdc inside i.MX8ULP, we need to configure permission to make sure AP non-secure world could access the resources. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx8ulp: release and configure XRDC at early phaseYe Li
Since S400 will set the memory of SPL image to R/X. We can't write to any data in SPL image. 1. Set the parameters save/restore only for u-boot, not for SPL. to avoid write data. 2. Not use MU DM driver but directly call MU API to send release XRDC to S400 at early phase. 3. Configure the SPL image memory of SRAM2 to writable (R/W/X) Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09drivers: misc: s400_api: Update API for fuse read and writeYe Li
Add API to support fuse read and write Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09drivers: misc: imx8ulp: Update S400 API for release RDCYe Li
The RDC API is updated to add a field for XRDC or TRDC Signed-off-by: Ye Li <ye.li@nxp.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-06 17:04:39 +0000