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2022-06-24tools: relocate-rela: Add support for elf32 decodingMichal Simek
Add support for 32bit ELF format which is used by Microblaze. Also check that code runs only for Microblaze. Function finds information about rela.dyn and dynsym which will be used later for relocation. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/7491cc72fe04cbd48db014f1492ce463e91dfb42.1655299267.git.michal.simek@amd.com
2022-06-24tools: relocate-rela: Check that relocation works only for EM_AARCH64Michal Simek
Relocation support is only for EM_AARCH64 that's why check machine type to make sure that the code will never run on any unsupported one. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/36f26c8752335239344b265e5ddedad10e9cac8b.1655299267.git.michal.simek@amd.com
2022-06-24tools: relocate-rela: Extract elf64 reloc to special functionMichal Simek
Adding support for new type requires to change code layout that's why move elf64 code to own function for easier maintenance. It also solves the problem with not calling fclose in case of error. Return value from rela_elf64 is saved to variable that's why fclose() is called all the time. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/21763b80527521c85ca7d4ac64ad6ff4885409c8.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Create SYM_ADDR macro to deal with symbolsMichal Simek
Symbol handling depends on compilation flags. Right now manual relocation is used that's why symbols can be referenced just by name and there is no need to find them out. But when position independent code (PIC) is used symbols need to be described differently. That's why having one macro change is easier than changing the whole code. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/d704e9a267c8b536452fb999111dbfbc9d652be5.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Add comment about reset locationMichal Simek
Better to add comment to explain why reset vector points all the time to origin U-Boot location. If reset happens U-Boot should start from it's origin location. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/5ca6341b7487708247fe2948d7e496ea6f7c2e02.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Remove _start symbol handling at U-Boot startMichal Simek
Right now U-Boot runs all the time from the same address where it is loaded but going to full relocation code starting address doesn't need to be fixed and can be simply discovered from reading PC register. That's why use r20 to get PC address and subtract offset from the beginning to get starting address. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/044b727c33dfbe662f68512d0da0775a4805f360.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Remove code around r20 in relocate_code()Michal Simek
r20 is not used that's why remove logic around it. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1b32bab5c050d099b2f6d49bc4896322ed03d788.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Optimize register usage in relocate_codeMichal Simek
There are additional operations which can be done simpler that's why improve logic around relocation address r7 handling and _start symbol. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c8b60f72f1605c2ba6b4b7be1893d7e6ec3d8597.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Change stack protection address to new stack addressMichal Simek
SLR low address is still setup to 0 that's why only high limit should be updated. STACK_SIZE macro is present and could be possible used for low address alignment but it is not done by this patch. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c00cb843df848703b760a65934ed3ce31fafcf19.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Separate code end substractionMichal Simek
Follow up patch will convert symbol handling that's why it is necessary to separate logic around symbols to special instruction. It adds 4B for new instruction but it is worth to do it to have code ready for for full relocation. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/030863fa9a9c1ca0a9b082fe498522da09189fbc.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Enable REMAKE_ELFMichal Simek
Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul relocation. Enable option for big endian configuration but it is not used too much that's why it is completely untested. By supporting this system there is a need to define LITTLE/BIG endian Kconfig options to pass -EL/-EB flags. Full command line for u-boot.elf recreation looks like this: microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \ -O elf32-microblazeel u-boot.bin u-boot-elf.o Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com
2022-06-24mips: Move endianness selection to arch/KconfigMichal Simek
This option will be used by Microblaze that's why move it to generic location to be able to use it. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Fix typo in exception.cMichal Simek
Trivial fix. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c4ede6dc738c5bd7c518f3bb2c9410b15c102e20.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Remove CONFIG_TEXT_BASE from codeMichal Simek
Use symbol instead macro to find where U-Boot starts. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/d5d4c201bee6171e85b47783d916387d84db0456.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Fix early stack allocationMichal Simek
CONFIG_SYS_INIT_SP_OFFSET macro place stack to TEXT_BASE - SYS_MALLOC_F_LEN but there is no reason to do it now because board_init_f_alloc_reserve() returns exact location where stack should be. That's why stack location is calculated at run time and there is no need to hardcode it via macro. This change will help with placing U-Boot to any address. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e9aee69646e022fd8a96cbee2d2a07ab81fb6e05.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Fix stack protection behaviorMichal Simek
When U-Boot starts stack protection can be already enabled that's why setup the lowest possible SLR value which is address 0. And the highest possible stack in front of U-Boot. That's why you should never load U-Boot to the beginning of DDR. There must be some space reserved. Code is using this location for early malloc space, early global data and stack. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/86b9748bad12142659804d6381bc6bbf20be44f1.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Switch absolute branches to relativeMichal Simek
There is no reason to use absolute branches and use just relative. This change helps with moving binary to different location and start it from there. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/83a5103b85c1c2220cd3ab4d5365169c6660e40a.1655299267.git.michal.simek@amd.com
2022-06-24tools: relocate-rela: Read rela start/end directly from ELFMichal Simek
There is no need to pass section information via parameters. Let's read text base and rela start/end directly from elf. It will help with reading other information from ELF for others architecture. Input to relocate-rela is u-boot binary and u-boot ELF. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/ab7ae14a6e058722e8c608089729e98edf20a08d.1655299267.git.michal.simek@amd.com
2022-06-24tools: relocate-rela: Use global variablesMichal Simek
Declare rela_start/end and text_base as global variables. It will help with using these variables for ELF decoding. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/7485b163e92f8f3f754c35f7c88c3314f2212efd.1655299267.git.michal.simek@amd.com
2022-06-24Makefile: Fix description for relocate-rela parametersMichal Simek
Numbers in comment are shifter which is visible from command which calls them. Also relocate-rela usage is describing them. "Usage: %s <bin file> <text base> <rela start> <rela end>" Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/bb0287b9071eb33eea0cf914a7128c2603684377.1655299267.git.michal.simek@amd.com
2022-06-24tools: relocate-rela: Open binary u-boot file laterMichal Simek
There is no value to open u-boot binary file so early. Better to check all values first and then open binary file. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/9c2b4ebadbe83497db28af02f6af2623793ffdb6.1655299267.git.michal.simek@amd.com
2022-06-24arm64: zynqmp: Fix tps544/u3007 node descriptionMichal Simek
u3007 is removed in zynqmp-m-a2197-02-revA board and on zynqmp-m-a2197-03-revA it was renamed to v3022 at address 0x18. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/f477796bcca6fce09168699a0498d792f4a54acf.1655287013.git.michal.simek@amd.com
2022-06-24arm64: zynqmp: Update tps53681 i2c addressMichal Simek
TI manual (https://www.ti.com/lit/gpn/TPS53681) is saying that i2c address is 7bit where c0h is 1100000 which is 0x60. This will fix issues reported by make dtbs that 0xc0 is above 7bit regular i2c address range. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/2f50c1cd258f6b05deb2a6a9af7fa92952f3f8cb.1655287013.git.michal.simek@amd.com
2022-06-24arm64: zynqmp: Fix i2c addresses for vck190 SCMichal Simek
si570 is normally at 0x5d address and address is not aligned with address in node. 8T49N240 can't be at 0xd8 that's why it is shifter by one bit. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/4fa86fffa9cb8abe633fbc5a9c55bea249b5edfb.1655287013.git.michal.simek@amd.com
2022-06-24pinctrl: zynqmp: Add support for output-enable and bias-high-impedanceAshok Reddy Soma
Add support to handle 'output-enable' and 'bias-high-impedance' configurations. DT property output-enable brings out the pins from tri-state, whereas bias-high-impedance changes the pins state to tri-state. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1a02cd41d183d397ebce23c497178281c7286692.1655286745.git.michal.simek@amd.com
2022-06-24arm64: zynqmp: Enable DP for kv260-revA boardMichal Simek
DP is enabled for revB and should be enabled for kv260-revA too. Changes in other boards were done by commit 8b82a3a7feb0 ("arm64: zynqmp: Enable DP driver for SOMs"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/4e273bce3a8acf4495b67b702b1704acec8d9ccb.1654779436.git.michal.simek@amd.com
2022-06-24xilinx: zynqmp: Do not use 0 as spl bss start addressStefan Herbrechtsmeier
Do not use 0 as address for memory because of the special meaning for pointers (null pointer). Change the spl bss start address to the second page. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220607074314.27125-1-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24arm64: zynqmp: Add support for kr260 revA/B boardsMichal Simek
Board is using kv260 design for couple of parts defined by spec like i2c eeproms, ina260, uart, etc. Board has 4 gems. One gem connected via PS SGMII(GT), another PS RGMII(MIO) and 2 via EMIO. First two shares the same MIO lines for PHYs. PL based one have separate EMIO lines via PL. Also two USB 3.0 with usb hubs are present. USB phys and USB hubs should have separate reset line. The first usb0 hub also has USB-SD controller (usb2244) connected to port 0. To test compatibility with k26 you can run: fdtoverlay -o /tmp/output.dtb -i arch/arm/dts/zynqmp-sm-k26-revA.dtb \ arch/arm/dts/zynqmp-sck-kr-g-revA.dtbo Also add support for kr260-revB board. Based on FRU it is revision B but schematics can be label as revA03. Changes in revB are: - SFP light - GEM2/3 TX_CLK fixes - PMOD/RPI connector fixes - Replace si5332 with oscilators Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/dac2ee1826e73b89c8cc1e430354eb43d291f675.1652870941.git.michal.simek@amd.com
2022-06-24serial: Setup serial base and freq for zynq/zynqmpMichal Simek
Setup default values for debug console, base address and frequency. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/ce93efd3ed67aa6390810ce0b79e0d00e7c36b4b.1652871485.git.michal.simek@amd.com
2022-06-24arm64: zynqmp: Add debug messages to bl2_plat_get_bl31_params()Michal Simek
It is useful to get information about BL type and entry address that's why add some debug messages. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/fb023b618a009009a0b564c24223cadc10ced5b3.1652871741.git.michal.simek@amd.com
2022-06-24arm64: versal: Add support to load an app at EL1Ashok Reddy Soma
Add support to switch to EL1 and load an EL1 app from U-Boot which is executing at EL2 or EL3 in aarch64 mode. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Link: https://lore.kernel.org/r/20220506055345.1921-1-ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24xilinx: Add CONFIG_DM_ETH_PHY configT Karthik Reddy
Enable CONFIG_DM_ETH_PHY to utilize shared MDIO bus support on all xilinx platforms. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Link: https://lore.kernel.org/r/965981eb324d13a98aad8bd88eb8b50bc5147a7e.1652181968.git.michal.simek@amd.com
2022-06-24net: xilinx: axi_emaclite: Use shared MDIO bus support for axi emaclite driverT Karthik Reddy
CONFIG_DM_ETH_PHY enables support to utilize generic ethernet phy framework. Though if ethernet PHY node is in other ethernet node, it will use shared MDIO to access the PHY of other ethernet. Move ethernet print info statement from plat function to probe function, as phyaddr is not enumerated when CONFIG_DM_ETH_PHY is enabled. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Link: https://lore.kernel.org/r/93e11ccca56b6e52b2dcc283d08d5042537f828f.1652181968.git.michal.simek@amd.com
2022-06-24net: xilinx: axi_emac: Use shared MDIO bus support for axi emac driverT Karthik Reddy
CONFIG_DM_ETH_PHY enables support to utilize generic ethernet phy framework. Though if ethernet PHY node is in other ethernet node, it will use shared MDIO to access the PHY of other ethernet. Move ethernet print info statement from plat function to probe function, as phyaddr is not enumerated when CONFIG_DM_ETH_PHY is enabled. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Link: https://lore.kernel.org/r/ecfec78234233fefdc172c141c207b2d78ef70c5.1652181968.git.michal.simek@amd.com
2022-06-23Merge branch '2022-06-23-scmi-optee-and-smccc-updates' into nextTom Rini
This consists of two slightly related series. For the first, to quote the author: This series implements 2 features in driver/firmware/scmi. First, a single change adds support for SCMI OP-TEE transport to use OP-TEE native shared memory. See the 1st patch in this series: "firmware: scmi: optee: use TEE shared memory for SCMI messages". Then come changes for supporting multi-channel in the SCMI drivers. I've split the implementation in 11 several small incremental changes in the hope it helps the review. Few minor fixup commits are also inserted in the series. And the second series implements some smccc improvements.
2022-06-23Merge branch '2022-06-23-fuzzing-and-asan-for-sandbox' into nextTom Rini
To quote the author: This series introduces ASAN and a basic fuzzing infrastructure that works with sandbox. The example fuzz test towards the end of the series will find something pretty quickly. That something is fixed by the series "virtio: Harden and test vring" that needs to be applied for the final patch in this series. There is some refactoring to stop using '.' prefixed sections. ELF defines sections with names that contain anything that isn't alphanumeric or an underscore as being for system use which means clang's ASAN instrumentation happily add redzones between the contained objects. That's not what we want for things like linker lists where the linker script has carefully placed the sections contiguously. By renaming the sections, clang sees them as user sections and doesn't add instrumentation. ASAN is left disabled by default as there are still some tests that it triggers on and will need some more investigation to fix. It can be enabled with CONFIG_ASAN or passing `-a ASAN` to buildman.
2022-06-23drivers: rng: add smccc trng driverEtienne Carriere
Adds random number generator driver using Arm SMCCC TRNG interface to get entropy bytes from secure monitor. The driver registers as an Arm SMCCC feature driver to allow PSCI driver to bind a device for when secure monitor exposes RNG support from Arm SMCCC TRNG interface. Cc: Sughosh Ganu <sughosh.ganu@linaro.org> Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23firmware: psci: bind arm smccc features when discoveredEtienne Carriere
Use PSCI device to query Arm SMCCC v1.1 support from secure monitor and if so, bind drivers for the SMCCC features that monitor supports. Drivers willing to be bound from Arm SMCCC features discovery can use macro ARM_SMCCC_FEATURE_DRIVER() to register to smccc feature discovery, providing target driver name and a callback function that returns whether or not the SMCCC feature is supported by the system. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23firmware: psci: reorder header files inclusionEtienne Carriere
Fixes ordering of header files inclusion in PSCI firmware driver. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23smccc: define generic IDs for feature discoveryEtienne Carriere
Defines function IDs ARM_SMCCC_ARCH_FEATURES used to query SMCCC feature support, applicable from Arm SMCCC v1.1 specification. Defines macro ARM_SMCCC_RET_NOT_SUPPORTED as generic return identifier for when a SMCCC feature is not supported. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23firmware: scmi: use multi channel in mailbox, optee and smccc agentsEtienne Carriere
Updates .process_msg operators of the SCMI transport drivers that supports multi-channel to use it now that drivers do provide the reference through channel argument. These are the mailbox agent, the optee agent and the smccc agent. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23power: regulator: scmi: simplify scmi_voltd_set_enable()Etienne Carriere
Simplify scmi_voltd_set_enable() exit sequence. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-06-23power: regulator: scmi: support SCMI multi-channelEtienne Carriere
Update SCMI regulator controller driver to get its assigned SCMI channel during initialization. This change allows SCMI voltage domain protocol to use a dedicated channel when defined in the DT. The reference is saved in SCMI regulator controller driver private data. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-06-23reset: scmi: support SCMI multi-channelEtienne Carriere
Update SCMI reset controller driver to get its assigned SCMI channel during initialization. This change allows SCMI reset domain protocol to use a dedicated channel when defined in the DT. The reference is saved in SCMI reset controller driver private data. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23clk: scmi: support SCMI multi-channelEtienne Carriere
Update SCMI clock driver to get its assigned SCMI channel during initialization. This change allows SCMI clock protocol to use a dedicated channel when defined in the DT. The reference is saved in SCMI clock driver private data. Cc: Lukasz Majewski <lukma@denx.de> Cc: Sean Anderson <seanga2@gmail.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23firmware: scmi: optee transport: implement multi-channelEtienne Carriere
Implements multi SCMI channel support in OP-TEE SCMI transport. An SCMI protocol may use a dedicated channel, specified by the DT. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23firmware: scmi: smccc transport: implement multi-channelEtienne Carriere
Updates SCMI SMCCC transport driver to get SCMI channel reference at initialization and use when posting SCMI messages. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23firmware: scmi: mailbox transport: implement multi-channelEtienne Carriere
Updates SCMI mailbox transport driver to get SCMI channel reference at initialization and use when posting SCMI messages. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23firmware: scmi: add multi-channel supportEtienne Carriere
Adds resources for SCMI protocols to possibly use a dedicated SCMI channel instead of the default channel allocated by the SCMI agent during initialization. As per DT binding documentation, some SCMI transports can define a specific SCMI communication channel for given SCMI protocols. It allows SCMI protocols to pass messages concurrently each other. This change introduces new scmi agent uclass API function devm_scmi_of_get_channel() for SCMI drivers probe sequences to get a reference to the SCMI channel assigned to its related SCMI protocol. The function queries the channel reference to its SCMI transport driver through new scmi agent uclass operator .of_get_channel that uses Device Tree information from related SCMI agent node. Operator .of_get_channel returns a reference to the SCMI channel assigned to SCMI protocol used by the caller device. SCMI transport drivers that do not support multi-channel are not mandated to register this operator. When so, API function devm_scmi_of_get_channel() returns NULL and SCMI transport driver are expected to retrieve by their own means the reference to the unique SCMI channel, for example using platform data as these drivers currently do in U-Boot source tree. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-06-23firmware: scmi: factorize scmi transport look upEtienne Carriere
Defines local helper function find_scmi_transport_device() with the instructions to find the SCMI transport device from a SCMI protocol device. Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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