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2021-08-26xilinx: zynqmp: Check that DT is 64bit alignedMichal Simek
DT needs to be 64bit aligned. If it is not fdt64_to_cpu will fail when try to read information about reserved memory. The system ends in exception without any clue what's going it. That's why detect not aligned DT and panic to show where the issue is coming from. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: Add support for generic board detectionMichal Simek
Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: common: Free allocated structureMichal Simek
There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: common: Change board_info[] handlingMichal Simek
Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: Use variable for passing board_nameMichal Simek
Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: fru: Replace spaces with \0 in detected nameMichal Simek
FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: zynqmp: Enable gpio-key/button driverMichal Simek
Enable button uclass and also gpio-key driver by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26arm64: zynqmp: Enable sha1sum commandMichal Simek
Enable it for TPM usage. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26watchdog: versal: Include header file needed for dev_ functionsAshok Reddy Soma
dev_dbg, dev_err and dev_warn seems to be moved to different header file. Include dm/device_compat.h file to compile properly. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: zynqmp: Add debug messages for boot modeMichal Simek
Add debug messages to see HW boot mode and also alternative boot mode in logs directly. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26cmd: boot: Update reset usage messageMichal Simek
The commit 573a3811edc8 ("sysreset: psci: support system reset in a generic way with PSCI") has added support for warm reset via PSCI but this hasn't been reflected in usage message and user has to look at the code how to run it. That's why update usage text to make this clear. Here is full help with updated usage: ZynqMP> help reset reset - Perform RESET of the CPU Usage: reset - cold boot without level specifier reset -w - warm reset if implemented Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
2021-08-26cmd: pwm: Remove additional pwm descriptionMichal Simek
The first name is taken from command name that's why shouldn't be listed in help. And commands shouldn't be listed with <> which means value but value itself is command name. Also add description for commands to make it clear what it does. Before pwm pwm <invert> <pwm_dev_num> <channel> <polarity> pwm <config> <pwm_dev_num> <channel> <period_ns> <duty_ns> ... After: pwm invert <pwm_dev_num> <channel> <polarity> - invert polarity pwm config <pwm_dev_num> <channel> <period_ns> <duty_ns> - config PWM pwm enable <pwm_dev_num> <channel> - enable PWM output pwm disable <pwm_dev_num> <channel> - disable PWM output Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-26xilinx: Enable config to display cpuinfoT Karthik Reddy
Enable CONFIG_DISPLAY_CPUINFO to display SoC family & revision. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: common: Add function to print SoC infoT Karthik Reddy
Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26soc: xilinx: versal: Add soc_xilinx_versal driverT Karthik Reddy
soc_xilinx_versal driver allows identification of family & revision of versal SoC. This driver is selected by CONFIG_SOC_XILINX_VERSAL. Probe this driver using platdata U_BOOT_DEVICE structure which is defined at mach-versal/cpu.c. Add this config to xilinx_versal_virt_defconfig & xilinx_versal_mini_ospi_defconfig file to select this driver. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26soc: xilinx: zynqmp: Add soc_xilinx_zynqmp driverT Karthik Reddy
soc_xilinx_zynqmp driver allows identification of family & revision of zynqmp SoC. This driver is selected by CONFIG_SOC_XILINX_ZYNQMP. Add this config to xilinx_zynqmp_virt_defconfig file. Probe this driver using platdata U_BOOT_DEVICE structure which is specified in mach-zynqmp/cpu.c. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26fdt_support: Add kernel-doc for fdt_fixup_memory_banks()Michal Simek
Add kernel-doc description for fdt_fixup_memory_banks() because it is implemented in one specific way and this information should be available for others to decide if their SoC conforms to it. If you don't want U-Boot to update your memory DT layout please disable CONFIG_ARCH_FIXUP_FDT_MEMORY. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-26xilinx: Disable ARCH_FIXUP_FDT_MEMORYMichal Simek
Based on DT spec you can have one memory node which multiple ranges or multiple nodes. fdt_fixup_memory_banks() is not implemented in a correct way when multiple memory nodes are present because all ranges are put it to the first memory node found. And next memory nodes are kept in DT which ends up in the same range specification in the same DT. Here is what it is happening. Origin DT. memory@0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; }; memory@800000000 { device_type = "memory"; reg = <0x8 0x00000000 0x0 0x80000000>; }; After fdt_fixup_memory_banks() memory@0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; }; memory@800000000 { device_type = "memory"; reg = <0x8 0x00000000 0x0 0x80000000>; }; As is visible memory@0 node got second range but there is still memory@800000000 node present and 2G range is listed twice. The solution can't be that second node is removed because it can be referenced already that's why it is better for us to disable this option for now. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26ARM: zynq: Enable smcc and nor for zc770-xm012Michal Simek
Enable cfi flash on zc770-xm012 configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26ARM: zynq: Wire single qspi on couple of boardsMichal Simek
Single configuration is working fine and no issue to enable it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26ARM: zynq: Replace 'io-standard' with 'power-source' propertySai Krishna Potthuri
Replace 'io-standard' property with 'power-source' property in all zynq dts files to be in sync with Zynq Pinctrl driver. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: Add jedec compatible string for QSPI (Zynq/ZynqMP)Raju Kumar Pothuraju
Add missing "jedec, spi-nor" compatible string for QSPI flash node. Spi-nor framework uses this compatibility string to probe & initialize flash. With missing compatibility string we are observing below error: Zynq> sf probe 0 0 0 jedec_spi_nor spi_flash@0:0: unrecognized JEDEC id bytes: 00, 00, 00 Failed to initialize SPI flash at 0:0 (error -2) Signed-off-by: Raju Kumar Pothuraju <raju.kumar-pothuraju@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26arm64: zynqmp: Update comment style sm-k26Michal Simek
Trivial style patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26arm64: zynqmp: Fix header alignment on kv260 boardsMichal Simek
Fix header alignment. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26arm64: zynqmp: Fix node name for ds35/36 ledsMichal Simek
By dt-binding specs led nodes should have -led suffix that's why add it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: zynqmp: Initialize usb and scsi via prebootMichal Simek
Based on thread https://lists.denx.de/pipermail/u-boot/2021-June/451828.html especially "Overall we have a deficiency in the UEFI implementation in that we cannot deal with block devices added or removed after initialization." there is a need to deal with removable media as usb/scsi/sata. That's why bridge this gap in EFI implementation by resetting usb and scsi resets to get all disks before efi_init_obj_list() is called. In our standard boot flow, where we use distro boot, order is fixed as "jtag mmc0 mmc1 qspi0 nand0 usb0 usb1 scsi0 pxe dhcp" with prioritizing boot device added by commit 2882b39d564b ("arm64: zynqmp: Setup the first boot_target at run time"). When device has ESP partition all devices should be detected because then efi_disk_register() in efi_init_obj_list() is called only once. The first such a device is sd/emmc(mmc0/mmc1) and then disks on usb/sata are not handled at all. The commit 6bb577dbb30f ("arm64: zynqmp: Disable EFI_CAPSULE_ON_DISK_EARLY") also pointed out on this issue but detection of removable media wasn't solved that's why do it now via preboot command. I have tested cases without usb and scsi and there is no problem with calling resets without devices itself. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26arm64: zynqmp: Disable WDT_CDNS driver by defaultMichal Simek
Do not enable watchdog driver in default zynqmp configuration. The reason is that not all distributions are handling watchdog properly and then expires and system resets. If someone needs watchdog in their design please enable it by hand. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26mmc: zynq_sdhci: Use set_control_reg from sdhci.cAshok Reddy Soma
Since set_control_reg is available in sdhci.c, use it and remove arasan_sdhci_set_control_reg(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26mmc: zynq_sdhci: Wait till sd card detect state is stableT Karthik Reddy
As per SD spec when SD host controller is reset, it takes 1000msec to detect the card state. In case, if we enable the sd bus voltage & card detect state is not stable, then host controller will disable the sd bus voltage. In case of warm/subsystem reboot, due to unstable card detect state host controller is disabling the sd bus voltage to sd card causing sd card timeout error. So we wait for a maximum of 1000msec to get the card detect state stable before we enable the sd bus voltage. This current fix is workaround for now, this needs to be analysed further. Zynqmp platform should behave the same as Versal, but we did not encounter this issue as of now. So we are fixing it for Versal only. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26mmc: zynq_sdhci: Move setting tapdelay code to driverAshok Reddy Soma
Move tapdelay function calls to zynq_sdhci.c and make them static inline. zynqmp_tap_delay.h has function prototypes for the functions defined in tap_delays.c, which will not be needed anymore. Remove tap_delays.c and zynqmp_tap_delay.h files. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-08-26mmc: zynq_sdhci: Add xilinx_pm_request() method to set tapdelaysAshok Reddy Soma
Currently xilinx sdhci driver is using zynqmp_mmio_write() to set tapdelay values and DLL resets. Continue to use this for SPL and mini U-Boot where U-Boot will be executed at EL3 level. Use firmware call xilinx_pm_request() using appropriate arguments to set input/output tapdelays and also for DLL resets in regular flow(EL2). Host driver should explicitly request DLL reset before ITAP (assert DLL) and after OTAP (release DLL) to avoid issues in some cases. Also handle error return where possible. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-08-06zynqmp_firmware: Add zynqmp firmware related enumsT Karthik Reddy
Add enums for pm node id's, pm ioctl id's, tapdelay types, dll reset types Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06mmc: sdhci: Change prototype of set_delay to return errorsAshok Reddy Soma
set_delay() has return type as void. If there are any errors while setting tapdelay's it won't be able to return them. Change the prototype of set_delay() in sdhci_ops structure and return the errors from wherever it is called. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06mmc: zynq_sdhci: Return errors from arasan_sdhci_set_tapdelayAshok Reddy Soma
Change return type of arasan_sdhci_set_tapdelay() to int, to facilitate returning errors. Get return values from input and output set clock phase functions inside arasan_sdhci_set_tapdelay() and return those errors. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06reset: zynqmp: Add reset controller for ZynqMP SoCMichal Simek
Add firmware based reset controller for Xilinx ZynqMP SoC to let other drivers to call reset functions. Driver is only tested on Xilinx ZynqMP but support for Xilinx Versal can be simply added. That's why reset_id and nr_reset are assigned in probe folder. Driver is inpired by driver from Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06xilinx: zynqmp: Enable CMD_RTC command with Zynqmp RTC driverMichal Simek
Enable RTC command to be able to check available. And also enable ZynqMP RTC driver to be possible to use by default. Here is the list when both drivers are enabled: ZynqMP> rtc list RTC #0 - rtc_emul RTC #1 - rtc@ffa60000 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06rtc: zynqmp: Add support for ZynqMP RTCMichal Simek
The whole driver logic is taken from Linux kernel but only set/get/reset functions are implemented. When device is power off RTC is power out of battery. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06cmd: date: rtc: Update command to read the first RTC with seq 0Michal Simek
RTCs are using sequence number defined in aliases node. Date command with DM_RTC enabled is looking for the first RTC with index 0. But when RTC_EMULATION is enabled it gets likely most of the time index 0 even when system has rtc0 device via aliases node and gets sequence number 0. That's why extend the code to look for sequence 0 number first. If this fails continue to use existing device with index 0. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06dm: rtc: uclass: Add flag to control sequence numberingMichal Simek
RTCs are using aliases for sequences. That's why enable DM_UC_FLAG_SEQ_ALIAS for exact RTC indentification. The same flag is used by a lot of other uclasses like mmc, pci, serial, spi, timer, tpm, etc. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06firmware: xilinx: Use explicit values for all enum valuesMichal Simek
Based on discussion at https://lore.kernel.org/r/20200318125003.GA2727094@kroah.com we got recommendation to use explicit values for all enum values. The patch is following this recommendation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/daeb67ded45d8a8f6a96717d1fb9c84439dd2ae8.1612361627.git.michal.simek@xilinx.com
2021-08-06xilinx: zynqmp: Add support for runtime dfu_alt_info setupMichal Simek
The main reason for this to be implemented is capsule update. Two memories are supported and tested which is MMC FAT based and QSPI based. For creating capsule these commands are used: ./tools/mkeficapsule --raw spl/boot.bin --index 1 capsule1.bin ./tools/mkeficapsule --raw u-boot.itb --index 2 capsule2.bin Then transfer to SD card where these commands run: load mmc 0 10000000 capsule1.bin efidebug capsule update -v 10000000 load mmc 0 10000000 capsule2.bin efidebug capsule update -v 10000000 Depends on the boot device used are binaries loaded to qspi or mmc fat partition. Also multiboot register is handled to make sure that the same location(id) is used as image which is upgraded. Two locations are used by purpose for SPL flow. If only boot.bin is used create only one capsule. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06xilinx: zynqmp: Config non zero SYS_SPI_U_BOOT_OFFSMichal Simek
This variable is pointing to offset is qspi where u-boot image is placed. In our case it is location of u-boot.itb file. Offset is the same as is used by Xilinx Zynq SoC. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06xilinx: zynqmp: use zynqmp_mmio_read() in multi_boot()Michal Simek
When U-Boot runs in EL2 there is no access to csu_base registers that's why this has to be done via firmware interface to find out multi boot register value. Till now this function is called only from SPL in EL3. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06xilinx: zynqmp: Change multi_boot() to return valueMichal Simek
Change multi_boot() to return multiboot value and move print out of this function and let this function to be used by other functions without duplicating message. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06xilinx: zynqmp: Free allocated field for target variableMichal Simek
When env_set() is called there is no need to allocate memory for variable which is already saved that's why free it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-04Merge branch '2021-08-04-assorted-minor-fixes'Tom Rini
- Assorted fixes
2021-08-04cmd:(cosmetic)Mentioned in 'chpart' command HELP text that it is for MTD devicesAdarsh Babu Kalepalli
Modified the help text of 'chpart' command ,mentioning that it is for MTD devices. Signed-off-by: Adarsh Babu Kalepalli <opensource.kab@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-04cmd:Elaborate 'blkcache' cmd HELP statementAdarsh Babu Kalepalli
HELP description is provided for ‘configure’ sub-command of ‘blkcache’. Signed-off-by: Adarsh Babu Kalepalli <opensource.kab@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-04config: MPC8548CDS: eliminate symbol CONFIG_SYS_ID_EEPROMHeinrich Schuchardt
Symbol CONFIG_SYS_ID_EEPROM is defined in include/configs/MPC8548CDS.h but never used. Remove it here and from the whitelist. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-08-04doc: Add basic information about running CI testsTom Rini
Start out by documenting general expectations on when CI is run, how anyone can run Azure pipelines, and how GitLab CI pipelines can be run. Signed-off-by: Tom Rini <trini@konsulko.com>