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2021-10-23mtd: spi-nor-core: Check return value of write_enable() in spi_nor_erase()Marek Behún
The spi_nor_erase() function does not check return value of the write_enable() call. Fix this. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-10-23mtd: spi-nor-core: Try cleaning up in case writing BAR failedMarek Behún
Use the cleanup codepath of spi_nor_erase() also in the event of failure of writing the BAR register. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Tested-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-10-23mtd: spi-nor: Add support for Spansion S25FL256LTakahiro Kuwano
The S25FL256L is a part of the S25FL-L family and has the same feature set as S25FL128L except the density. The datasheet can be found in the following link. https://www.cypress.com/file/316171/download The S25FL256L is 32MB NOR Flash that does not support Bank Address Register. This fixup is activated if CONFIG_SPI_FLASH_BAR is enabled and returns ENOTSUPP in setup() hook to avoid further ops. Tested on Xilinx Zynq-7000 FPGA board. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
2021-10-23mtd: spi-nor-ids: Add GD25LQ256D ChipYanhong Wang
Add Gigadevice GD25LQ256D SPI NOR chip. https://www.gigadevice.com/datasheet/gd25lq256d/ Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [jagan: updated commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-10-08mtd: spi-nor-ids: Reinstate Micron MT25QL02GMarek Vasut
This ID disappeared in 5b66fdb29dc ("mtd: spi: Remove unused files"), add the ID back, since the chip is used on devices supported by U-Boot. Fixes: 5b66fdb29dc ("mtd: spi: Remove unused files") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Horatiu Vultur <horatiu.vultur@microchip.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Vignesh R <vigneshr@ti.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-10-08mtd: spinand: macronix: Fix ECC Status ReadHaolin Li
According to datasheet, the upper four bits are reserved or used for reflecting the ECC status of the accumulated pages. The error bits number for the worst segment of the current page is encoded on lower four bits. Fix it by masking the upper bits. This same issue has been already fixed in the linux kernel by: "mtd: spinand: macronix: Fix ECC Status Read" (sha1: f4cb4d7b46f6409382fd981eec9556e1f3c1dc5d) Apply the same fix in the U-Boot driver. Signed-off-by: Haolin Li <li.haolin@qq.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-10-07Merge tag 'u-boot-amlogic-20211007' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-amlogic - Add new SoC ID for S905Y2 found in Radxa Zero - pcie_dw_meson: fix usb fail when pci link fails to go up - Sync Amlogic DT from Linux 5.14 - dwc3-meson-gxl: add AXG compatible - dts: keep back HW order for MMC devices since change in Upstream Linux - Cleanup local AXG DT USB nodes now everything is upstream - distro_bootcmd: run pci enum for scsi_boot just like it is done for nvme_boot - New Boards: - Odroid-HC4: a variant of Odroid-C4 with 2 SATA ports (via PCIe-SATA bridge) - Beelink GS-King X: A variant of the other Beelink board with 2 SATA ports (via USB3-SATA bridge) - Banana Pi M5: another credit card SBC - JetHub D1/H1: home automation controllers - Radxa Zero: another RPi Zero sized SBC
2021-10-07Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini
- Reset improvements, enable coherence manager on ae350, k210 clk improvements, other fixes
2021-10-07doc: boards: amlogic: update for Radxa ZeroChristian Hewitt
Add documentation bits for the Radxa Zero Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> [narmstrong: updated u200 MAINTAINERS] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07boards: amlogic: add Radxa Zero defconfigChristian Hewitt
Add a defconfig for the Radxa Zero SBC, using an Amlogic S905Y2 chip. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> [narmstrong: updated u200 MAINTAINERS & add missing CONFIG_SYS_LOAD_ADDR from defconfig] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07ARM: dts: add support for Radxa ZeroChristian Hewitt
Import the initial dts queued for Linux 5.16.y Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07ARM: dts: sort Amlogic Makefile sectionChristian Hewitt
Alpha sort the Amlogic dtb list (same as the kernel). Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07ARM: amlogic: add JetHub D1/H1 docsVyacheslav Bocharov
Fix doc/board/amlogic/index.rst: - Add S905W to S905X column. - Add JetHub devices to the corresponding columns. - Fix tabs to spaces for table alignment Add doc/board/amlogic files: - jethub-j100.rst - jethub-j80.rst Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07ARM: amlogic: add JetHub D1/H1 device supportVyacheslav Bocharov
Add support for new home automation devices. JetHome Jethub D1 (http://jethome.ru/jethub-d1) is a home automation controller with the following features: - DIN Rail Mounting case - Amlogic A113X (ARM Cortex-A53) quad-core up to 1.5GHz - no video out - 512Mb/1GB DDR3 - 8/16GB eMMC flash - 1 x USB 2.0 - 1 x 10/100Mbps ethernet - WiFi / Bluetooth AMPAK AP6255 (Broadcom BCM43455) IEEE 802.11a/b/g/n/ac, Bluetooth 4.2. - TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output power and Zigbee 3.0 support. - 2 x gpio LEDS - GPIO user Button - 1 x 1-Wire - 2 x RS-485 - 4 x dry contact digital GPIO inputs - 3 x relay GPIO outputs - DC source with a voltage of 9 to 56 V / Passive POE JetHome Jethub H1 (http://jethome.ru/jethub-h1) is a home automation controller with the following features: - Square plastic case - Amlogic S905W (ARM Cortex-A53) quad-core up to 1.5GHz - no video out - 1GB DDR3 - 8/16GB eMMC flash - 2 x USB 2.0 - 1 x 10/100Mbps ethernet - WiFi / Bluetooth RTL8822CS IEEE 802.11a/b/g/n/ac, Bluetooth 5.0. - TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output power and Zigbee 3.0 support. - MicroSD 2.x/3.x/4.x DS/HS cards. - 1 x gpio LED - ADC user Button - DC source 5V microUSB with serial console Patches from: - JetHub H1 https://lore.kernel.org/r/20210915085715.1134940-4-adeep@lexina.in https://git.kernel.org/amlogic/c/abfaae24ecf3e7f00508b60fa05e2b6789b8f607 - JetHub D1 https://lore.kernel.org/r/20210915085715.1134940-5-adeep@lexina.in https://git.kernel.org/amlogic/c/8e279fb2903990cc6296ec56b3b80b2f854b6c79 Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> [narmstrong: removed unused variable value] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07ARM: amlogic: add JetHub common config headerVyacheslav Bocharov
JetHub devices uses its own boot sequence with "rescue" button Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07ARM: amlogic: add Banana Pi M5Neil Armstrong
Banana Pi BPI-M5 is a credit card format SBC with the following features: - Amlogic S905X3 quad core Cortex-A55 - Mali-G31 GPU - 4GB LPDDR4 - 16GB eMMC flash - 4 USB 3.0 - 1 GbE ethernet - HDMI output - 2x LEDS - SDCard - 2.5mm Jack with Stereo Audio + CVBS - Infrared Received - ADC Button - GPIO Button - 40 pins header + 3pins debug header [narmstrong: add missing CONFIG_SYS_LOAD_ADDR from defconfig] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07ARM: meson: add Beelink GS-King X boardNeil Armstrong
The Beelink GS-King X is a variant of the GS King boards but with an internal USB to SATA bridge and advanced audio features. [narmstrong: add missing CONFIG_SYS_LOAD_ADDR from defconfig] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07doc: boards: amlogic: update for Odroid HC4Neil Armstrong
Add documentation bits for the Odroid-HC4. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07ARM: amlogic: add support for Odroid-HC4 deviceNeil Armstrong
The Odroid-HC4 is a variant of the Odroid-C4 board but with a PCIe-SATA bridge instead of the USB3 ports. [narmstrong: add missing CONFIG_SYS_LOAD_ADDR from defconfig] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07distro_bootcmd: run pci enum for scsi_boot just like it is done for nvme_bootNeil Armstrong
The SCSI device can be a PCIe adapter, so run pcie enum if enabled. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07configs: meson64: add SCSI boot targetNeil Armstrong
Add SCSI target to be able to boot from the SATA disks on the Odroid HC4 using an on-board AHCI PCIe controller. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2021-10-07ARM: meson-axg: remove local USB nodesNeil Armstrong
Drop the local USB nodes after Linux 5.14 sync. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07ARM: meson: keep HW order for MMC devicesNeil Armstrong
Since Linux commmit [1], the order is fixed with aliases, in order to keep the MMC device order, set it back to HW order in U-Boot dtsi files. [1] ab547c4fb39f ("arm64: dts: amlogic: Assign a fixed index to mmc devices") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07usb: dwc3: meson-gxl: add AXG compatibleNeil Armstrong
Upstream Linux uses the "amlogic,meson-axg-usb-ctrl" for AXG SoCs. This adds it to the compatible list for this driver. Reported-by: Vyacheslav Bocharov <adeep@lexina.in> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Vyacheslav Bocharov <adeep@lexina.in>
2021-10-07ARM: meson: Sync Amlogic DT from Linux 5.14Neil Armstrong
Import Amlogic DT changes from Linux commit 7d2a07b76933 ("Linux 5.14"), dt-bindings clock changes and new meson-g12b-gsking-x.dts, meson-sm1-bananapi-m5 & odroid-hc4 boards. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07pci: pcie_dw_meson: fix usb fail when pci link fails to go upNeil Armstrong
On Amlogic A311D, when the PCIe link fails disabling the related clocks makes USB fail. For an unknown reason, this doesn happen on the S905D3 SoC. Mimic the Linux behavior by not considering a link failure a probe failure, and continue even if the PCIe link is down. Reported-by: Art Nikpal <email2tema@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-07ARM: meson: Add S905Y2 SOC IDChristian Hewitt
Add the SOC ID for the S905Y2 to board info, see below for before/after tested with a Radxa Zero board: SoC: Amlogic Meson G12A (Unknown) Revision 28:b (30:2) SoC: Amlogic Meson G12A (S905Y2) Revision 28:b (30:2) Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07riscv: ae350: enable Coherence Manager for ae350Leo Yu-Chi Liang
If Coherence Manager were not set in the beginning, u-boot-spl would sometimes fail to boot to u-boot proper. Enable CM and I/D cache at the same time in harts_early_init Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-10-07configs: enable SYSRESET_SBI on qemu-riscvXX_smode_defconfigHeinrich Schuchardt
There should be a platform compiled with the new driver. Enable CONFIG_SYSRESET_SBI for all QEMU boards using SBI. If you want to test the SBI sysreset driver, disable CONFIG_SYSRESET_SYSCON. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-07sysreset: provide SBI based sysreset driverHeinrich Schuchardt
Provide sysreset driver using the SBI system reset extension. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Samuel Holland <samuel@sholland.org>
2021-10-07cmd/sbi: use constants instead of numerical valuesHeinrich Schuchardt
Use constants for extension IDs. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-07riscv: add missing SBI extension definitionsHeinrich Schuchardt
Add the System Reset Extension and the Hart State Management Extension definitions. Add missing RFENCE Extension enum values. The SBI 0.1 extension constants are needed for the sbi command. Remove an #ifdef. Cf. https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-07riscv: image: Use the first DRAM bank for bootm_lowSamuel Holland
bootm_low is used as a base address is used to allocate space for the FDT blob, initrd, cmdline, etc. when booting Linux. Set the default value for RISC-V to the start of the first DRAM bank, so platforms can get their DRAM layout from the device tree, and do not need to define CONFIG_SYS_SDRAM_BASE. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-07riscv: Fix setting no-map in reserved memory nodesSamuel Holland
The no-map property is wrongly skipped if a no-map reserved memory node follows one without that property. Fix this by not remembering the absence of a no-map property across loop iterations. Fixes: d4ea649f179a ("riscv: Provide a mechanism to fix DT for reserved memory") Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2021-10-07serial: Add a debug console using the RISC-V SBI interfaceSamuel Holland
The RISC-V SBI interface v0.1 provides a function for printing a character to the console. Even though SBI v0.1 functions are deprecated, the SBI console is quite useful for early debugging, because it works without any dcache, memory, or MMIO access in S mode. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-07clk: k210: Try harder to get the best configSean Anderson
In some cases, the best config cannot be used because the VCO would be out-of-spec. In these cases, we may need to try a worse combination of r/od in order to find the best representable config. This also adds a few test cases to catch this and other (possible) unlikely errors. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-07test: dm: k210: Reduce duplication in test casesSean Anderson
Having to copy-paste the same 3 lines makes adding new test cases error-prone. Use a macro. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-07k210: clk: Refactor out_of_spec testsSean Anderson
Everything here sits in a while (true) loop. However, this introduces a couple of layers of indentation. We can simplify the code by introducing a single goto instead of using continue/break. This will also make adding loops in the next patch easier. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-07clk: k210: Fix checking if ulongs are less than 0Sean Anderson
The PLL functions take ulong arguments for rate, but still check if that rate is negative (which is never true). The correct way to handle this is to use IS_ERR_VALUE (like is already done in k210_clk_set_rate). While we're at it, we can move the error checking up into the caller of the pll set/get rate functions. This also protects our other calculations from using bogus values for rate. Fixes: 609bd60b94 ("clk: k210: Rewrite to remove CCF") Reported-by: Coverity Scan <scan-admin@coverity.com> Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-10-06Merge branch '2021-10-06-assorted-improvements'Tom Rini
- Use better values for ACPI OEM_VERSION - Assorted NAND related Kconifg migrations and another dependency fix
2021-10-06Convert CONFIG_NAND_OMAP_ECCSCHEME to KconfigTom Rini
The values of CONFIG_NAND_OMAP_ECCSCHEME map to the enum in include/linux/mtd/omap_gpmc.h for valid ECC schemes. Make which one we will use be a choice statement, enumerating the ones which we have implemented. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_SYS_NAND_U_BOOT_LOCATIONS et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_NAND_U_BOOT_LOCATIONS CONFIG_SYS_NAND_U_BOOT_OFFS Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_NAND_FSL_ELBC et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_NAND_FSL_ELBC CONFIG_NAND_FSL_IFC Note that a number of PowerPC platforms had previously enabled CONFIG_NAND_FSL_ELBC without CONFIG_MTD_RAW_NAND, and now they no longer enable the option, reducing the size of a few functions. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_SYS_NAND_MAX_CHIPS to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_NAND_MAX_CHIPS Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06nand.h: Cleanup linux/mtd/rawnand.h usageTom Rini
We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_SYS_NAND_ONFI_DETECTION to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_NAND_ONFI_DETECTION Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_SYS_NAND_5_ADDR_CYCLE to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_NAND_5_ADDR_CYCLE Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_SYS_NAND_BAD_BLOCK_POS to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_NAND_BAD_BLOCK_POS In order to do this, introduce a choice for HAS_LARGE/SMALL_BADBLOCK_POS as those are the only valid values. Use LARGE as the default as no in-tree boards use SMALL, but it is possible. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06nand_spl_simple: Drop CONFIG_SYS_NAND_4_ADDR_CYCLE supportTom Rini
This code is unused, drop it. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_SYS_NAND_PAGE_COUNT to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_NAND_PAGE_COUNT Signed-off-by: Tom Rini <trini@konsulko.com>
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