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2024-07-05Fix Kconfig coding style from spaces to tabAnand Moon
Adjust indentation from spaces to tab (+optional two spaces) as in coding style with command like: $ sed -e 's/^ /\t/' -i */Kconfig Signed-off-by: Anand Moon <linux.amoon@gmail.com>
2024-07-05configs: am64x_evm_a53_defconfig: Enable I2C GPIO driversRoger Quadros
The board has the TCA9554 I2C GPIO expander chip for expansion board presence detection logic. Enable the relevant I2C GPIO drivers. Signed-off-by: Roger Quadros <rogerq@kernel.org>
2024-07-05cmd: bootm: add ELF file supportMaxim Moskalets
Some operating systems (e.g. seL4) and embedded applications are ELF images. It is convenient to use FIT-images to implement trusted boot. Added "elf" image type for booting using bootm command. Signed-off-by: Maxim Moskalets <maximmosk4@gmail.com>
2024-07-05mkimage: Allow 'auto-conf' signing of scriptsAlexander Dahl
U-Boot configured for verified boot with the "required" option set to "conf" also checks scripts put in FIT images for a valid signature, and refuses to source and run such a script if the signature for the configuration is bad or missing. Such a script could not be packaged before, because mkimage failed like this: % tools/mkimage -T script -C none -d tmp/my.scr -f auto-conf -k tmp -g dev -o sha256,rsa4096 my.uimg Failed to find any images for configuration 'conf-1/signature' tools/mkimage Can't add hashes to FIT blob: -1 Error: Bad parameters for FIT image type This is especially unfortunate if LEGACY_IMAGE_FORMAT is disabled as recommended. Listing the script configuration in a "sign-images" subnode instead, would have added even more complexity to the already complex auto fit generation code. Signed-off-by: Alexander Dahl <ada@thorsis.com>
2024-07-05doc: board: phytec: phycore-am6: Describe UART based bootWadim Egorov
Describe how to boot via UART. Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2024-07-05configs: Remove duplicate newlinesMarek Vasut
Drop all duplicate newlines from config headers. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-07-05Merge branch 'qcom-main' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-snapdragon Various minor fixes and improvements: * Fix Qualcomm SPMI v5 support * Move default environment to a file * Add support for special pins (e.g ufs/mmc reset/data pins) * IPQ moves to OF_UPSTREAM and receives some cleanup and MAINTAINERS changes * Add a reset driver for devices without PSCI * msm8916 USB clock improvements for mobile devices
2024-07-05Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegraTom Rini
Branch contains minor improvemets for existing tegra devices along with bring up of 4 new devices (ASUS Transformers T20, Microsoft Surface RT, Lenovo Ideapad Yoga 11 and WEXLER Tab 7t).
2024-07-05Revert "CI Changes"Tom Rini
This change was brought in by accident, revert. This reverts commit 51aabf50e57f5139de31a4850347edbad8bb338b. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-07-05spmi: msm: correct max_channels for v5 controllersCaleb Connolly
Commit ee1d8aa5ecf7 ("spmi: msm: support controller version 7") broke support for channels > 128 on v5 controllers, resulting in some peripherals (like the power button / pon) working but others (like gpios) reading bogus data. Correct max_channels for v5 controllers. Fixes: ee1d8aa5ecf7 ("spmi: msm: support controller version 7") Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-05mach-snapdragon: move default environment to a fileCaleb Connolly
Make use of CONFIG_DEFAULT_ENV_FILE and move the default qcom environment to a file under board/qualcomm. This is much cleaner and means we don't need to recompile on changing the environment. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-05spmi: msm: demote to debug()Caleb Connolly
Most devices have buttons exposed via the PMIC, the button polling therefore triggers a log spam if debug logging is enabled. Demote these to debug() so that they aren't printed unless LOG_DEBUG is defined explicitly for this file. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-05pinctrl: qcom: sm8650: add special pins pins configuration dataNeil Armstrong
Add the special pins configuration data to allow setup the bias of the UFS and SDCard pins on the SM8650 SoC. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
2024-07-05pinctrl: qcom: sm8550: add special pins pins configuration dataNeil Armstrong
Add the special pins configuration data to allow setup the bias of the UFS and SDCard pins on the SM8550 SoC. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
2024-07-05pinctrl: qcom: add support setting pin configuration for special pinsNeil Armstrong
Use the previously introduced msm_special_pin_data to setup the special pins configuration if the SoC driver have them specified. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
2024-07-05arm: mach-snapdragon: gpio: introduce msm_special_pin_dataNeil Armstrong
In order to help setup pin configuration for special pins (UFS, SDCard), introduce the msm_special_pin_data struct largely inspired from the Linux conterpart but with only U-Boot required fields. This struct is added to the pins_data to allow specifying the special pins data for each SoC. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
2024-07-05pinctrl: qcom: add support for bias-pull-downNeil Armstrong
Add support for bias-pull-down as an alternate of bias-pull-up. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-07-05clock: qcom: ipq4019: add I2C clocksRobert Marko
I2C clocks are not initialized by the SBL, so lets add support for clocks required by both of the QUP I2C controllers. BLSP1 AHB clock is already initialized by SBL, but QUP I2C driver is requesting it so we have to add it to the enable list. Based off QCS404 clock driver. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2024-07-05MAINTAINERS: IPQ40XX: add pinctrl driverRobert Marko
Pinctrl drivers were moved to a dedicated directory but the entry was never updated, so add the pinctrl-ipq4019 driver entry. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2024-07-05MAINTAINERS: IPQ40XX: add clock-ipq4019 instead of reset driverRobert Marko
The reset handling was added to the clock drivers but the entry was never updated, so add the clock-ipq4019 driver instead. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2024-07-05MAINTAINERS: IPQ40XX: update GCC dt-bindingsRobert Marko
The separate clock and reset dt-bindings for IPQ40XX were merged into one recently, but the entry was not updated so do it now. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2024-07-05MAINTAINERS: IPQ40XX: remove Luka Kovacic as maintainerRobert Marko
Luka Kovacic is no longer at Sartura, so remove him as one of IPQ40xx maintainers. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2024-07-05arm: dts: drop downstream IPQ4019 DTSIRobert Marko
We want to use OF_UPSTREAM on IPQ40XX as its well supported upstream, so lets drop our downstream DTSI. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Acked-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-05mach-ipq40xx: use OF_UPSTREAMRobert Marko
Now that drivers are compatible enough with the upstream DTS, there is no reason to not use the upstream DTS, so imply OF_UPSTREAM by default. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Acked-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-05mach-ipq40xx: add CPU specific codeRobert Marko
Provide basic DRAM info population from DT, cache setting and the board_init stub. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Acked-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-05sysreset: add Qualcomm PSHOLD reset driverRobert Marko
Number of Qualcomm ARMv7 SoC-s did not use PSCI but rather used PSHOLD (Qualcomm Power Supply Hold Reset) bit to trigger reset or poweroff. Qualcomm IPQ40XX is one of them, so provide a simple sysreset driver based on the upstream Linux one, it is DT compatible as well. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-05ehci: msm: bring up iface + core clocksSam Day
This seems to be necessary on my samsung-a5. Without this patch, the first access of EHCI registers causes a bus stall and subsequent reset. I am unsure why this wasn't already necessary for db410c, perhaps those clocks are already enabled on boot. Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Sam Day <me@samcday.com> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-05clk/qcom: apq8016: add support for USB_HS clocksSam Day
The newer "register map for simple gate clocks" support added for qcom clocks is used. As a result gcc_apq8016 now has a mixture of the old and new styles. I didn't (and still don't!) feel comfortable enough in this area to update the existing code. Signed-off-by: Sam Day <me@samcday.com> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-05qcom_defconfig: enable msm8916 and msm8996Caleb Connolly
Enable the clock/pinctrl drivers for these two SoCs. Previously left out due to only being used on the db410c and db820c respectively which both have their own board code. We can still boot these with most features working without that board code. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Sam Day <me@samcday.com>
2024-07-05board: lenovo: ideapad-yoga-11: add Lenovo Ideapad Yoga 11 supportJonas Schwöbel
The Lenovo IdeaPad Yoga 11 is a hybrid laptop/tablet Windows RT-based computer released in late 2012. The device uses a 1.3 GHz quad-core Nvidia Tegra 3 chipset with 2 GB of RAM, features a 11.6 inch 1366x768 screen and 32/64 GB of internal memory that can be supplemented with a microSDXC card slot, full size SD card slot and 2 full size USB 2.0 ports. Tested-by: Jethro Bull <jethrob@hotmail.com> Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-07-05board: microsoft: surface-rt: add Microsoft Surface RT supportJonas Schwöbel
Surface RT is a hybrid tablet computer developed and manufactured by Microsoft and shipped with Windows RT. The tablet uses a 1.3 GHz quad-core Nvidia Tegra 3 chipset with 2 GB of RAM, features 10.8 inch 1366x768 screen and 32/64 GB of internal memory that can be supplemented with a microSDXC card giving up to 200 GB of additional storage. Tested-by: Jethro Bull <jethrob@hotmail.com> Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-07-05board: wexler: qc750: add WEXLER Tab 7t supportSvyatoslav Ryhel
WEXLER Tab 7t is a mini tablet computer developed by WEXLER that runs the Android operating system. The device features a 7.0-inch (180 mm) HD display, an Nvidia Tegra 3 quad-core chip, 1 GB of RAM, 8, 16 or 32 GB of storage that can be supplemented with a microSDXC card giving up to 64 GB of additional storage and a full size USB port. Tested-by: Maksim Kurnosenko <asusx2@mail.ru> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-07-05board: asus: transformer: add ASUS Transformer T20 family supportSvyatoslav Ryhel
The Asus Eee Pad Transformer family are 2-in-1 detachable/slider tablets developed by Asus that run the Android operating system. The Eee Pad Transformers feature a 10.1-inch (260 mm) display, an Nvidia Tegra 2 dual-core chip, 1 GB of RAM, and 16/32 GB of storage. Transformers board derives from Nvidia Ventana development board. This patch brings support for all 3 known T20 Transformers: - Asus Eee Pad Transformer TF101 - Asus Eee Pad Transformer TF101G - Asus Eee Pad Slider SL101 Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 Tested-by: Antoni Aloy Torrens <aaloytorrens@gmail.com> # ASUS TF101 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-07-05arm: tegra20: bct: add missing <vsprintf.h>Svyatoslav Ryhel
Fixes implicit declaration of function 'hextoul' Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-07-05configs: transformer: simplify boot commandSvyatoslav Ryhel
Drop boot device sequence re-definition since now it is default. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-07-05include: configs: tegra-common-post: make usb first boot targetSvyatoslav Ryhel
This ensures that the device can boot from a USB device prior to MMC. Useful cases are when installing a new OS from USB while MMC still has a working OS configuration or if the OS configuration is broken in late boot stages (kernel boots but the system does not start). Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-07-05video: tegra20: dc: use nvidia,head property to identify DC controllerSvyatoslav Ryhel
Use existing nvidia,head device tree property to get DC controller id. Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-07-05configs: paz00: enable EDID supportSvyatoslav Ryhel
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-07-04Merge patch series "xtensa: Enable qemu-xtensa board"Tom Rini
Jiaxun Yang <jiaxun.yang@flygoat.com> says: Hi all, This series enabled qemu-xtensa board. For dc232b CPU it needs to be built with toolchain[1]. This is a side product of me investigating architectures physical address != virtual address in U-Boot. Now we can get it covered under CI and regular tests. VirtIO devices are not working as expected, due to U-Boot's assumption on VA == PA everywhere, I'm going to get this fixed later. My Xtensa knowledge is pretty limited, Xtensa people please feel free to point out if I got anything wrong. Thanks [1]: https://github.com/foss-xtensa/toolchain/releases/download/2020.07/x86_64-2020.07-xtensa-dc232b-elf.tar.gz
2024-07-04CI ChangesJiaxun Yang
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04ci: Wire up qemu_xtensa_dc233cJiaxun Yang
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04doc: New documentation for qemu-xtensaJiaxun Yang
Introduce the board and provide instructions on how to get it work. Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04board: emulation: New board qemu-xtensaJiaxun Yang
Introduce the new board, define every bits. Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04dts/upsteam: Add Makefile for xtensaJiaxun Yang
It is required to get it xtensa OF_UPSTREAM work. Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04drivers: cpu: Add xtensa CPU driverJiaxun Yang
Implement various CPU related functions. I'm actually just using it to get cpu clock frequency. Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04drivers: serial: Add xtensa semihosting driverJiaxun Yang
Add xtensa semihosting driver. It can't use regular semihosting driver as Xtensa's has it's own semihosting ABI. Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04xtensa: Bring in semihosting headers and config optionsJiaxun Yang
They are all directly imported from Linux kernel. Reviewed-by: Max Filippov <jcmvbkbc@gmail.com> Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04xtensa: Define PLATFORM_ELFFLAGSJiaxun Yang
u-boot.elf target requires it to work. Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04xtensa: Implement phys virt conversion for PTP_MMUJiaxun Yang
For PTP_MMU our physical address is not directly mapped into virtual address space, we need to access physical memory from those fixed map segments. Implement phys_to_virt and virt_to_phys hook to reflect this setting. Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04xtensa: Correct define of _end symbolJiaxun Yang
So U-Boot is using _end symbol to detect location of devicetree appended at the end of the ROM. It needs to be calculated based on end of .data load address, as in our lds .current address is address in RAM. Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-07 03:21:21 +0000