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2025-06-12arm: mach-k3: j784s4: Call do_board_detect() before DDR probingEmanuele Ghidoli
Call do_board_detect() hook before the K3 DDRSS driver gets probed. It will allow boards to adjust DDR timings in do_board_detect(). Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
2025-06-11Merge patch series "Update the kbuild system to 5.1"Tom Rini
Ilias Apalodimas <ilias.apalodimas@linaro.org> says: Another series backporting and merging patches from Linux 5.1 kbuild. There is still a gap that I plan to update after this series gets merged [0] [0] https://source.denx.de/u-boot/custodians/u-boot-tpm/-/commit/5da099cef04fb5c02dcafab8d1bab8ddc2855765 Link: https://lore.kernel.org/r/20250611202449.2317279-1-ilias.apalodimas@linaro.org
2025-06-11kbuild: fix single target build for external moduleIlias Apalodimas
Backported from kernel commit e07db28eea38 ("kbuild: fix single target build for external module") It's worth noting that crmodverdir is empty for U-Boot. Just backport it to make diffing easier Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-06-11kbuild: make 'archprepare' depend on 'scripts'Ilias Apalodimas
Backported from kernel commit 059bc9fc375e ("kbuild: make 'archprepare' depend on 'scripts'") Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-06-11kbuild: mark prepare0 as PHONY to fix external module buildIlias Apalodimas
Backported from kernel commit e00d88804814 ("kbuild: mark prepare0 as PHONY to fix external module build") Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-06-11kbuild: skip parsing pre sub-make code for recursionIlias Apalodimas
Backported from kernel commit 221cc2d27ddc ("kbuild: skip parsing pre sub-make code for recursion") Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-06-11kbuild: do not overwrite .gitignore in output directoryIlias Apalodimas
Backported from kernel commit 156e7cbb3ef5 ("kbuild: do not overwrite .gitignore in output directory") Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-06-11gcc-9: silence 'address-of-packed-member' warningIlias Apalodimas
Backported from kernel commit 6f303d60534c ("gcc-9: silence 'address-of-packed-member' warning") Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-06-11kbuild: remove meaningless prepare2 targetIlias Apalodimas
Backported from kernel commit 4f1c1008e786 ("kbuild: remove meaningless prepare2 target") Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-06-11kbuild: gitignore output directoryIlias Apalodimas
Backported from kernel commit 3a51ff344204 ("kbuild: gitignore output directory" Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-06-11kbuild: use -Werror=implicit-... instead of -Werror-implicit-...Ilias Apalodimas
Backported from kernel commit b89f25ea7892 ("kbuild: use -Werror=implicit-... instead of -Werror-implicit-..." Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-06-11kbuild: clang: choose GCC_TOOLCHAIN_DIR not on LDIlias Apalodimas
Backported from kernel commit ad15006cc784 ("kbuild: clang: choose GCC_TOOLCHAIN_DIR not on LD") Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-06-11kbuild: use assignment instead of define ... endef for filechk_* rulesIlias Apalodimas
Backported from kernel commit ba97df45581f ("kbuild: use assignment instead of define ... endef for filechk_* rules") Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-06-11kbuild: add -Werror=implicit-int flag unconditionallyIlias Apalodimas
Backported from kernel commit 61a0902a06d6a ("kbuild: add -Werror=implicit-int flag unconditionally") Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-06-11kbuild: add -fno-PIE flag unconditionallyIlias Apalodimas
Backport from kernel commit 42a92bccd213 ("kbuild: add -fno-PIE flag unconditionally") Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-06-11Merge patch series "dm: core: use {s,u}32 instead of int for ↵Tom Rini
dev_read_{s,u}32_default" Quentin Schulz <foss+uboot@0leil.net> says: Out of all the dev_read_*_default functions, only two do not properly use the type as argument and return type: dev_read_u32_default and dev_read_s32_default. They both use int instead of u32/s32. Considering that it's generally not guaranteed that an int is 4 bytes but also for consistency sake, let's have them use the expected type. Note that I have not tested this, just stumbled upon that inconsistency by chance. Link: https://lore.kernel.org/r/20250528-dev_read_x32_default-v1-0-6ab1734dd7a2@cherry.de
2025-06-11dm: core: use s32 instead of int for dev_read_s32_defaultQuentin Schulz
dev_read_s32_default is for getting an s32 from a Device Tree property and allows to take a default value if that property is missing. Considering it calls ofnode_read_u32_default which takes a u32 and returns a u32, it should do the same instead of using an int, especially considering that int size is typically architecture-specific, as opposed to s32/u32. s32 and u32 being the same size, dev_read_s32* functions calling ofnode_read_u32_default shouldn't be an issue (at the type level at least) as the information will be stored appropriately in 4B regardless of the sign. This incidentally matches all other dev_read_*_default functions. Fixes: a1b17e4f4c82 ("dm: core: Add a function to read into a unsigned int") Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2025-06-11dm: core: use u32 instead of int for dev_read_u32_defaultQuentin Schulz
dev_read_u32_default is for getting a u32 from a Device Tree property and allows to take a default value if that property is missing. Considering it calls ofnode_read_u32_default which takes a u32 and returns a u32, it should do the same instead of using an int, especially considering that int size is typically architecture-specific, as opposed to u32. This incidentally matches all other dev_read_*_default functions (except dev_read_s32_default which will be tackled in the next commit). Fixes: 47a0fd3bad38 ("dm: core: Implement live tree 'read' functions") Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2025-06-11Merge tag 'u-boot-stm32-20250611' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-stm into next CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/26607 - Add clock and reset drivers support for STM32MP25 - Add STM32H747-Discovery board support - Add tamp_nvram driver - Add SPL support and clock tree init to STM32MP13 RCC driver - Add STM32MP13xx ram support - Add support for STM32 Image V2.0 for STM32MP13xx - Fix SYSRAM size on STM32MP13xx - Fix DBGMCU macro on STM32MP13xx - Auto-detect ROM API table on STM32MP15xx
2025-06-11board: stm32: add stm32h747-discovery board supportDario Binacchi
The board includes an STM32H747XI SoC with the following resources: - 2 Mbytes Flash - 1 Mbyte SRAM - LCD-TFT controller - MIPI-DSI interface - FD-CAN - USB 2.0 high-speed/full-speed - Ethernet MAC - camera interface Detailed information can be found at: https://www.st.com/en/evaluation-tools/stm32h747i-disco.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11ARM: dts: stm32: add stm32h747i-disco-u-boot DTS fileDario Binacchi
Add stm32h747i-disco-u-boot DTS file with FMC SDRAM node and its pinmux settings. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11ARM: dts: stm32: support STM32h747i-disco boardDario Binacchi
The board includes an STM32H747XI SoC with the following resources: - 2 Mbytes Flash - 1 Mbyte SRAM - LCD-TFT controller - MIPI-DSI interface - FD-CAN - USB 2.0 high-speed/full-speed - Ethernet MAC - camera interface Detailed information can be found at: https://www.st.com/en/evaluation-tools/stm32h747i-disco.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/r/20250427074404.3278732-9-dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> [ upstream commit: 49ba8fc6eab63165639ffbb9f976222d39739cab ] (cherry picked from commit 19c508dc3d584dc81c0cc6a05576f436022db5b6)
2025-06-11ARM: dts: stm32: add an extra pin map for USART1 on stm32h743Dario Binacchi
Add an additional pin map configuration for using the USART1 controller on the stm32h743 MCU. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/r/20250427074404.3278732-8-dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> [ upstream commit: 8e71dfe46a4a1e9505b1a327470f879b63388968 ] (cherry picked from commit 9d5ec2c9c5d5131e701447c5c32aaf6c688c6e01)
2025-06-11ARM: dts: stm32: add pin map for UART8 controller on stm32h743Dario Binacchi
Add a pin map configuration for using the UART8 controller on the stm32h743 MCU. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/r/20250427074404.3278732-7-dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> [ upstream commit: 47d16ab94b8e5e85aedba3cd22cfdf3877bf1dfb ] (cherry picked from commit 59621a6472cd6eeb748ed6d6202a21d0f3cc5a83)
2025-06-11ARM: dts: stm32: add uart8 node for stm32h743 MCUDario Binacchi
Add support for UART8 by applying the settings specified in the reference manual RM0433. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/r/20250427074404.3278732-6-dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> [ upstream commit: 07aa43adae2363c3734055aeba0789536fa0f8f2 ] (cherry picked from commit 8fe35c381c7c6db1b95c80be551afada1e9f28e0)
2025-06-11dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CKDario Binacchi
As stated in the reference manual RM0433, the STM32H743 MCU has USART1/2/3/6, UART4/5/7/8, and LPUART1. The patches make all the clock macros for the serial ports consistent with the documentation. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250427074404.3278732-5-dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> [ upstream commit: ecab3c40fa49a2073c4c916ebff9496a6b5db7bd ] (cherry picked from commit aae9a01929183784bf3e2a8001aba408bd0dadf3)
2025-06-11dt-bindings: arm: stm32: add compatible for stm32h747i-disco boardDario Binacchi
The board includes an STM32H747XI SoC with the following resources: - 2 Mbytes Flash - 1 MByte SRAM - LCD-TFT controller - MIPI-DSI interface - FD-CAN - USB 2.0 high-speed/full-speed - Ethernet MAC - camera interface Detailed information can be found at: https://www.st.com/en/evaluation-tools/stm32h747i-disco.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250427074404.3278732-3-dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> [ upstream commit: 815d49f61ea049075482161f897aa13e1ae30cbb ] (cherry picked from commit 06f64674b332c7db4ac56a4dccb0e960d25bea24)
2025-06-11ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandlesDario Binacchi
Allow expanding possible configurations for the same peripheral, consistent with the scheme adopted in Linux. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/r/20250427074404.3278732-2-dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> [ upstream commit: 6a36dca4375fce51b627f5a985a79fc8b8bd7f55 ] (cherry picked from commit 9a72c83f2e670087ae2d6dc54d2926f16c6762d0)
2025-06-11stm32mp: Add tamp_nvram driverSimeon Marijon
TAMP backup registers will be exposed as nvmem cells. Each registers ([0..127] for STM32MP2, [0..31] for STM32MP1) could be exposed as nvmem cells under the nvram node in device tree Signed-off-by: Simeon Marijon <simeon.marijon@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-06-11tools: stm32image: Add support for STM32 Image V2.0Marek Vasut
Add support for generating STM32 Image V2.0, which is used by STM32MP13xx. The image header layout is similar to STM32MP15xx STM32 Image V1.0, but is different enough to justify duplicate functions to generate the v2 image. This code at least attempts to align the V1 and V2 image handling where possible. Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
2025-06-11ram: stm32mp1: Add STM32MP13xx supportMarek Vasut
Add support for configuring DRAM controller on STM32MP13xx SoC. The DRAM controller is basically identical to the DWC controller on STM32MP15xx SoC, except the bus width is reduced from 32bit to 16bit and a few registers and bits are therefore not present. Handle the difference by factoring these parts out. Use IS_ENABLE() as much as possible to assure code which is not enabled on builds for a single SoC gets compiled out. Handle the different offset of RCC_DDRITFCR register and missing DDRC2 clock the same way. Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
2025-06-11clk: stm32mp13: Add SPL support and clock tree init to STM32MP13 RCC driverMarek Vasut
Add SPL support and clock tree init to STM32MP13 RCC driver. This consists of two parts, make SCMI into an optional dependency and add clock tree initialization. The SCMI dependency is made optional first by registering the few core clock provided by SCMI clock as fixed clock, and second by letting the clock core parse out the clock configuration from SoC registers. The clock initialization code is derived from STM32MP15xx clock tree initialization code, which is almost identical, except for the use of new PLL2000 for PLL1 on STM32MP13xx . Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
2025-06-11clk: stm32mp13: Fix typo in STM32MP13 RCC driverMarek Vasut
Fix basic typo, missing t in security . No functional change . Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11ARM: stm32: Auto-detect ROM API table on STM32MP15xxMarek Vasut
The ROM API table location is passed to the SPL by BootROM in register r0, make use of this, store the content of r0 and later use it to access the ROM API table to determine current boot device. Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11ARM: stm32: Fix DBGMCU macro on STM32MP13xxMarek Vasut
The DBGMCU block is available at address 0x50081000 both on STM32MP13xx and on STM32MP15xx . There is no reason to limit the DBGMCU macro being set only on STM32MP15xx , remove the ifdeffery. Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11ARM: stm32: Fix SYSRAM size on STM32MP13xxMarek Vasut
The STM32MP13xx has only 128 kiB of SYSRAM starting at address 0x2ffe0000 . The STM32MP15xx has 256 kiB of SYSRAM starting at address 0x2ffc0000 . Make sure both SoCs configure ARMV7_SECURE_BASE correctly . Define the SYSRAM base in stm32.h to be consistent with the STM32MP15xx macro. Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11ARM: stm32: Drop unnecessary spaceMarek Vasut
Drop a space after tab, no functional change. Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11configs: stm32mp25: increase SYS_MALLOC_F_LEN to 0x60000Patrice Chotard
Due activation of SCMI, we need to increase SYS_MALLOC_F_LEN value to avoid following message: U-Boot 2025.04-01224-g75b77a2a6d31-dirty (Apr 25 2025 - 11:23:30 +0200) alloc space exhausted ptr 400040 limit 400000 alloc space exhausted ptr 400020 limit 400000 alloc space exhausted ptr 400060 limit 400000 alloc space exhausted ptr 400060 limit 400000 Set SYS_MALLOC_F_LEN to 0x60000 to fix this issue. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-06-11configs: stm32mp13: increase SYS_MALLOC_F_LEN to 0x210000Patrice Chotard
Due SCMI update to protocol v2.0, we need to increase SYS_MALLOC_F_LEN value to avoid following message: alloc space exhausted ptr 200040 limit 200000 Set SYS_MALLOC_F_LEN to 0x210000 to fix this issue. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11ARM: dts: stm32: switch from fixed to scmi clocks for stm32mp257f-ev1Patrice Chotard
SCMI clocks are now available, switch from fixed to SCMI clocks. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-06-11reset: stm32mp25: add stm32mp25 reset driverGabriel Fernandez
Implement STM32MP25 reset drivers using stm32-core-reset API. This reset stm32-reset-core API and will be able to use DT binding index started from 0. This patch also moves legacy reset into stm32 directory reset. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11clk: stm32: fix clock counterGabriel Fernandez
In RCC the ops of the CCF registered CLK device can be called directly, this patch avoid recursive call of clk_ function done by CCF clock framework which update the clock information, for example clk_enable is called 2 times, clkp->enable_count is increased 2 times. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Sean Anderson <seanga2@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11phy: stm32-usbphyc: manage properly the clk identifier with CCFPatrick Delaunay
Add private uclass data for "stm32-usbphyc-clk" as it is not done by the driver model. This clk struct is needed by CCF to save the unique id used to identify each clock. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Sean Anderson <seanga2@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11clk: scmi: manage properly the clk identifier with CCFPatrick Delaunay
Each clock identifier needs to be unique when CCF is activated, and it is not respected today by SCMI clock driver. This patch supports a unique clk id by using the uclass API clk_get_id() / dev_clk_dm() and by activating by default CONFIG_CLK_AUTO_ID with CCF which adds an offset to the SCMI clock identifiers. After this patch, the SCMI clock driver can coexist with other clock provider without conflict, they can share internal identifier [0..N] defined in their binding and the clock ID = 0 (reserved for dummy clock) is no more used. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Sean Anderson <seanga2@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11clk: fixed_rate: configure clock ID with CONFIG_CLK_AUTO_IDPatrick Delaunay
Update CLK ID to avoid 0 id, used for dummy clock with CCF and to allow selection by clk_get_by_id, used to get private data associated to the UCLASS_CLK device Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Sean Anderson <seanga2@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11sandbox: test: update for CONFIG_CLK_AUTO_ID supportPatrick Delaunay
Update the existing test dm_test_clk_ccf() with new CLK_ID macro. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Sean Anderson <seanga2@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11clk: sandbox: update driver for CONFIG_CLK_AUTO_ID supportPatrick Delaunay
Update the sandbox driver to allow support of the CONFIG_CLK_AUTO_ID by using the new API clk_get_id() to get the internal SANDBOX identifier. With CONFIG_CLK_AUTO_ID, clk->id have the also seq identifier. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Sean Anderson <seanga2@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11clk: add CONFIG_CLK_AUTO_IDPatrick Delaunay
Add a new config CONFIG_CLK_AUTO_ID to support a unique clk id for all the clock providers, managed by clk uclass, when the clock reference arg[0] is the same. When the CONFIG is activated, the clock id is limited to the lower CLK_ID_SZ = 24 bits in default clock xlate function and the sequence number + 1 of the clk provider device is added for the 8 higher bits. We use sequence number + 1 to avoid the "dummy" clock id = 0, used for invalid clock when CCF is activated. When this config is activated, the new function clk_get_id() should be used to get back the internal reference to clock for the each clock provider. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Sean Anderson <seanga2@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11clk: stm32mp25: implement clock check security functionGabriel Fernandez
Check clock security to avoid access at boot time. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Sean Anderson <seanga2@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11clk: stm32mp25: Add clock driver supportGabriel Fernandez
Add clock driver support for STM32MP25 SoCs. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Valentin Caron <valentin.caron@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Sean Anderson <seanga2@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-06 13:38:42 +0000