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2024-07-05arm: mach-snapdragon: gpio: introduce msm_special_pin_dataNeil Armstrong
In order to help setup pin configuration for special pins (UFS, SDCard), introduce the msm_special_pin_data struct largely inspired from the Linux conterpart but with only U-Boot required fields. This struct is added to the pins_data to allow specifying the special pins data for each SoC. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
2024-07-05pinctrl: qcom: add support for bias-pull-downNeil Armstrong
Add support for bias-pull-down as an alternate of bias-pull-up. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-07-05clock: qcom: ipq4019: add I2C clocksRobert Marko
I2C clocks are not initialized by the SBL, so lets add support for clocks required by both of the QUP I2C controllers. BLSP1 AHB clock is already initialized by SBL, but QUP I2C driver is requesting it so we have to add it to the enable list. Based off QCS404 clock driver. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2024-07-05MAINTAINERS: IPQ40XX: add pinctrl driverRobert Marko
Pinctrl drivers were moved to a dedicated directory but the entry was never updated, so add the pinctrl-ipq4019 driver entry. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2024-07-05MAINTAINERS: IPQ40XX: add clock-ipq4019 instead of reset driverRobert Marko
The reset handling was added to the clock drivers but the entry was never updated, so add the clock-ipq4019 driver instead. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2024-07-05MAINTAINERS: IPQ40XX: update GCC dt-bindingsRobert Marko
The separate clock and reset dt-bindings for IPQ40XX were merged into one recently, but the entry was not updated so do it now. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2024-07-05MAINTAINERS: IPQ40XX: remove Luka Kovacic as maintainerRobert Marko
Luka Kovacic is no longer at Sartura, so remove him as one of IPQ40xx maintainers. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2024-07-05arm: dts: drop downstream IPQ4019 DTSIRobert Marko
We want to use OF_UPSTREAM on IPQ40XX as its well supported upstream, so lets drop our downstream DTSI. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Acked-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-05mach-ipq40xx: use OF_UPSTREAMRobert Marko
Now that drivers are compatible enough with the upstream DTS, there is no reason to not use the upstream DTS, so imply OF_UPSTREAM by default. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Acked-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-05mach-ipq40xx: add CPU specific codeRobert Marko
Provide basic DRAM info population from DT, cache setting and the board_init stub. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Acked-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-05sysreset: add Qualcomm PSHOLD reset driverRobert Marko
Number of Qualcomm ARMv7 SoC-s did not use PSCI but rather used PSHOLD (Qualcomm Power Supply Hold Reset) bit to trigger reset or poweroff. Qualcomm IPQ40XX is one of them, so provide a simple sysreset driver based on the upstream Linux one, it is DT compatible as well. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-05ehci: msm: bring up iface + core clocksSam Day
This seems to be necessary on my samsung-a5. Without this patch, the first access of EHCI registers causes a bus stall and subsequent reset. I am unsure why this wasn't already necessary for db410c, perhaps those clocks are already enabled on boot. Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Sam Day <me@samcday.com> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-05clk/qcom: apq8016: add support for USB_HS clocksSam Day
The newer "register map for simple gate clocks" support added for qcom clocks is used. As a result gcc_apq8016 now has a mixture of the old and new styles. I didn't (and still don't!) feel comfortable enough in this area to update the existing code. Signed-off-by: Sam Day <me@samcday.com> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-05qcom_defconfig: enable msm8916 and msm8996Caleb Connolly
Enable the clock/pinctrl drivers for these two SoCs. Previously left out due to only being used on the db410c and db820c respectively which both have their own board code. We can still boot these with most features working without that board code. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Sam Day <me@samcday.com>
2024-07-04Merge patch series "xtensa: Enable qemu-xtensa board"Tom Rini
Jiaxun Yang <jiaxun.yang@flygoat.com> says: Hi all, This series enabled qemu-xtensa board. For dc232b CPU it needs to be built with toolchain[1]. This is a side product of me investigating architectures physical address != virtual address in U-Boot. Now we can get it covered under CI and regular tests. VirtIO devices are not working as expected, due to U-Boot's assumption on VA == PA everywhere, I'm going to get this fixed later. My Xtensa knowledge is pretty limited, Xtensa people please feel free to point out if I got anything wrong. Thanks [1]: https://github.com/foss-xtensa/toolchain/releases/download/2020.07/x86_64-2020.07-xtensa-dc232b-elf.tar.gz
2024-07-04CI ChangesJiaxun Yang
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04ci: Wire up qemu_xtensa_dc233cJiaxun Yang
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04doc: New documentation for qemu-xtensaJiaxun Yang
Introduce the board and provide instructions on how to get it work. Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04board: emulation: New board qemu-xtensaJiaxun Yang
Introduce the new board, define every bits. Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04dts/upsteam: Add Makefile for xtensaJiaxun Yang
It is required to get it xtensa OF_UPSTREAM work. Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04drivers: cpu: Add xtensa CPU driverJiaxun Yang
Implement various CPU related functions. I'm actually just using it to get cpu clock frequency. Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04drivers: serial: Add xtensa semihosting driverJiaxun Yang
Add xtensa semihosting driver. It can't use regular semihosting driver as Xtensa's has it's own semihosting ABI. Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04xtensa: Bring in semihosting headers and config optionsJiaxun Yang
They are all directly imported from Linux kernel. Reviewed-by: Max Filippov <jcmvbkbc@gmail.com> Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04xtensa: Define PLATFORM_ELFFLAGSJiaxun Yang
u-boot.elf target requires it to work. Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04xtensa: Implement phys virt conversion for PTP_MMUJiaxun Yang
For PTP_MMU our physical address is not directly mapped into virtual address space, we need to access physical memory from those fixed map segments. Implement phys_to_virt and virt_to_phys hook to reflect this setting. Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04xtensa: Correct define of _end symbolJiaxun Yang
So U-Boot is using _end symbol to detect location of devicetree appended at the end of the ROM. It needs to be calculated based on end of .data load address, as in our lds .current address is address in RAM. Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04xtensa: Move dram_init to xtfpga board fileJiaxun Yang
This is a board level stuff. Tested-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-04CI: Make pytest export JUnitXMLTom Rini
Both GitLab and Azure (and other CI systems) have native support for displaying JUnitXML test report results. The pytest framework that we use can generate these reports. Change our CI tests so that they will generate these reports and then have the respective CI platform pick them up. We write to different locations because of where each CI is (and isn't) able to easily pass things along. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-07-04test/py/tests: Update some network dependenciesTom Rini
On tests which require "tftpboot" we need to depend not on cmd_net but rather cmd_tftpboot. And on tests which require cmd_pxe we do not need to also depend on cmd_net as this should be handled already via Kconfig logic. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-07-04Merge patch series "testb: Various tweaks and fixes for Labgrid"Tom Rini
Simon Glass <sjg@chromium.org> says: This series includes a number of mostly unrelated changes which are in service of running U-Boot on a lab using Labgrid.
2024-07-04smbios: Correct error handling when writing tablesSimon Glass
Since write_smbios_table() returns an address, we cannot use it to return and error number. Also, failing on sysinfo_detect() breaks existing boards, e.g. chromebook_link Correct this by logging and swallowing the error. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: a5a57562856 ("lib: smbios: Detect system properties via...")
2024-07-04test: Check help outputSimon Glass
The current test doesn't check anything about the output. If a bug results in junk before the output, this is not currently detected. Add a check for the first line being the one expected. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-07-04test: Decode exceptions only with sandboxSimon Glass
When a real board fails we don't want to decode the exception. Reserve that behaviour for sandbox. Also avoid raising a new exception on failure - just re-raise the existing one. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-07-04test: dm: Show failing driver nameSimon Glass
When a driver is not registered properly it is not clear which one it is. Adjust test_dm_compat() to show this. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-07-04log: Allow tests to pass with CONFIG_LOGF_FUNC_PAD setSimon Glass
This setting pads out the function names. Adjust the test to handle this, since some boards use it. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-07-04test: Make bootstd init run only on sandboxSimon Glass
Tests for standard boot need disks to be set up, which can only be done on sandbox, since adjusting disks on real hardware is not currently supported. Mark the init function as sandbox-only. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-07-04google: Disable TPMv2 on most ChromebooksSimon Glass
This feature is not present on older Chromebooks, so disable the setting. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-07-04sunxi: Mark scp as optionalSimon Glass
This binary does not prevent the system from booting. Mark it optional so that U-Boot can be built without it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2024-07-04am33xx: Provide a function to set up the debug UARTSimon Glass
Since commit 0dba45864b2a ("arm: Init the debug UART") the debug UART is set up in _main() before early_system_init() is called. Add a suitable board_debug_uart_init() function to set up the UART in SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-07-04initcall: Correct use of relocation offsetSimon Glass
The relocation offset can change in some initcall sequences. Handle this and make sure it is used for all debugging statements in init_run_list() Update the trace test to match. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-04dm: core: Enhance comments on bind_drivers_pass()Simon Glass
This part of driver model is a little subtle, so add some more comments to promote better understanding. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-07-04trace: Update test to tolerate different trace-cmd versionSimon Glass
Some versions of trace-cmd (or some machines?) show one less dot in the CPU list. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-07-03Merge patch series "cmd: avoid duplicate weak functions"Tom Rini
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> says: [trini: Patch 1/3 was replaced by my series merged just prior to this, Heinrich's cover letter is lightly edited and any mistakes are my own] If we have multiple weak implementations of functions, the linker might choose any of these. The EFI sub-systems uses invalidate_icache_all() after loading binaries. Both the EFI sub-system and cmd/cache.c provide a weak invalidate_icache_all() function. Remove the EFI instance. For ARM11 functional implementation of invalidate_icache_all is missing. Add it.
2024-07-03efi_loader: avoid duplicate weak invalidate_icache_all()Heinrich Schuchardt
If multiple weak implementations of a weak function exist, it is unclear which one the linker should chose. cmd/cache.c already defines a weak invalidate_icache_all(). We don't need a call to invalidate_icache_all() on x86. ARM, RISC-V, and Sandbox provide an implementation. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-07-03arm: implement invalidate_icache_all on ARM11Heinrich Schuchardt
In EFI sub-system we rely on invalidate_icache_all() to invalidate the instruction cache after loading binaries. Add the missing implementation on ARM1136, ARM1176. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-07-03Merge patch series "m68k: Implement a default flush_dcache_all"Tom Rini
Tom Rini <trini@konsulko.com> says: Prior to this series we had some de-facto required cache functions that were either unimplemented on some architectures or differently named. This would lead in some cases to having multiple "weak" functions available as well. Rework things so that an architecture must provide these functions and it is up to that architecture if a "weak" default function makes sense, or not.
2024-07-03cmd: cache: Remove weak functionsTom Rini
It should be up to an architecture to decide how to implement cache functions, and if they need to use weak functions or not. Allowing the cache command to be built without cache functionality implemented is unhelpful. Further, guard the call to noncached_set_region with CONFIG_SYS_NONCACHED_MEMORY as that's when it's implemented and again is an architecture specific detail. Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-07-03powerpc: Add the old invalidate_icache_all functionTom Rini
Add the old invalidate_icache_all function that prints a warning that was previously found in cmd/cache.c Signed-off-by: Tom Rini <trini@konsulko.com>
2024-07-03powerpc: Implement a default flush_dcache_allTom Rini
Implement a weak default version of flush_dcache_all which is based on the ARM default, which is to flush the entire range via flush_dcache_range(...). Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-07-03sh: Add the old invalidate_icache_all functionTom Rini
Add the old invalidate_icache_all function that prints a warning that was previously found in cmd/cache.c Signed-off-by: Tom Rini <trini@konsulko.com>
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