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2022-05-23ARM: dts: sun8i: V3/V3s/S3: Sync from Linux v5.18-rc1Samuel Holland
Copy the devicetree source for the V3(s)/S3 SoCs and all existing boards verbatim from the Linux v5.18-rc1 tag. This commit also adds the following new board devicetrees: - sun8i-s3-elimo-initium.dts - sun8i-v3-sl631-imx179.dts This update should not impact any existing U-Boot functionality. Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23ARM: dts: sunxi: H2+/H3/H5: Sync from Linux v5.18-rc1Samuel Holland
Copy the devicetree source for the H2+/H3/H5 SoCs and all existing boards from the Linux v5.18-rc1 tag. To maintain ABI compatibility with existing LTS kernels, one change moving some IP blocks to the r_intc interrupt controller is excluded. This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2. This commit also adds the following new board devicetree: - sun8i-h3-nanopi-r1.dts This update should not impact any existing U-Boot functionality. Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23ARM: dts: sun8i: A83T: Sync from Linux v5.18-rc1Samuel Holland
Copy the devicetree source for the A83T SoC and all existing boards from the Linux v5.18-rc1 tag. To maintain ABI compatibility with existing LTS kernels, one change moving some IP blocks to the r_intc interrupt controller is excluded. This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2. As with the other SoCs, updates of note include adding detection GPIO properties in the USB PHY nodes. Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23ARM: dts: sun9i: Sync from Linux v5.18-rc1Samuel Holland
Copy the devicetree source for the A80 SoC and all existing boards verbatim from the Linux v5.18-rc1 tag. This update should not impact any existing U-Boot functionality. Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23ARM: dts: sunxi: A13/A31/A23/A33: Sync from Linux v5.18-rc1Samuel Holland
Copy the devicetree source for the A10s/A13/GR8, A31(s), and A23/A33/R16 SoCs and all existing boards from the Linux v5.18-rc1 tag. These changes are combined into one commit due to interdependencies: - The unit addresses were removed from bitbanged I2C buses, which drives a Kconfig default change. This affects sun5i-a13-utoo-p66.dts and sun6i-a31-colombus.dts. - The pinctrl nodes were renamed, including some used by the shared header sunxi-reference-design-tablet.dtsi. To maintain ABI compatibility with existing LTS kernels, one change moving some IP blocks to the r_intc interrupt controller is excluded. This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2. This commit renames the file sun8i-r16-nintendo-nes-classic-edition.dts to sun8i-r16-nintendo-nes-classic.dts to match the Linux tree. This commit also adds the following new board devicetrees: - sun5i-a13-licheepi-one.dts - sun5i-a13-pocketbook-touch-lux-3.dts - sun5i-gr8-evb.dts - sun8i-a23-ippo-q8h-v1.2.dts - sun8i-a23-ippo-q8h-v5.dts - sun8i-a33-et-q8-v1.6.dts - sun8i-a33-ippo-q8h-v1.2.dts - sun8i-r16-nintendo-super-nes-classic.dts As with the other SoCs, updates of note are conversion of GPIO pull-up from pinconf to GPIO flags and renaming the detection GPIO properties in the USB PHY nodes. Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23ARM: dts: sun4i: Sync from Linux v5.18-rc1Samuel Holland
Copy the devicetree source for the A10 SoC and all existing boards verbatim from the Linux v5.18-rc1 tag. This commit also adds the following new board devicetree: - sun4i-a10-topwise-a721.dts While this update should not impact any existing U-Boot functionality, the changes to the USB PHY detection GPIO properties are needed to convert that driver to use the DM GPIO framework. Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23ARM: dts: sun7i: Sync from Linux v5.18-rc1Samuel Holland
Copy the devicetree source for the A20 SoC and all existing boards verbatim from the Linux v5.18-rc1 tag. This commit also adds the following new board devicetrees: - sun7i-a20-haoyu-marsboard.dts - sun7i-a20-linutronix-testbox-v2.dts - sun7i-a20-olinuxino-lime-emmc.dts This update includes changes to the USB PHY detection GPIO properties which are needed to convert that driver to use the DM GPIO framework. Signed-off-by: Samuel Holland <samuel@sholland.org> [Andre: fix Mele M5 U-Boot only DT] Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-05-23ARM: dts: sunxi: Remove unused devicetree headersSamuel Holland
These files are not included anywhere and do not exist in the Linux devicetree source. Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23dt-bindings: sunxi: Update clock/reset binding headersSamuel Holland
Some devicetree updates make use of newly-exposed clocks and resets. To support that, copy the binding headers from the Linux v5.18-rc1 tag. Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-20Merge https://source.denx.de/u-boot/custodians/u-boot-usbTom Rini
2022-05-20usb: dwc3: Fix non-usb3 configurationsJan Kiszka
Missing nodes may also be signaled via -ENODATA. We need to check for that to prevent failing in non-usb3 setups. Furthermore, dev.phy must be NULL'ed in case usb3-phy was not found. Fixes: 142d50fbce7c ("usb: dwc3: Add support for usb3-phy PHY configuration") Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2022-05-20Merge tag 'u-boot-stm32-20220520' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-stm - spi: fix busy bit check in stm32_qspi driver - stm32mp15: configure Buck3 voltage per PMIC NVM on Avenger96 board
2022-05-20usb: xhci-dwc3: Support role switch default roleMark Kettenis
When the device tree indicates support for role switching through the "usb-role-switch" property, take the "role-switch-default-mode" property into account when deciding which role to put the controller into. This makes USB devices work on Apple M1 systems where the device tree may include a "dr_mode" property that is set to "otg", but where we need to put the controller into "host" mode to see devices connected to the type-C ports. Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2022-05-19spi: stm32_qspi: Remove SR_BUSY bit check before sending commandPatrice Chotard
Waiting for SR_BUSY bit when receiving a new command is not needed. SR_BUSY bit is already managed in the previous command treatment. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-19spi: stm32_qspi: Always check SR_TCF flags in stm32_qspi_wait_cmd()Patrice Chotard
Currently, SR_TCF flag is checked in case there is data, this criteria is not correct. SR_TCF flags is set when programmed number of bytes have been transferred to the memory device ("bytes" comprised command and data send to the SPI device). So even if there is no data, we must check SR_TCF flag. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-19ARM: dts: stm32: Configure Buck3 voltage per PMIC NVM on Avenger96Marek Vasut
The Avenger96 board comes in multiple regulator configurations. - rev.100 or rev.200 have Buck3 preconfigured to 3V3 operation on boot and contains extra Enpirion EP53A8LQI DCDC converter which supplies the IO. Reduce Buck3 voltage to 2V9 to not waste power. - rev.200L have Buck3 preconfigured to 1V8 operation and have no Enpirion EP53A8LQI DCDC anymore, the IO is supplied from Buck3. Configure the Buck3 voltage on this board per PMIC NVM settings and update buck3 voltage limits in DT passed to OS before booting OS to prevent potential hardware damage. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-18Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- Misc Kconfig cleanups (Chris & Pali) - turris_omnia: Fix hangup in debug UART (this introduces TPL/SPL_DEBUG_UART_BASE) Pali - mvebu: uDPU: include fixed-phy support (Robert) - pinctrl: probe pinctrl drivers during post-bind (Robert)
2022-05-17pinctrl: probe pinctrl drivers during post-bindRobert Marko
Currently, pinctrl drivers only get probed if pinconf is actually being used, however on SoC-s like Armada 3720 pinctrl driver is a also the GPIO driver. So, if the pinctrl driver doesn't get probed GPIO-s won't get registered and thus they cannot be used. This is a problem on the Methode eDPU as it just uses SB pins as GPIO-s and without them being registered networking won't work as it only has one SFP slot and the TX disable GPIO is on the SB controller. So, probe the pinctrl drivers using DM_FLAG_PROBE_AFTER_BIND like LED uclass does. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-17mvebu: uDPU: include fixed-phy supportRobert Marko
uDPU relies on using fixed-phy for the SFP support, and since the fixed-phy parsing was moved to the generic driver instead of mvneta networking stopped working on uDPU with: uDPU>> dhcp dm_eth_phy_connect failed This is due to the conversion commit not enabling fixed-phy support in defconfig like it did for other boards. Fixes: 77fcf3cf1251 ("net: mvneta: Convert to use PHY_FIXED for fixed-link") Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-17arm: mvebu: turris_{omnia,mox}: Enable CONFIG_NETCONSOLEPali Rohár
This allows to use U-Boot console on Turris devices via network. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-17arm: mvebu: Fix DEBUG_UART_BASE for all 32-bit boardsPali Rohár
UART base address is located in internal registers. Internal registers for 32-bit mvebu boards in SPL are at address 0xd0000000 and in proper U-Boot at address 0xf1000000. Fix DEBUG_UART_BASE option for all 32-bit mvebu boards. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-17arm: mvebu: turris_omnia: Fix DEBUG_UART_BASEPali Rohár
Internal registers in SPL are at address 0xd0000000 and in proper U-Boot at address 0xf1000000. UART base address is located in internal registers. Fix DEBUG_UART_BASE option to correct value for both SPL and proper U-Boot. This change fixes hangup of proper U-Boot when it is trying to print something via debug UART. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-17serial: ns16550: Add support for SPL_DEBUG_UART_BASEPali Rohár
Use CONFIG_VAL(DEBUG_UART_BASE) instead of CONFIG_DEBUG_UART_BASE, so proper config value (CONFIG_DEBUG_UART_BASE or CONFIG_SPL_DEBUG_UART_BASE) is used based on building target. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-17serial: Add new config option TPL_DEBUG_UART_BASEPali Rohár
TPL_DEBUG_UART_BASE is same as DEBUG_UART_BASE, but applies only for TPL. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Stefan Roese <sr@denx.de>
2022-05-16serial: Add new config option SPL_DEBUG_UART_BASEPali Rohár
SPL_DEBUG_UART_BASE is same as DEBUG_UART_BASE, but applies only for SPL. In some cases base address of UART is different in SPL and proper U-Boot. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-16arm: mvebu: Move internal registers in arch_very_early_init() functionPali Rohár
Moving of internal registers from INTREG_BASE_ADDR_REG to SOC_REGS_PHY_BASE needs to be done very early, prior calling any function which may touch internal registers, like debug_uart_init(). So do it earlier in arch_very_early_init() instead of arch_cpu_init(). Movement is done in proper U-Boot, not in SPL. SPL may return to bootrom and bootrom requires internal registers at (old) expected location. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-16arm: Add new config option ARCH_VERY_EARLY_INITPali Rohár
When this option is set then ARM _main() function would call arch_very_early_init() function at the beginning. It would be before calling any other functions like debug_uart_init() and also before initializing C runtime environment. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-16arm: mvebu: Remove unused ARMADA_64BITChris Packham
Nothing selects ARMADA_64BIT. Instead the 64-bit SoCs just select ARM64 directly. Remove the unused config item. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-16cmd: mvebu: Hide bubt specific options when bubt is disabledPali Rohár
CONFIG_MVEBU_NAND_BOOT, CONFIG_MVEBU_SPI_BOOT, CONFIG_MVEBU_MMC_BOOT and CONFIG_MVEBU_UBOOT_DFLT_NAME are unused when CONFIG_CMD_MVEBU_BUBT is not enabled. So hide them. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-11Merge branch '2022-05-11-Kconfig-cleanups-etc'Tom Rini
- Migrate CONFIG_MTD_CONCAT to Kconfig, use CONFIG_VAL/IS_ENABLED in more places, rename SPL_LEGACY_IMAGE_SUPPORT to SPL_LEGACY_IMAGE_FORMAT and update some related dependencies for TI platforms.
2022-05-11Makefile: update warning about CONFIG_OF_EMBEDRalph Siemsen
Update the diagnostic message with revised location of document, which changed in 3e9fddfc4f1 ("doc: Move devicetree control doc to rST") Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
2022-05-11board_r: use IS_ENABLED(CONFIG_NEEDS_MANUAL_RELOC) in board_init_r()Ovidiu Panait
Drop CONFIG_NEEDS_MANUAL_RELOC ifdefs in board_init_r() and use IS_ENABLED() instead. Also, use the MANUAL_RELOC() macro to update the initcall pointers. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
2022-05-11Convert CONFIG_MTD_CONCAT to KconfigChris Packham
This converts the following to Kconfig: CONFIG_MTD_CONCAT Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-11common/console.c: use CONFIG_VAL() with PRE_CON_BUF_* variablesRasmus Villemoes
There is currently no support for PRE_CONSOLE_BUFFER in SPL, but if and when that gets implemented, one would almost certainly want to use a different address and/or size for the buffer (e.g., U-Boot proper might specify an address in DRAM and a generous buffer, while SPL would be much more constrained). So a prerequisite for adding SPL_PRE_CONSOLE_BUFFER is to make the code use SPL_-specific values. No functional change. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-05-11boot: Kconfig: Enable FIT processing by default on TI secure devicesAndrew Davis
TI secure devices chain-of-trust depends on FIT image processing, enable it by default on these devices. This also reduces the delta between the secure and non-secure defconfig files. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-11boot: Kconfig: Disable non-FIT loading for TI secure devicesAndrew Davis
Non-FIT image loading support should be disabled for TI secure devices as the image handlers for those image types do not follow our secure boot checks. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-11spl: Force disable non-FIT loading for TI secure devicesAndrew Davis
Booting of non-FIT images bypass our chain-of-trust boot flow, these options should not be allowed when high security is set. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-11spl: Rename Kconfig SPL_LEGACY_IMAGE_SUPPORT to SPL_LEGACY_IMAGE_FORMATAndrew Davis
This matches what this support is called in the non-SPL case. The postfix _SUPPORT is redundant as enabling Kconfig options implies support. With this we can use CONFIG_IS_ENABLED() as needed. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-10Merge tag 'u-boot-stm32-20220510' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-stm Add new STM32 MCU boards and Documentation STM32 programmer improvements video: support several LTDC HW versions and fix data enable polarity board: fix stboard error message, consider USB cable connected when boot device is USB configs: stm32mp1: set console variable for extlinux.conf configs: stm32mp1: add support for baudrate higher than 115200 for ST-Link ARM: stm32mp: Fix Silicon version handling and ft_system_setup() phy: stm32-usbphyc: Add DT phy tuning support arm: dts: stm32mp15: alignment with v5.18 ram: Conditionally enable ASR mach-stm32mp: psci: retain MCUDIVR, PLL3CR, PLL4CR, MSSCKSELR across suspend configs: Use TFTP_TSIZE on DHSOM and STMicroelectronics boards ARM: stm32: Use default CONFIG_TFTP_BLOCKSIZE on DHSOM pinctrl: stm32: rework GPIO holes management
2022-05-10Merge tag 'i2c-2022-07' of https://source.denx.de/u-boot/custodians/u-boot-i2cTom Rini
i2c changes for 2022.07 - i2c: ihs: intel: Fix typo in comments Patch from Michal - misc: atsha204a: Add support for atsha204 chip from Pali
2022-05-10misc: Fix always compiling MISC even for SPL/TPLSean Anderson
We should only build support for misc if the appropriate SPL/TPL symbol is defined. To ease the transition, make SPL/TPL_MISC default to MISC. This is necessary because many drivers don't specify their dependencies properly. These defaults can be removed once all drivers depend on the appropriate config. Fixes: aaba703fd0 ("spl: misc: Allow misc drivers in SPL and TPL") Signed-off-by: Sean Anderson <sean.anderson@seco.com> [trini: Add VPL_MISC symbol, handle like SPL/TPL_MISC] Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-10doc: Add documentation for STM32 MCUsPatrice Chotard
Add documentation for STM32 MCUs (F4, F7 and H7 series). Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10configs: stm32746g-eval: Add stm32746g-eval_spl_defconfigPatrice Chotard
Add stm32746g-eval_spl_defconfig for stm32746g evaluation board to build SPL. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10configs: stm32746g-eval: Add stm32746g-eval_defconfigPatrice Chotard
Add stm32746g-eval_defconfig for stm32746g evaluation board to build U-Boot proper. Full board description can be found here : https://www.st.com/en/evaluation-tools/stm32746g-eval.html Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10configs: stm32f746-disco: use CONFIG_DEFAULT_DEVICE_TREE as fdtfilePatrice Chotard
As stm32f46-disco, stm32f769-disco and stm32746g-eval are very similar except their respective device tree file. These 3 boards uses the same TARGET_STM32F746_DISCO flag (so same include/configs/stm32f746-disco.h and same board file board/st/stm32f746-disco/stm32f746-disco.c) To be able to compile these 3 boards, replace the hard-coded device-tree name in include/configs/stm32f746-disco.h by CONFIG_DEFAULT_DEVICE_TREE which is set in each board defconfig file with the correct value. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10board: stm32f746-disco: Fix dram_init() in none SPL configPatrice Chotard
Replace CONFIG_SUPPORT_SPL by CONFIG_SPL_BUILD to allow dram_init() execution when using none SPL defconfig (stm32f746-disco_defconfig). Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10configs: stm32f746-disco: Migrate SPL flags to defconfigPatrice Chotard
Migrate SPL flags to stm32f746-disco_spl_defconfig Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10configs: stm32f769-disco: Migrate SPL flags to defconfigPatrice Chotard
Migrate SPL flags to stm32f769-disco_spl_defconfig Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10configs: stm32f769-disco: Add stm32f769-disco_defconfigPatrice Chotard
Add stm32f769-disco_defconfig for stm32f769 discovery board to build U-Boot proper. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-05-10configs: stm32f769-disco: Rename stm32f769-disco_defconfig to ↵Patrice Chotard
stm32f769-disco_spl_defconfig The current stm32f769-disco_defconfig file supports SPL, rename it to stm32f769-disco_spl_defconfig to reflect the supported configuration. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>