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This adds the missing empty entry at the end of mtk_i2c_ids[].
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
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Add a Kconfig option to disable sending Stop conditions between multiple
i2c_msgs within a single xfer. Enable this config by default for ARCH_K3
platforms.
Signed-off-by: Aniket Limaye <a-limaye@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
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Repeated Start Condition (Sr) can be used to transfer multiple i2c msgs
without sending a Stop condition (P). So far, the driver default was to
always send a Stop condition after every i2c msg.
Add support for a config option (CONFIG_SYS_I2C_OMAP24XX_REPEATED_START)
to disable sending the Stop condition by default. If this config is
enabled, Stop condition will be sent only if explicitly requested in the
msg flags OR if it is the last msg in the transfer.
Consequently, handle the Repeated Start condition (Sr) in the next msg
by not calling the wait_for_bb() check since it will simply timeout in
the absence of a stop condition (BB will be 1 until Stop is programmed)
Signed-off-by: Aniket Limaye <a-limaye@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
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Remove __omap24_i2c_read/write() usage from omap_i2c_xfer() in favour of
the more flexible __omap24_i2c_xfer_msg().
Consequently, these are also no longer needed when DM_I2C is enabled.
New function __omap24_i2c_xfer_msg() will take care of individual read
OR write transfers with a target device. It goes through below sequence:
- Program the provided Target Chip address (OMAP_I2C_SA_REG)
- Program the provided Data len (OMAP_I2C_CNT_REG)
- Program the provided Control register flags (OMAP_I2C_CON_REG)
- Read from or Write to the provided Data buffer (OMAP_I2C_DATA_REG)
For a detailed programming guide, refer to the TRM[0] (12.1.3.4 I2C
Programming Guide).
This patch by itself should be a transparent change. However this is
needed for implementing a proper Repeated Start (Sr) functionality for
i2c_msgs.
Previous implementation for omap_i2c_xfer called __omap24_i2c_read/write
functions, with hardcoded addr=0 and alen=0 for each i2c_msg. Each of
these calls would program the registers always with a Stop bit set, not
allowing for a repeated start between i2c_msgs in the same xfer().
[0]: https://www.ti.com/lit/zip/spruj28 (TRM)
Signed-off-by: Aniket Limaye <a-limaye@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
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Remove unused piece of code under CONFIG_I2C_REPEATED_START which does
not have any Kconfig entry at all.
Signed-off-by: Aniket Limaye <a-limaye@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
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https://source.denx.de/u-boot/custodians/u-boot-at91
Second set of u-boot-at91 features for the 2025.07 cycle:
This feature set includes the addition of sam9x60 usb gadget, and a fix
for sama5d2 SPL.
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https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
Updates for RPi for 2025.07:
- copy over uart clock-frequency in DT
- always set fdt_addr with firmware-provided FDT address
- Set bootm_size to 512MB
- Drop fdt_high and initrd_high
- Update environment to support booti and large initrd
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https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2025-07-rc1-2
Documentation:
* dt_qemu: correct dumpdtb description
* release_cycle: Use variable substitution for next version
UEFI:
* cmd: simplify eficonfig_init()
* efi_selftest: check executing in EL2
* efi_selftest: use do_bootefi_exec()
Others:
* riscv: dts: jh7110: add bootph-pre-ram for &pllclk
* mips: malta: set MIPS_RELOCATION_TABLE_SIZE=0xc000
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MIPS_RELOCATION_TABLE_SIZE=0x8000 is too small to enable UNIT_TEST.
Increase it by 50 % (16 KiB).
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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Since commit f98cd471f06b ("clk: clk-composite: Resolve parent clock by
name") the StarFive VisionFive 2 board fails to boot.
Before that patch the SPL debug UART showed warnings like:
clk_register: failed to get pll0_out device (parent of perh_root)
clk_register: failed to get pll0_out device (parent of qspi_ref_src)
clk_register: failed to get pll0_out device (parent of usb_125m)
clk_register: failed to get pll0_out device (parent of gmac_src)
clk_register: failed to get pll0_out device (parent of gmac1_gtxclk)
clk_register: failed to get pll0_out device (parent of gmac0_gtxclk)
The &pllclk clock needs to be enabled early.
Fixes: f98cd471f06b ("clk: clk-composite: Resolve parent clock by name")
Suggested-by: Marek Vasut <marex@denx.de>
Tested-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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Use only a single -machine parameter.
Describe that the same invocation of qemu-system-<arch> has to be
used for dumping the device-tree as will be used when executing U-Boot.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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The EFI selftest should match executing a real EFI binary
as closely as possible.
Use do_bootefi_exec() to enter the EFI selftest.
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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UEFI binaries should be executed in EL2 or EL1 even if U-Boot is started
in EL3. Provide a unit test.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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To avoid the problem fixed in commit 57a95d522ca8 ("doc: release_cycle:
fix next release version") moving forward, make use of the variable
substitution feature of rST. This adds a next_ver variable and
references it in all of the places where I had been listing the version
being worked on.
Suggested-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Tested-by: Quentin Schulz <quentin.schulz@cherry.de>
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As the system table already has pointers to the Simple Text Input and
Output Protocols we can directly use these instead of calling
OpenProtocol.
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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Unfortunately this change breaks boot on K3 platform.
U-Boot will hang after:
U-Boot SPL 2025.04-01050-ga40fc5afaec0 (Apr 14 2025 - 07:31:32 +0000)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)')
This reverts commit 197376fbf300e92afa0a1583815d9c9eb52d613a as
suggested in [1].
[1] https://lists.denx.de/pipermail/u-boot/2025-April/587032.html
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
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The PIT timer needs to be available early in the SPL phase,
otherwise SPL fails to boot and only prints:
Could not initialize timer (err -96)
Fix this problem by passing 'bootph-all' to the sama5d2 PIT node.
Signed-off-by: Fabio Estevam <festevam@denx.de>
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Enable USB gadget usb0 node support.
Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
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Add the USB gadget DT node for the sam9x60 SoC's.
Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
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Rather than maintaining custom hush scripting to boot the SDK, migrate
to a 'standard boot' method which simplifies maintenance and enables
multiple distributions to use this evaluation module.
Signed-off-by: Bryan Brattlof <bb@ti.com>
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CU_CLKOUT0 can be driven by two input clocks: a 25 MHz and a 50 MHz source.
Currently, the 25 MHz option is not selectable due to an incorrect mux
configuration where the 50 MHz clock is duplicated in the parent list.
This patch fixes the mux setup, allowing proper selection of the 25 MHz
clock source for MCU_CLKOUT0.
Similar configuration is already correctly implemented in AM62 clock
data for 'hsdiv4_16fft_main_2_hsdivout1_clk10', where MCU_CLKOUT0
parent switching behaves as expected.
Link: http://downloads.ti.com/tisci/esd/latest/5_soc_doc/am62px/clocks.html#clocks-for-board0-device
Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
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https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx/FPGA changes for v2025.07-rc1
AMD/Xilinx:
- Synchronize enums around tcm_mode
- Access bootmode registers via firmware interface
- Setup default values for DEBUG_UART
- Fix dfu alt buffer clearing
- Convert loadpdi command to fpga
- Fix board detection code
- Minor defconfig updates
Versal:
- Wire multi_boot register
Versal Gen 2:
- Enable missing drivers
- Wire i2c FRU decoding at start
- Wire saving variables to different locations
- Disable default DEBUG_UART
- Wire USB/UFS boot and fix access via firmware interface
- Minor fixes
ZynqMP/Kria:
- Enable mkfwumdata
- Topic board update
- Enhance binman configurations
- Kria usb update
BuR:
- Add multiple Zynq based boards
cadence_ospi:
- Enable device reset
fpga:
- Add support for loading bitstream for Altera SoCs
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Christian Marangi <ansuelsmth@gmail.com> says:
This is continuation of the initial patchset for airoha
support.
Some are trivial fix for spi.
A new concept to setup SPI from detected NAND.
Sadly DTS node still need to be merged upstream so we
are currently adding them to u-boot dtsi and it's planned
to be dropped once they are accepted in upstream kernel.
Link: https://lore.kernel.org/r/20250407200208.25594-1-ansuelsmth@gmail.com
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Enable Airoha SNFI SPI config to enable support for SNAND flash.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Add SNAND node to Airoha AN7581 EVB DTS to enable support for attached
SNAND flash.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Add Airoha SPI NAND driver to permit usage of attached SNAND on the
Airoha AN7581 SoC. While SPI controller supports DMA transation, due to
U-Boot limitation we currently limit it to single command in Manual
mode.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Call SPI setup_for_spinand() if supported and defined to configure the
SPI slave for the attached NAND. This is needed to configure the SPI
with the NAND page size and spare size for correct configuration of the
device.
Call it as soon as the NAND is detected to correctly handle SPI
controller with select_op_variant detection.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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A common device attached to SPI are SPI NAND and some device might
require to have info on the attached NAND to know the flash page size
and spare size.
To support this, introduce setup_for_spinand() that pass the attached
spinand info from manufacturer.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
[trini: Switch to forward declaration of struct spinand_info]
Signed-off-by: Tom Rini <trini@konsulko.com>
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Drop unneeded spi.h header include from spinand.h, nothing included by
spi.h is actually used in this header and .c should correctly included
spi.h if actually needed.
Replace spi.h with linux/bitops.h as this is what is actually required
for spinand.h
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Port Linux kernel regmap_set/clear_bits shorthands to set and clear bits
in a regmap. These are handy if only specific bits needs to be applied
or cleared and makes it easier to port regmap based driver from kernel
upstream.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Enable Mediatek MMC driver in Airoha AN7581 EVB defconfig to add support
for it in default images.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Add eMMC nodes with the fixed regulator and fixed clock. It's also
needed to assign the clock and set it to 200MHz as it's set to 150Mhz by
default.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Airoha new SoC implement the same Mediatek driver for MMC. Permit to
also build for Airoha arch.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Add Ethrnet nodes for Airoha AN7581 EVB board.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Add Ethrnet config to defconfig to enable Ethernet support.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Add airoha Ethernet driver for Airoha AN7581 SoC. This is a majorly
rewritten and simplified version of the Linux airoha_eth.c driver.
It's has been modified to support a single RX/TX ring to reflect U-Boot
implementation with recv and send API.
The struct and the define are kept as similar as possible to upstream
one to not diverge too much.
The AN7581 SoC include an Ethernet Switch based on the Mediatek MT753x
but doesn't require any modification aside from setting the CPU port and
applying the Flood configuration hence it can be handled entirely in the
Ethernet driver.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Add pending Chip SCU node for clock node.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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Add the driver for the Airoha EN8811H 2.5 Gigabit PHY. The PHY supports
100/1000/2500 Mbps with auto negotiation only.
The driver uses two firmware files, for which updated versions are added to
linux-firmware already.
Based on the Linux upstream 8811 driver code(air_en8811h.c),
I have modified the relevant process to align with the U-Boot boot sequence.
and have validated this on Banana Pi BPI-R3 Mini.
The MD32 FW is currently stored in eMMC partition 1 on Banana Pi BPI-R3 Mini,
and it is loaded from there.
Signed-off-by: Lucien.Jheng <lucienzx159@gmail.com>
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https://source.denx.de/u-boot/custodians/u-boot-marvell
CI: https://dev.azure.com/sr0718/u-boot/_build/results?buildId=390&view=results
- mvebu_espressobin_ultra-88f3720_defconfig: disable SATA
- helios4: enable ddr odt0 on write for both chip-select
- clearfog,helios4: disable sdhci sdma
- mvebu/bubt: Correct usage of IS_ENABLED() macro
- mvebu: Correct SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR usage
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This commit adds support for the brcp1, brsmarc2, brcp150 and brcp170
boards. This boards are based on the Xilinx Zynq SoC.
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20250404072819.69642-5-bernhard.messerklinger@br-automation.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
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Split br_resetc_bmode function to add support for reading of reset
reason in board code with br_resetc_bmode_get.
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Link: https://lore.kernel.org/r/20250404072819.69642-4-bernhard.messerklinger@br-automation.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
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Normally B&R reset controllers are located at I2C bus 0. This patch adds
the possibility to change this bus number with the kconfig option
BR_RESETC_I2CBUS.
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Link: https://lore.kernel.org/r/20250404072819.69642-3-bernhard.messerklinger@br-automation.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
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Now strlcpy is used to copy the defip string to the corresponding
environment variable. This preserves memory for the NULL termination.
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Link: https://lore.kernel.org/r/20250404072819.69642-2-bernhard.messerklinger@br-automation.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
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Read an eeprom after relocation which also shows information from
eeprom wired via nvmem aliases.
When DTB reselection is enabled eeprom is read before relocation
too but information is not showed. The issue about two i2c reads
in this case will be address separately.
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250409162639.588487-3-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
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Presently the multi dtb's are not using on versal Gen 2
platform, so remove CONFIG_DTB_RESELECT and CONFIG_MULTI_DTB_FIT
from defconfig.
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250409162639.588487-2-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
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Line 171 in README is describing that before relocation no code
should use global variable because global variables are placed
to BSS section which is initialized to 0 after relocation.
In the case of ZynqMP, where DTB reselection is enabled, the EEPROM
is read again after relocation. This prevents the issue from being
observed. However, in Versal Gen 2, where DTB reselection is also
enabled, the EEPROM is not read after relocation because it is not
yet wired in board_init(). This leads to a situation where the code
accesses an incorrect memory location, because none is really
checking the board_info is valid or not. To fix, move the board_info
into the data section and also check whether it is valid or not.
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20250409162553.588285-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
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Enable saving variables to MMC(FAT) and SPI based on primary
bootmode. If bootmode is JTAG, dont save env anywhere(NOWHERE).
Enable ENV_FAT_DEVICE_AND_PART="0:auto" for Versal Gen 2 platform.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250411154612.107136-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
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HBM stands for high bandwidth memory and is a type of memory interface used
in 3D-stacked DRAM (dynamic random access memory) in some AMD GPUs (aka
graphics cards), as well as the server, high-performance computing (HPC)
and networking and client space. High Bandwidth Memory(HBM) has total 16
channels, one channel is divided into two pseudo channels which makes its
32 banks each with some amount of memory.
And then we have DDR_LOW PS low, DDR_HIGH0 PS high, DDR_HIGH1 PS very high
and pretty much there should be also place for PL DDR. So maximum number of
memory banks will be 36, updating the CONFIG_NR_DRAM_BANKS to 36.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20250410092528.3713904-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
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Adding support for the usb distro boot command.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/121b6879efde0b83d3933852442895631c4cb24f.1744273853.git.michal.simek@amd.com
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Adding support for the ufs distro boot command.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c0e6737ae4119963afc8ea19b49b998a013d06c4.1744273853.git.michal.simek@amd.com
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