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2022-04-12clk: imxrt: Use dts for anatop base addressJesse Taube
In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
2022-04-12mmc: fsl_esdhc_imx: Add i.MX8MP compatible stringMarek Vasut
Add compatible string for i.MX8MP, which permits i.MX8MP to use HS400ES mode, just like all the other i.MX8M. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Haibo Chen <haibo.chen@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-04-12ARM: imx: romapi: Repair FlexSPI NOR boot offsetMarek Vasut
The FlexSPI NOR boot offset does not require any special handling, the image_offset is correct in either case (0x1000 for FlexSPI NOR and 0x8000 for SD/eMMC) and the offset of u-boot.itb from the start of flash.bin is always 0x58000 on MX8MN/MX8MP, which matches the CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8000 in case CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300, which is always the case on MX8MN/MX8MP. The CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR is really overloaded in case of the MX8MN/MX8MP, but fixing that needs additional plumbing. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2022-04-12ARM: dts: imx: Add flexspi node to i.MX8MPMarek Vasut
Add flexspi DT node matching Linux kernel as of commit d7cd74466651e ("arm64: dts: imx8mp: Reorder flexspi clock-names entry") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-04-12spi: nxp_fspi: Add i.MX8MP compatible stringMarek Vasut
The i.MX8M Mini and i.MX8M Plus flexspi IPs are compatible with one another, however the linux kernel DT uses separate compatible string for each SoC. Add the missing i.MX8MP compatible into this driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-04-12board: gateworks venice: add support for GPY111 phyTim Harvey
The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy due to part availability. Add support for it by adding LED config and dt-prop based internal delay config tx-delay/rx-delay per PHY ID. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2022-04-12board: venice: add spl_board_loader_nameTim Harvey
Implement spl_board_loader_name to provide more meaningful device names vs MMC1 and MMC2. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-12imx8m{m,n}-venice-gw7902: add GSC ADC rail for VDD_5P0Tim Harvey
The GW7902-C revision adds an ADC for the VDD_5P0 voltage rail. Add register definitions for it. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2022-04-12imx8m{m,n}_venice: update boot_net script to load fdtTim Harvey
Update the 'boot_net' script to load the fdt with the kernel. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-12ARM: renesas: reduce rcar3_salvator-x image sizeHeinrich Schuchardt
rcar3_salvator-x u-boot.img is very close to the 0x100000 size limit. Enable linked time optimization (LTO). Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-12ARM: dts: imx: Add support for Data Modul i.MX8M Mini eDM SBCMarek Vasut
Add support for Data Modul i.MX8M Mini eDM SBC board. This is an evaluation board for various custom display units. Currently supported are serial console, ethernet, eMMC, SD, SPI NOR, USB host and USB OTG. Reviewed-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2022-04-12imx8mm-cl-iot-gate: Add redundand environment supportFabio Estevam
Add redundand environment support as it is required by SWUpdate. While at it, also adjust the CONFIG_ENV_OFFSET to a more appropriate larger offset as done on other i.MX8M defconfigs. Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-04-12imx8mm-cl-iot-gate: Retrieve the serial number from EEPROMFabio Estevam
The serial number is located at offset 0x14 of the EEPROM under i2c0 bus at address 0x54. To print the serial number in Linux: SERNUM=$(cat /proc/device-tree/serial-number) echo $SERNUM Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-04-12imx8mm-cl-iot-gate: Retrieve the MAC address from EEPROMFabio Estevam
Currently the eth0 MAC address is randomly assigned. Retrieve the MAC address from EEPROM. Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-04-12imx8mm-cl-iot-gate: Retrieve the DDR type from EEPROMFabio Estevam
Currently, the DDR type is retrieved by iteracting inside an array of possible DDR types. This may take saveral attempts, which slows the overall U-Boot process and does not provide a good user experience: U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000) DDRINFO: Cfg attempt: [ 1/6 ] DDRINFO(M): mr5-8 [ 0xff000010 ] DDRINFO(T): mr5-8 [ 0x5000010 ] resetting ... U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000) DDRINFO: Cfg attempt: [ 2/6 ] DDRINFO(M): mr5-8 [ 0xff000010 ] DDRINFO(T): mr5-8 [ 0x1061010 ] resetting ... U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000) DDRINFO: Cfg attempt: [ 3/6 ] DDRINFO(M): mr5-8 [ 0xff000010 ] DDRINFO(T): mr5-8 [ 0xff000010 ] Normal Boot WDT: Not starting Trying to boot from MMC2 NOTICE: BL31: v2.5(release):v2.5 NOTICE: BL31: Built : 07:12:44, Jan 24 2022 Improve the boot time by retrieving the correct DDR information from the EEPROM: U-Boot SPL 2022.04-rc4-00045-g6d02bc40d58c (Mar 19 2022 - 08:22:29 -0300) DDRINFO(D): Kingston 4096G DDRINFO(M): mr5-8 [ 0xff000010 ] DDRINFO(E): mr5-8 [ 0xff000010 ] Normal Boot WDT: Started watchdog@30280000 with servicing (60s timeout) Trying to boot from MMC2 NOTICE: BL31: v2.5(release):v2.5 NOTICE: BL31: Built : 22:28:11, Mar 15 2022 Based on the original code from Compulab's U-Boot. Tested on a imx8mm-cl-iot-gate board populated with 4GB of RAM. Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-04-12imx8mm-cl-iot-gate: Add SPL EEPROM supportFabio Estevam
imx8mm-cl-iot-gate supports multiple DDR sizes and models. The DDR type can be retrieved from the EEPROM, so add SPL code that can be used to get the DDR information. Based on the original code from Compulab's U-Boot. Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-04-12bsh: imx8mn-smm-s2/pro: Add iMX8MN BSH SMM S2 boardsAriel D'Alessandro
Introduce BSH SystemMaster (SMM) S2 board family, which consists of: iMX8MN SMM S2 and iMX8MN SMM S2 PRO boards. Add support for iMX8MN BSH SMM S2 board: - 256 MiB DDR3 RAM - 512MiB Nand - USBOTG1 peripheral - fastboot. - 100Mbit Ethernet Add support for iMX8MN BSH SMM S2 PRO board: - 512 MiB DDR3 RAM - 8 GiB eMMC - USBOTG1 peripheral - fastboot. - 100Mbit Ethernet Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-04-12net: phy: nxp-tja11xx: Add NXP TJA11xx PHY driverMichael Trimarchi
Add driver for the NXP TJA1100 and TJA1101 PHYs. These PHYs are special BroadRReach 100BaseT1 PHYs used in automotive. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-12net: phy: Add phy_modify() accessorAriel D'Alessandro
Add read-modify-write unlocked accessor for accessing a PHY register. Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-04-12iopoll: Extend read_poll_timeout macro to support variable parametersAriel D'Alessandro
This macro currently supports only one parameter. Based on Linux iopoll, let's extend read_poll_timeout common API to allow multiple variable parameters. Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
2022-04-12phy: nxp-c45-tja11xx: Rename functions to be c45 tja11xx specificAriel D'Alessandro
This driver supports NXP C45 TJA11XX PHYs, but there're also other NXP TJA11XX PHYs. Let's rename functions in this driver to be c45 variant specific, so further drivers can be introduced adding support for NXP TJA11XX PHYs. Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
2022-04-12imx8m: add init_nand_clkMichael Trimarchi
Add init_nand_clk to enable gpmi nand clock. Since i.MX8M not use CCF, so we still use legacy mode to configure the clock. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-04-12imx8m: add regs used by GPMIMichael Trimarchi
Add regs used by GPMI Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-04-12ARM: imx8mm: verdin-imx8mm: Drop superfluous headerMarek Vasut
The power/bd71837.h should no longer be included, since V1.1 SoM uses only the PCA9450 PMIC and the BD71837 support was removed. Drop the header too. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Max Krummenacher <max.krummenacher@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12driver: pwm: pwm-imx: separe dm from non dm implementationTommaso Merciai
Separe dm implementation from non dm implementation of pwm-imx driver using CONFIG_DM_PWM Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
2022-04-12drivers: pwm: pwm-imx: move pwm-imx-util into pwm-imxTommaso Merciai
Move pwm_imx_get_parms, pwm_id_to_reg functions into pwm-imx.c and drop off pwm-imx-util.c Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
2022-04-12imx: mx7dsabresd: enable DM_SERIALPeng Fan
Enable CONFIG_DM_SERIAL, and `dm tree` could show: serial 1 [ ] serial_mxc | |-- serial@30a80000 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12imx8mq: soc: Set the BYPASS ID SWAP bit (GPR10 bit 1)Peng Fan
Set the BYPASS ID SWAP bit (GPR10 bit 1). The ID SWAP function randomly make TZASC grant non-secure access to secure memory. TZASC ID SWAP should be bypassed by setting the bit TZASC_ID_SWAP_BYPASS(bit 1) in IOMUX_GPR10 register. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12board: colibri-imx6ull: fix detecting sd cardMarcel Ziswiler
Turns out on certain carrier boards (e.g. Iris V2) and under certain circumstances (e.g. after a software reset) the SD card may have been left in a strange state which later failed as follows: Colibri iMX6ULL # mmc dev 0 Card did not respond to voltage select! : -110 Fix this as follows: - Re-name the signaling voltage rail regulator from vmmc to vqmmc. - Fix the name of the GPIO property to gpios. - Specify 4-bit bus width, no write-protect capability and no 1.8 volt signaling voltage capability. - Fix the clock vs. command pull-up vs. push-pull configuration. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12configs: colibri-imx6ull/-emmc: use micrel ksz8xxx phy driverMarcel Ziswiler
Use the Micrel KSZ8xxx specific Ethernet PHY driver rather than the generic one. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12colibri-imx6ull: fix nand bch geometryMarcel Ziswiler
Fix NAND BCH geometry as otherwise the following errors are observed upon boot: ... Loading Environment from NAND... NAND read from offset 380000 failed -74 ... NAND read from offset 800 failed -74 ... ubi0 error: ubi_io_read: error -74 (ECC error) while reading 64 bytes from PEB 0:0, read 64 bytes ... Fixes: ed48490f8d3f ("mtd: gpmi: fix the bch setting backward compatible issue") Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12disk: part: add the device search failed log msgOleksii Bidnichenko
Add missing error message to blk_get_device_part_str. Signed-off-by: Oleksii Bidnichenko <oleksii.bidnichenko@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12board: colibri-imx6ull: fix detecting ethernet phyPhilippe Schenker
Now that it is possible to use regulator-fixed-clock make use of it. This makes U-Boot detect the PHY on first cold-boot. This commit also adjusts the code in setup_fec and follows how it is done in mx6ullevk.c This commit also slows down the boot-process by about 150ms as it now waits for the regulator-fixed-clock voltage that drives the PHY to go up. If you rely on very fast boot-speeds and don't need ethernet for your boot-process you can safely revert the changes on imx6ull-colibri.dtsi Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12regulator: fixed: add possibility to enable by clockPhilippe Schenker
This commit adds the possibility to choose the compatible "regulator-fixed-clock" in devicetree. This is a special case of regulator-fixed where a clock has to be used to switch the regulator on and off. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12board: colibri-imx6ull: Do not leave variant variable unsetPhilippe Schenker
Toradex uses the variable variant to distinguish between modules with eMMC, NAND with wifi and NAND without wifi. This variable is set on every boot. Set this variable also if we have a NAND module without wifi to prevent issues. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12apalis-tk1: avoid save environment unaskedDenys Drozdov
U-Boot should never save the environment unasked. This also avoids storing broken fdt_module to flash. Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12apalis-imx6: avoid save environment unaskedDenys Drozdov
U-Boot should never save the environment unasked. This also avoids storing broken ftd_file to eMMC. Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12colibri-imx6ull: drop vidargs and remove video= settingsOleksandr Suvorov
Since we envision using overlays for display interfaces, the video= settings within vidargs are obsolete. Remove these settings from the U-Boot. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12include: colibri_vf: add missing tdxargs variablePhilippe Schenker
All the other NAND-based boards have tdxargs specified for setting manual kernel command-line arguments. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12configs: verdin-imx8mm: verdin-imx8mp: enable dm serialMarcel Ziswiler
Enable driver model for serial. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12arm64: dts: imx8mm-u-boot.dtsi: imx8mp-u-boot.dtsi: use atf-bl31 typeMarcel Ziswiler
Explicitly use the atf-bl31 type for the bl31.bin atf-blob. This uses the path from the BL31 environment variable, if defined. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-04-12ARM: imx8mm: verdin-imx8mm: Rework board_early_init()Marek Vasut
Rename board_early_init_f() to board_early_init(), since this function has nothing to do with actual board_early_init_f() as used throughout U-Boot. The board_early_init() is function local to this board used to configure UART and WDT pinmux. Wrap init_uart_clk() into this function so that early UART init would be all in one place. Turn the function into __weak one, so it could be overridden in case custom carrier board uses different UART or needs custom IOMUX settings. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Max Krummenacher <max.krummenacher@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2022-04-12imx8m: soc: Relocate u-boot to the top DDR in 4GB spaceYe Li
The EFI memory init uses gd->ram_top for conventional memory. In current implementation, the ram_top is below optee address. This cause grub failed to allocation memory for initrd. The change updates DDR bank setup functions to place the u-boot at top DDR in 4GB space. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12imx8m: soc: drop phy-reset-gpios for fecPeng Fan
Need to drop phy-reset-gpios before booting linux, this property is legacy property and replaced with reset-gpios. If provide both, kernel would failed to request the same gpio twice and cause fec not work. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12imx: imx8m: soc: runtime drop extcon property from usbotg nodePeng Fan
The extcon is an decrepted property and not used by upstream Linux and NXP 5.10 kernel, so we remove it before kicking linux in case it is in dts. Otherwise distro kernel will not able to have usb function. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12imx: imx8mp: disable fused IP for UltraLitePeng Fan
Beside the fused modules on iMX8MP Lite, this part has also fused GPU3D/2D, LVDS and MIPI DSI. So we have to disable them for kernel and also disable MIPI DSI in u-boot DTS for splash screen at runtime. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12imx: imx8mp: detect i.MX8MP UltraLite when get cpu revPeng Fan
Detect i.MX8MP UltraLite in get_cpu_variant_type Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12imx: imx8mp: Add iMX8MP UltraLite Part cpu typePeng Fan
Add i.MX8MP UltraLite Part CPU type Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12mx6: ddr: Wait before issuing the first MRS cmdFrancesco Dolcini
Wait 1ms before issuing the first MRS command to write DDR3 Mode registers. There is a requirement to wait a minimum time before issuing command to the DDR3 device, according to the JEDEC standard this time is 500us (after RESET_n is de-asserted until CKE becomes active) + tXPR (Reset CKE Exit time, maximum value 360ns). It seems that for some reason this is not enforced by the MMDC controller. Without this change we experienced random memory initialization failures with about 2% boot failure rate on specific problematic boards, after this change we were able to do more than 10.000 power-cycle without a single failure. Fixes: fe0f7f7842e1 ("mx6: add mmdc configuration for MX6Q/MX6DL") Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-04-12mx6: ddr: Restore ralat/walat in write level calibrationFrancesco Dolcini
The current DDR write level calibration routine always overwrite the ralat/walat fields to their maximum value, just save the existing values at the beginning of the calibration routine and restore it at the end. In case the delay is estimated by the user to be more than one cycle the walat should be configured according to that, this is not automatically done. From the i.MX6 RM: The user should read the results of the associated delay-line at MPWLDECTRL#[WL_DL_ABS_OFFSET#] and in case the user estimates that the reasonable delay may be above 1 cycle then the user should indicate it at MPWLDECTRL#[WL_CYC_DEL#]. Moreover the user should indicate it in MDMISC[WALAT] field. For example, if the result of the write leveling calibration is 100/256 parts of a cycle, but the user estimates that the delay is above 2 cycles then MPWLDECTRL#[WL_CYC_DEL#] should be configured to 2, so the total delay will be 2 and 100/256 parts of a cycle Probably it would just possible to not overwrite the mdmisc register in the first place, since this is not present in the write_level_calib() example in NXP AN4467 nor in the i.MX6 RM (44.11.6.1 Hardware Write Leveling Calibration). Fixes: d339f16911c7 ("arm: imx6: Add DDR3 calibration code for MX6 Q/D/DL") Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de>
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-01 18:14:07 +0000