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2020-03-09net: phy: dp83867: Add SGMII mode type switchingMichal Simek
This patch adds ability to switch beetween two PHY SGMII modes. Some hardware, for example, FPGA IP designs may use 6-wire mode which enables differential SGMII clock to MAC. Patch description, dt flags have been done in mainline Linux by commit a2111c460c0c ("net: phy: dp83867: Add documentation for SGMII mode type") and by commit 507ddd5c0d47 ("net: phy: dp83867: Add SGMII mode type switching") Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-09dt-bindings: net: dp83867: Remove binding doc from U-Boot treeMichal Simek
U-Boot is having DT which doesn't cover all options currently supported by driver. DT binding is aligned with Linux kernel version available here. https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/net/ti,dp83867.txt Based on my talk with Grygorii Strashko better will be to remove it. Also Linux kernel bindings are being converted to yaml that's another reason to do it only at one place. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-03-09net: phy: add XFI, USXGMII types to is_10g_interface() helperAlex Marginean
The helper is used to reset PHYs on connect and it determines the clause to use (C22/C45) based on interface type. This fixes 'PHY reset timed out' warnings in console for USXGMII/XFI PHYs. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-09net: phy: Fix overlong PHY timeoutAndre Przywara
Commit 27c3f70f3b50 ("net: phy: Increase link up delay in genphy_update_link()") increased the per-iteration waiting time from 1ms to 50ms, without adjusting the timeout counter. This lead to the timeout increasing from the typical 4 seconds to over three minutes. Adjust the timeout counter evaluation by that factor of 50 to bring the timeout back to the intended value. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Fixes: net: phy: Increase link up delay in genphy_update_link() ("27c3f70f3b50") Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Matthias Brugger <mbrugger@suse.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-09doc: net: Rewrite network driver documentationAndre Przywara
doc/README.drivers.eth seems like a good source for understanding U-Boot's network subsystem, but is only talking about legacy network drivers. This is particularly sad as proper documentation would help in porting drivers over to the driver model. Rewrite the document to describe network drivers in the new driver model world. Most driver callbacks/methods are almost identical in their semantic, but recv() differs in some important details. Also keep some parts of the original text at the end, to help understanding old drivers. Add some hints on how to port drivers over. This also uses the opportunity to reformat the document in reST, on the way moving it into doc/driver-model and adding it into the structure there. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-09drivers: net: phy: aquantia: make it less verboseAlex Marginean
The driver now unconditionally prints some information that's not universally useful. Replace printf with debug. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-09drivers: net: phy: aquantia: drop XGMII as a valid system interface protoAlex Marginean
Use either USXGMII or XFI in aquantia_set_proto and drop XGMII as a valid protocol configuration. The PHY doesn't support it, it's just used as an alias for one of the other two protocols. Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com> Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-09env: Update env_addr for mmc environment driverPankit Garg
Make sure the gd struct is up-to-date. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-09phy: Include NC-SI in phy setupSamuel Mendoza-Jonas
Add NC-SI to the usual phy handling. This makes two notable changes: - Somewhat similar to a fixed phy, phy_connect() will create an NC-SI phy if CONFIG_PHY_NCSI is defined. - An early return is added to phy_read() and phy_write() to handle a case like the NC-SI phy which does not define a bus. Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-09phy: Add support for the NC-SI protocolSamuel Mendoza-Jonas
This introduces support for the NC-SI protocol, modelled as a phy driver for other ethernet drivers to consume. NC-SI (Network Controller Sideband Interface) is a protocol to manage a sideband connection to a proper network interface, for example a BMC (Baseboard Management Controller) sharing the NIC of the host system. Probing and configuration occurs by communicating with the "remote" NIC via NC-SI control frames (Ethernet header 0x88f8). This implementation is roughly based on the upstream Linux implementation[0], with a reduced feature set and an emphasis on getting a link up as fast as possible rather than probing the full possible topology of the bus. The current phy model relies on the network being "up", sending NC-SI command frames via net_send_packet() and receiving them from the net_loop() loop (added in a following patch). The ncsi-pkt.h header[1] is copied from the Linux kernel for consistent field definitions. [0]: https://github.com/torvalds/linux/tree/master/net/ncsi [1]: https://github.com/torvalds/linux/blob/master/net/ncsi/ncsi-pkt.h Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-06Makefile: fix processing of default environment fileSamuel Mescoff
Allow the default environment file to contain long lines split into multiples lines. Leading white spaces can be added for readability as well. Signed-off-by: Samuel Mescoff <samuel@mescoff.fr> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2020-03-04Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- Limit bootloader size to 1 MiB on R-Car Gen3
2020-03-04Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
- ABB SECU board - Assorted minor fixes
2020-03-04Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
- DFU / Thor fixes
2020-03-03Merge tag 'dm-pull-3mar20' of git://git.denx.de/u-boot-dmTom Rini
Fixes for power domain on device removal
2020-03-03ARM: socfpga: Add initial support for the ABB SECU boardHolger Brunck
Add initial support for the ABB SECU board, which is an ArriaV-based SoCFPGA system with ethernet and booting from Denali NAND. Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-03-02video: meson: keep power domain up after bootingAnatolij Gustschin
Add driver flag to skip power domain disabling on device removal. Fixes: 52edfed65de9 ("dm: core: device: switch off power domain after device removal") Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Guillaume La Roque <glaroque@baylibre.com>
2020-03-02dm: core: Add a flag for power domain control on device removalAnatolij Gustschin
In various cases a power domain must stay enabled after device removal when booting OS (i.e. serial debug console or display). Add a flag to selectively skip switching off a power domain. Fixes: 52edfed65de9 ("dm: core: device: switch off power domain after device removal") Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Guillaume La Roque <glaroque@baylibre.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-03-02Merge tag 'u-boot-stm32-20200203' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-stm - convert stm32mp1 board documentation to rst format
2020-03-02Merge tag 'xilinx-for-v2020.04-rc4' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx fixes for v2020.04-rc4 - Fix link good bit handling in dp83867 - Rename generic Zynq defconfig - Fix zybo z7 low leve setup - Fix error path in zynq_gem driver and fix 64bit usage - Fix invalid clock name quieries for Versal - Fix zynq/zynqmp SPL low level configuration via DT selection
2020-03-02doc: add board documentation for stm32mp1Patrick Delaunay
Change plain test README to rst format and move this file in documentation directory. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-02stm32mp1: rng: remove superfluous assignmentHeinrich Schuchardt
We should not assign a value that is overwritten before use. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-03-01ARM: socfpga: Add missing Denali NAND config optionsMarek Vasut
The Denali SPL shim won't build without these options set, set them accordingly to fix the build error and let the SPL shim to work correctly. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-03-01ARM: socfpga: Permit overriding the default timer frequencyMarek Vasut
The default timer rate may be different than 25 MHz, permit overriding the default rate in board configuration file. Ultimatelly, this should be properly handled by a clock driver, however that is not available on Gen5 yet. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-03-01rtc: m41t62: add compatible for m41st87Marek Vasut
This adds a compatible string for m41st87. This ensures that this driver can be used for m41st87. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2020-03-01gadget: f_thor: add missing line breaks for pr_err()Seung-Woo Kim
After the commit 9b643e312d52 ("treewide: replace with error() with pr_err()"), there are pr_err() usages without line break. Add missing line breaks for pr_err() used in f_thor. Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
2020-03-01dfu: Reset timeout in case of DFU requestAndy Shevchenko
In case dfu command is being executed with timeout option, the timer may expire in the middle of DFU operation. If there is DFU request coming, we may simple reset timeout value to prevent aborting of ongoing DFU operation. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Ferry Toth <ftoth@exalondelft.nl>
2020-03-01ARM: rmobile: Limit bootloader size to 1 MiB on R-Car Gen3Marek Vasut
The HF/QSPI flash layout permits up to 1 MiB large bootloader blob, set CONFIG_BOARD_SIZE_LIMIT to enforce this limit and set the monitor size to match accordingly. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-02-29Merge tag 'efi-2020-04-rc4-2' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for efi-2020-04-rc4 (2) In Linux next-20200228 patches have been merged to load an initial ramdisk using an EFI_LOAD_FILE2_PROTOCOL provided by the firmware. See commit ec93fc371f01 ("efi/libstub: Add support for loading the initrd from a device path"). The idea behind it is that the firmware should be responsible for validating the initrd in a secure boot setup. This pull-request comprises a patch series which let's U-Boot provide an initial implementation of the EFI_LOAD_FILE2_PROTOCOL providing the initrd.
2020-02-29Merge tag 'uniphier-v2020.04-3' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier UniPhier SoC updates for v2020.04 (3rd) - Enable ADMA and HS400 for the eMMC driver on 64-bit SoCs - Add some convenient environment variables to handle SD card - Sanitize the NAND controller reset sequence and its WP handling - Sync DT with Linux
2020-02-29ARM: dts: uniphier: remove U-Boot own EEPROM compatible and propertyMasahiro Yamada
The compatible string "i2c-eeprom" is U-Boot own compatible, which has never been approved by the DT community. "u-boot,i2c-offset-len" is also a U-Boot own hack. Linux adds "atmel,*" as generic compatibles, and U-Boot also followed it by commit d7e28918aa3f ("i2c_eeprom: Add reading support"). The U-Boot own hack is no longer needed. Just sync with Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-29ARM: dts: uniphier: add reset-names to NAND controller nodeMasahiro Yamada
Import Linux commits: 37f3e0096f71 ("ARM: dts: uniphier: add reset-names to NAND controller node") e98d5023fe1f ("arm64: dts: uniphier: add reset-names to NAND controller node") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-29ARM: dts: uniphier: rename DT nodes to follow json-schemaMasahiro Yamada
Import the nodename changes I made in Linux for avoiding dt-schama warnings. This follows the $nodename patterns in the dt-schema. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-28doc/efi: add load file 2 protocol to HTML documentationHeinrich Schuchardt
The load file 2 protocol can be used by the Linux kernel to load the initial RAM disk. U-Boot can be configured to provide an implementation. Add a description to the UEFI overview and document the related functions in the API section. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-02-28efi_selftest: add selftests for loadfile2 used to load initramfsIlias Apalodimas
Provide a unit test loading an initial ramdisk using the EFI_LOAD_FILE2_PROTOCOL. The test is only executed on request. An example usage - given a file image with a file system in partition 1 holding file initrd - is: * Configure the sandbox with CONFIG_EFI_SELFTEST=y CONFIG_EFI_LOAD_FILE2_INITRD=y CONFIG_EFI_INITRD_FILESPEC="host 0:1 initrd" * Run ./u-boot and execute host bind 0 image setenv efi_selftest load initrd bootefi selftest This would provide a test output like: Testing EFI API implementation Selected test: 'load initrd' Setting up 'load initrd' Setting up 'load initrd' succeeded Executing 'load initrd' Loaded 12378613 bytes CRC32 2997478465 Executing 'load initrd' succeeded Now the size and CRC32 can be compared to the provided file. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-02-28efi_loader: Implement FileLoad2 for initramfs loadingIlias Apalodimas
Following kernel's proposal for an arch-agnostic initrd loading mechanism [1] let's implement the U-boot counterpart. This new approach has a number of advantages compared to what we did up to now. The file is loaded into memory only when requested limiting the area of TOCTOU attacks. Users will be allowed to place the initramfs file on any u-boot accessible partition instead of just the ESP one. Finally this is an attempt of a generic interface across architectures in the linux kernel so it makes sense to support that. The file location is intentionally only supported as a config option argument(CONFIG_EFI_INITRD_FILESPEC), in an effort to enhance security. Although U-boot is not responsible for verifying the integrity of the initramfs, we can enhance the offered security by only accepting a built-in option, which will be naturally verified by UEFI Secure Boot. This can easily change in the future if needed and configure that via ENV or UEFI variable. [1] https://lore.kernel.org/linux-efi/20200207202637.GA3464906@rani.riverdale.lan/T/#m4a25eb33112fab7a22faa0fd65d4d663209af32f Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-02-28configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-02-28Merge branch '2020-02-28-mpc8xx-fixes'Tom Rini
- Fix the watchdog on mpc8xx platforms
2020-02-28watchdog: Don't select CONFIG_WATCHDOG and CONFIG_HW_WATCHDOG at the same timeChristophe Leroy
Commit 06985289d452 ("watchdog: Implement generic watchdog_reset() version") introduced an automatic selection of CONFIG_WATCHDOG by CONFIG_WDT. But for boards selecting CONFIG_HW_WATCHDOG, like boards have a powerpc 8xx, CONFIG_WATCHDOG shall not be selected as they are mutually exclusive. Make CONFIG_WATCHDOG dependent on !CONFIG_HW_WATCHDOG Fixes: 06985289d452 ("watchdog: Implement generic watchdog_reset() version") Cc: Stefan Roese <sr@denx.de> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Stefan Roese <sr@denx.de>
2020-02-28watchdog: mpc8xx: Revert the 8xx watchdog back to CONFIG_HW_WATCHDOGChristophe Leroy
Commit f3729ba6e7b2 ("watchdog: mpc8xx_wdt: Watchdog driver and macros cleanup") switched the watchdog to CONFIG_WATCHDOG. But this is not compatible with the 8xx because it starts the watchdog HW timer at reset and must be serviced from the very beginning including while U-boot is executed in the firmware before relocation in RAM. Select CONFIG_HW_WATCHDOG and make hw_watchdog_reset() visible. Meanwhile, finalise the cleanup of arch/powerpc/cpu/mpc8xx/Kconfig by removing the lines put in comment in that commit, and also remove again the selection of CONFIG_MPC8xx_WATCHDOG which was removed by that commit and brought back by mistake by commit b3134ffbd944 ("watchdog: Kconfig: Sort entry alphabetically") Note that there was an 'imply WATCHDOG' in the original commit but it disappeared in the Kconfig alphabetical sorting, so no need to remove it here. Fixes: f3729ba6e7b2 ("watchdog: mpc8xx_wdt: Watchdog driver and macros cleanup") Fixes: b3134ffbd944 ("watchdog: Kconfig: Sort entry alphabetically") Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Cc: Stefan Roese <sr@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Stefan Roese <sr@denx.de>
2020-02-28ARM: zynq: Remove single comment about QSPIMichal Simek
Very likely configs have been moved to Kconfig by scripts and this just remains there that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-28ARM: zynq: Rename defconfig to be align with ZynqMP and VersalMichal Simek
Just cosmetic change before real switch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-28arm: xilinx: Fill DEVICE_TREE directly in MakefilesMichal Simek
DEVICE_TREE variable is not exported from dts/Makefile that's why it is necessary to setup directly before use. Fixes: 312f2c5b14fa ("arm: xilinx: Use device tree which can be passed on cmd line") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-28net: zynq: Free allocated buffers in case of errorMichal Simek
Driver probe function is called again and again in case of error. Malloc space is getting full which is is reported by: Insufficient RAM for page table: 0x15000 > 0x14000. Please increase the size in get_page_table_size() ### ERROR ### Please RESET the board ### The patch is freeing allocated buffers on error path to avoid panic. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-28net: phy: dp83867: Clean force link good bitMichal Simek
On Xilinx ZynqMP revA board initial value of PHYCR register is 0x5448 which means FORCE_LINK_GOOD is already setup. Origin code was doing write but the new code is doing read/modify/write and keep this bit untouched. That's why ethernet stop to work. The patch is cleaning this bit when PHYCR value is composed. Tested on Xilinx zcu102-revA and zcu104-rev1.0 boards. Fixes: 37d6265f2bfa ("net: phy: dp83867: refactor rgmii configuration") Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-02-28mtd: nand: Fix on-die ecc issues in arasan_nfc driverT Karthik Reddy
Fixed wrong enumeration of nand_config structure. Added chip select function before reading the nand chip for maf/dev id's, without this unable to access id's from some of the micron chips. Also added a print statement to identify if a nand flash is using on-die ecc. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-28versal: drivers: clk: Fix invalid clock name queriesRajan Vaja
The clock driver makes EEMI call to get the name of invalid clk when executing versal_get_clock_info() function. This results in error messages. Added check for validating clock before saving clock attribute and calling versal_pm_clock_get_name() in versal_get_clock_info() function. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-28arm: zynq: zybo z7: fix SPL uart init bitrateMilan Obuch
The board uses 100 MHz clock for UART bitrate generator, but is configured as 50 MHz on defconfig. This produces wrong console output. The first message, "Debug uart enabled" is received as: "������b" Fix the issue by configuring the correct clock for the UART baudrate generator Signed-off-by: Milan Obuch <u-boot@dino.sk> Signed-off-by: Luis Araneda <luaraneda@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-28arm: zynq: zybo z7: fix MIO init issueMilan Obuch
The board has two push button connected to MIO pins 50 and 51, which have a pull-down resistor and are connected to 1.8V when pressed. These two pins are wrongly initialized with internal pull-up enabled so they are reported as 1 all the time with no change when pressed. Disable the internal pull-up to fix the issue. Signed-off-by: Milan Obuch <u-boot@dino.sk> Signed-off-by: Luis Araneda <luaraneda@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-28net: zynq_gem: Use ulong instead of u32 data typeT Karthik Reddy
flush_dcache_range() expects unsigned long in the arguments. Here u32 variable is unable to hold the higher address value when ddr mapped to higher addresses & flushing lower address dchache range instead which is unmapped causing to crash. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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