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2025-01-01Revert "net: phy: marvell 88e151x: Fix handling of bare RGMII interface type"Rufus Segar
This reverts commit 431be621c6cbc72efd1d45fa36686a682cbb470a. Section 3.3 of Reduced Gigabit Media Independent Interface (RGMII) Version 2.0 (4/1/2002) details that a PHYs using a ~2ns internal delay are referred to as RGMII-ID. This internal delay is optional. Page 147-148 of the Marvell Doc. No. MV-S107146-U0 Rev. F details timings of the RX/TX delays. We see that with the TX/RX_CLK delay enabled, our RX/TX_CTL signal is shifted w.r.t CLK to reflect the delay added. In 431be62 there is no timing difference between RGMII and RGMII-ID, and so programmers wanting to explicitly set their PHY to RGMII will find that delay added anyway. This could throw off timing if that internal delay is undesired. We should be handling all 4 possible RGMII cases of PHY_INTERFACE_MODE: RGMII, RGMII_ID, RGMII_TXID, and RGMII_RXID. Reverting 431be62 implements this. See also m88e1111_config_init_rgmii_delays in the equivalent driver in Linux (drivers/net/phy/marvell.c), which does not set these delays in RGMII mode. 68e6eca was tested out on an 88E1512 PHY in RGMII-ID mode. This reversion has been tested by myself on an 88E1518 in RGMII-ID mode. This patch affects boards using this driver in "rgmii" mode, as the internal delay will no longer be enabled. Namely kikwood-nsa310s. Signed-off-by: Rufus Segar <rhs@riseup.net>
2025-01-01net: tftpboot: clear timeout_count on every successful blockMikhail Kshevetskiy
We have a some boards that rarely starts networking abnormally, so there are many timeouts during file transfer. In the same time there is a normal transfer between timeouts. In this case we can continue transfer (instead of connection aborting) by just clearing timeout counter on every successful block. This patch does not affect the case when several timeouts happen one after another. The transfer will be aborted. Thus the transfer will be continued in the case of unstable link, but will be aborted in the case of inaccessible server. Feature downside: it may greatly slowdown (instead of abort) file transfer in the case of unstable link. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
2025-01-01Merge patch series "Add 'trace wipe'"Tom Rini
Jerome Forissier <jerome.forissier@linaro.org> says: This short series adds the 'trace wipe' command which clears the trace buffer, allowing to re-start a capture from scratch. Link: https://lore.kernel.org/r/cover.1734093566.git.jerome.forissier@linaro.org
2024-12-31trace: document 'trace wipe'Jerome Forissier
Add documentation for the 'trace wipe' command. Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-12-31test: test_trace.py: test 'trace wipe'Jerome Forissier
Test the newly added 'trace wipe' command. Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-12-31trace: add support for 'trace wipe'Jerome Forissier
Implement a 'trace wipe' command to delete the currently accumulated trace data. This comes handy when someone needs to trace a particular command. For example: => trace pause; trace wipe => trace resume; dhcp; trace pause => trace stats => trace calls 0x02100000 0x10000000 => tftpput $profbase $profoffset 192.168.0.16:trace.bin Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-12-31trace: proftool: dump-ftrace should write funcgraph times in ns not usJerome Forissier
When converting a U-Boot trace records file to ftrace function graph format for use by trace-cmd ('proftool -f funcgraph dump-ftrace'), the time associated to each function is incorrectly saved in microseconds instead of nanoseconds. Multuply the value by 1000 to fix the issue. With this change, the trace-cmd output looks consistent. Here is an example with udelay(25) added to mem_malloc_init() as a test case: $ ./tools/proftool -m System.map -t /tmp/trace.bin -f funcgraph \ dump-ftrace -o /tmp/trace.dat $ trace-cmd report /tmp/trace.dat >/tmp/trace.log $ vi /tmp/trace.log [...] u-boot-1 [000] 6.719659: funcgraph_entry: | mem_malloc_init() { u-boot-1 [000] 6.719659: funcgraph_entry: | udelay() { u-boot-1 [000] 6.719660: funcgraph_entry: | schedule() { u-boot-1 [000] 6.719660: funcgraph_entry: | cyclic_run() { u-boot-1 [000] 6.719660: funcgraph_entry: 1.000 us | cyclic_get_list(); u-boot-1 [000] 6.719661: funcgraph_exit: 1.000 us | } u-boot-1 [000] 6.719661: funcgraph_exit: 1.000 us | } u-boot-1 [000] 6.719661: funcgraph_entry: | __udelay() { u-boot-1 [000] 6.719662: funcgraph_entry: 0.000 us | usec_to_tick(); u-boot-1 [000] 6.719687: funcgraph_exit: + 26.000 us | } u-boot-1 [000] 6.719687: funcgraph_exit: + 28.000 us | } u-boot-1 [000] 6.719687: funcgraph_entry: # 37971.000 us | memset(); u-boot-1 [000] 6.757658: funcgraph_exit: # 37999.000 us | } u-boot-1 [000] 6.757658: funcgraph_exit: # 38000.000 us | } In the above dump, the udelay() call is reported as taking 26 us which is consistent with the timestamps (6.719687 - 6.719659 = 0.000026). Without this patch we would have "0.026 us" instead of "+ 26.000 us". Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-12-31Merge patch series "Fix OSPI boot for J722S"Tom Rini
Prasanth Babu Mantena <p-mantena@ti.com> says: This series fixes OSPI boot for J722S. It contains fixes for DMSC communication, R5 regmap for ospi and dma specific overrides for ospi. Test log: https://gist.github.com/PrasanthBabuMantena/ad469dd09ab7263f85f87dadda46c86d Link: https://lore.kernel.org/r/20241218131341.2073823-1-p-mantena@ti.com
2024-12-31arm: dts: k3-j721e-beagleboneai: Move to OF_UPSTREAMUdit Kumar
Move to using OF_UPSTREAM config and thus using the devicetree subtree and remove unused device tree files. Signed-off-by: Udit Kumar <u-kumar1@ti.com> Acked-by: Sumit Garg <sumit.garg@linaro.org>
2024-12-31drivers: firmware: ti_sci: Add DM_FLAG_PRE_RELOC to driverManorit Chawdhry
Currently the driver relies on bootph flag to probe it during PRE_RELOC stage but with the upcoming cleanup of v6.13, we don't have the bootph property in the parent nodes anymore and ti_sci driver being one of the parent nodes required during SPL stage would end up hampering the probe model [0]. Add DM_FLAG_PRE_RELOC to ti_sci driver for mitigating this issue. [0]: https://source.denx.de/u-boot/custodians/u-boot-dm/-/issues/21 Suggested-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2024-12-31arm: dts: k3-am62p-sk-binman: add SE security variant buildsBryan Brattlof
The Texas Instruments Foundational Security (TIFS) firmware must match the security level configured on the SoC. To boot Security Enforced (SE) variants of the AM62Px, add another tiboot3 build which packages the Security Enforced (SE) firmware variant for AM62Px SoCs. Signed-off-by: Bryan Brattlof <bb@ti.com>
2024-12-31arm: dts: k3-j722s*: Add overrides specific to OSPIVaishnav Achath
OSPI Boot requires overrides specific to R5 and also to use DMA in R5 SPL stage the DM_TIFS needs to be used. Add the corresponding overrides for R5 SPL stage. Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2024-12-31arm: mach-k3: j722_spl: Add FAST XSPI boot modeVaishnav Achath
Fast XSPI boot mode is supported by J722S ROM, add that. Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2024-12-31arm: dts: k3-j722s-r5-evm: Fix DM2TIFS secproxy thread IDVaishnav Achath
Fix the DM2TIFS secureproxy thread ID as per the latest TISCI documentation for J722S. https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j722s/sec_proxy.html Fixes: fc2da3a3d0d3 ("arm: dts: Introduce J722S U-Boot dts files") Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2024-12-31mailbox: k3-sec-proxy: Add DM to DMSC communication thread for J722SVaishnav Achath
J722S R5 SPL uses sec-proxy threads 28 and 29 for communication with TIFS. Mark these as valid threads in the driver. https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j722s/sec_proxy.html Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2024-12-31Merge patch series "Cumulative fixes and updates for MediaTek ethernet driver"Tom Rini
Weijie Gao <weijie.gao@mediatek.com> says: This patch series contains fixes and updates for mtk_eth driver. Link: https://lore.kernel.org/r/cover.1734406967.git.weijie.gao@mediatek.com
2024-12-31net: mediatek: fix usability with wget commandWeijie Gao
The wget command currently cannot work correctly with mtk_eth driver. This patch fixed this by increase DMA ring size and invalidate ring data after use. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2024-12-31net: mediatek: don't enable GDMA cpu bridge unconditionally for NETSYSv3Weijie Gao
Enable GDMA cpu bridge only when 10Gb interface is enabled for GMAC other than GMAC0, or when MT7988 internal switch is used. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2024-12-31net: mediatek: make sgmii/usxgmii optionalWeijie Gao
Not all platforms supports sgmii and/or usxgmii. So we add Kconfig options for these features and enable them only for supported platforms. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2024-12-31net: mediatek: add support for 10GBASE-RWeijie Gao
This patch adds support for 10GBASE-R interface mode Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2024-12-31net: mediatek: fix gmac2 usability for mt7629Weijie Gao
MT7629 need extra setting for gmac2 to work. So additional capability is added for mt7629 to handle this case. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2024-12-31net: mediatek: fix sgmii selection for mt7622Weijie Gao
Unlike other platforms, mt7622 has only one SGMII and it can be attached to either gmac1 or gmac2. So the register field of the sgmii selection differs from other platforms as newer platforms can control each sgmii individually. This patch adds a new capability for mt7622 to handle this case. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2024-12-31net: mediatek: correct register name of ethsys syscfg1Weijie Gao
The SYSCFG0 should be SYSCFG1 according to the programming guide. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2024-12-31net: mediatek: use correct register field for SGMII speed selectionWeijie Gao
The register field for SGMII speed selection is a 2-bit field with value 0 for 1Gbps and 1 for 2.5Gbps (2/3 are reserved). So it's necessary to set both bits instead of just setting/clearing only the lower bit. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2024-12-31arm: dts: mt7629: fix sgmii clock selection for ethernetWeijie Gao
Setup correct parent of clock CLK_TOP_SGMII_REF_1_SEL to allow sgmiisys1 work correctly. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2024-12-31clk: mediatek: mt7629: fix parent clock of some top clock muxesWeijie Gao
According to the mt7629 programming guide, the CLK_TOP_F10M_REF_SEL shares the same parent selection with CLK_TOP_IRRX_SEL, while the present parent selection for CLK_TOP_F10M_REF_SEL is actually used for CLK_TOP_SGMII_REF_1_SEL. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2024-12-31Merge patch series "Select CONFIG_64BIT for sandbox64 and x86_64"Tom Rini
Andrew Goodbody <andrew.goodbody@linaro.org> says: Picking up a series from Dan Carpenter and applying requested changes for v2. I had previously set CONFIG_64BIT for arm64. This patchset does the same thing for sandbox and x86_64. (Mips and riscv were already doing it). This CONFIG option is used in the Makefile to determine if it's a 32 or 64 bit system for the CHECKER. Makefile 1052 # the checker needs the correct machine size 1053 CHECKFLAGS += $(if $(CONFIG_64BIT),-m64,-m32) Link: https://lore.kernel.org/r/20241216180736.1933807-1-andrew.goodbody@linaro.org
2024-12-31test: lib: Use CONFIG_64BIT to detect 64 bit compileAndrew Goodbody
Should use CONFIG_64BIT to detect a 64 bit compile and not CONFIG_PHYS_64BIT. This allows more platforms to run the full test code. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2024-12-31x86: select CONFIG_64BIT for X86_64Andrew Goodbody
Select CONFIG_64BIT so that we pass the -m64 option (instead of -m32) to static analysis tools. Introduce CONFIG_SPL_64BIT and select it for architectures other than x86 with 64 bit builds. Do not select it for x86 builds as x86 uses a 32 bit SPL. Ensure that when limits are set they use CONFIG_64BIT for U-Boot proper and CONFIG_SPL_64BIT for SPL. This is to allow for the 32 bit SPL build used by x86. Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2024-12-31sandbox: select CONFIG_64BIT for sandboxAndrew Goodbody
Select CONFIG_64BIT so that we pass the -m64 option (instead of -m32) to static analysis tools. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2024-12-31sandbox: Correct guard around readq/writeqAndrew Goodbody
In include/linux/io.h the declarations of ioread64 and iowrite64 which make use of readq/writeq are guarded with CONFIG_64BIT so guard the sandbox declarations of readq and writeq also with CONFIG_64BIT. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2024-12-31Merge patch series "Keep the access to dtb_dt_embedded() within fdtdec"Tom Rini
Evgeny Bachinin <EABachinin@salutedevices.com> says: The 1st patch addresses comments from the post-review, available by link [1]. The 2nd patch fixes problems of dtb_dt_embedded() with checkpatch. Links: [1] https://lore.kernel.org/u-boot/CAFLszTgEKamsa6FTnjzrEWQBLkqAR7EBbZqffx09AKgQ7ppuVA@mail.gmail.com/#t Link: https://lore.kernel.org/r/20241211-dtb_dt_embedded_within_fdtdec-v1-0-7840469f0084@salutedevices.com
2024-12-31fdtdec: dtb_dt_embedded: replace ifdefs by IS_ENABLED()Evgeny Bachinin
Patch fixes the checkpatch warnings like: ``` WARNING: Use 'if (IS_ENABLED(CONFIG...))' instead of '#if or #ifdef' #94: FILE: lib/fdtdec.c:102: +#ifdef CONFIG_OF_EMBED ``` Signed-off-by: Evgeny Bachinin <EABachinin@salutedevices.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-12-31fdtdec: encapsulate dtb_dt_embedded() withinEvgeny Bachinin
Patch keeps the access to dtb_dt_embedded() within fdtdec API, by means of new API function introduction. This new function is a common place for updating appropriate global_data fields for OF_EMBED case. Also, the consequence of the patch is movement of '___dtb_dt_*begin' symbols' declaration from header file, because nobody used symbols outside the lib/fdtdec.c. Signed-off-by: Evgeny Bachinin <EABachinin@salutedevices.com> Suggested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-12-31Merge tag 'v2025.01-rc6' into nextTom Rini
Prepare v2025.01-rc6
2024-12-30Prepare v2025.01-rc6v2025.01-rc6Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-12-30Gitlab: Remove some "rules:when: always" linesTom Rini
In commit 399f739be6b2 ("CI: allow jobs to be run in merge requests") we added "rules:when: always" to many stages of the pipeline to allow for merge requests to trigger a run. However based on current Gitlab documentation, we should still be triggered on merge requests without this. Furthermore the way we have things written today we always run all stages of the CI rather than failing out early on problems, which is not always useful. Remove these as we should still be fine with merge requests triggering a run. Link: https://docs.gitlab.com/ee/ci/yaml/#rules Signed-off-by: Tom Rini <trini@konsulko.com>
2024-12-30Gitlab: Make test.py stage only depend on binman et al testsuiteTom Rini
Our Gitlab pipeline is currently broken up in to several stages. This was done with the thought process of "we should test tools and if they're good test emulated targets and if they're good test real hardware and if they're good test the world". However, in terms of that first stage it only really matters that binman, et al are still functional. And for a few years now Gitlab has had a "needs" keyword that lets you refine pipeline dependencies. Use this to perform the minor optimization of having test.py only require that tool testing job. This will become more useful later when we add long running testsuites that we do not want to block later jobs. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-12-30sandbox: Adjust configuration to hang on panic()Simon Glass
It is annoying to have sandbox enter a boot loop when an assertion fails. Hang instead, since then the error message is only printed once and Ctrl-C can be used to quit, as per normal. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-12-30Merge patch series "Misc. PowerPC MPC83xx fixes/cleanups"Tom Rini
J. Neuschäfer <j.ne@posteo.net> says: This patchset contains a few small fixes/cleanups for the MPC83xx platform. Link: https://lore.kernel.org/r/20241220-mpc83xx-misc-v2-0-ff4c17ee5fa4@posteo.net
2024-12-30gpio: mpc8xxx: Preserve pre-init state of outputsJ. Neuschäfer
The mpc8xxx_gpio driver contains a workaround for certain chips where the previously written state of outputs cannot be read back from the GPIO data (GPDAT) register (MPC8572/MPC8536). This workaround consists of tracking the state of GPDAT in a "shadow register" (i.e. a software variable). The shadow register is initialized to zero. This results in a problem w.r.t. outputs that are configured to a high (1) state before U-Boot runs, but not touched by U-Boot itself: Due to the zero-initialization, these GPIOs end up being set to zero, the first time that any other output is set. To avoid such issues initialize the GPDAT shadow register to the value previously held by any outputs, if possible. On MPC8572/MPC8536 this should make no difference, i.e. the shadow register should be initialized to zero on these chips. This patch has been tested on a MPC8314E-based board. Reviewed-by: Sinan Akman <sinan@writeme.com> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
2024-12-30powerpc: mpc83xx: Use defined constant for SPCR[TBEN]J. Neuschäfer
To increase readability, use the defined constant instead of specifying SPCR[TBEN] as a number. Reviewed-by: Sinan Akman <sinan@writeme.com> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
2024-12-30powerpc: mpc83xx: Allow including initreg.h into multiple filesJ. Neuschäfer
Globals defined in headers can result in multiple-definition errors while linking, if they are visible beyond the current translation unit. This hasn't been a problem for initreg.h so far, but would become a problem in the next patch, where I use a constant from initreg.h in a second C file. Reviewed-by: Sinan Akman <sinan@writeme.com> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
2024-12-30powerpc: mpc83xx: Fix timer value calculationJ. Neuschäfer
TBU and TBL are specified as two 32-bit registers that form a 64-bit value, but the calculation only shifted TBU by 16 bits. Fix this by actually shifting 32 bits. Reviewed-by: Sinan Akman <sinan@writeme.com> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
2024-12-30Merge patch series "powerpc: Fix and enforce distinction between immediates ↵Tom Rini
and registers" J. Neuschäfer <j.ne@posteo.net> says: This patchset changes the definition r0 etc. to %r0, so that the assembler can check that registers are only used where expected, and fixes the fallout. Link: https://lore.kernel.org/r/20241212-gpr-checks-v1-0-8c084c5fc0b6@posteo.net
2024-12-30powerpc: Introduce and enforce assembler checks on GPR usageJ. Neuschäfer
PowerPC general-purpose registers are historically specified as plain numbers (0-31), which makes them hard to distinguish from immediates. For this reason, include/ppc_asm.tmpl defines aliases named r0-r31. This can still lead to uncaught mistakes if a register is used in place of a number. Instead of (e.g.) 5 use %r5, which will result in an assembler warning if used as a number. Turn these warnings into errors by passing `--fatal-warnings` to the assembler. I verified with gazerbeam_defconfig (MPC83xx) and qemu-ppce500_defconfig (MPC85xx) that this patch results in the same machine code. Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
2024-12-30powerpc: Fix 0 vs. r0 confusion in X/D-form instructionsJ. Neuschäfer
Instructions such as dcbi are in the X-form; they have RA and RB fields and the effective address (EA) is computed as (RA|0)+(RB). In words, this means that if RA is zero, the left-hand side of the addition is zero, otherwise the corresponding GPR is used. r0 can never be used on the left-hand side of a X-form instruction. For D-form instructions such as addis, the Power ISA illustrates this in the instruction pseudo-code: if RA = 0 then RT <- EXTS(SI || 0x0000) else RT <- (RA) + EXIS(SI || 0x0000) In all of these cases, RA=0 indicates the value zero, not register r0. I verified with gazerbeam_defconfig (MPC83xx) and qemu-ppce500_defconfig (MPC85xx) that this patch results in the same machine code. Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
2024-12-30gpio: npcm: Add persist feature to sgpio moduleJim Liu
Base on GPIO hog to support sgpio persist enable feature. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2024-12-30configs: arbel_evb: enable arbel featureJim Liu
Enable GPIO_HOG, net, WDT feature for Arbel EVB. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2024-12-30Merge patch series "Cleanup the LMB subsystem"Tom Rini
Ilias Apalodimas <ilias.apalodimas@linaro.org> says: The LMB subsystem was used opportunistically for a number of years. A while back Sughosh merged it with the EFI subsystem in order to have a common allocator and avoid subsystems overwriting memory they shouldn't. This is an initial cleanup of all the crud we gathered over the years. There's no functional change expected from the patches as they just cleanup some abstraction functions and rename a few variables to make more sense. I plan to make even bigger changes -- e.g I don't see the point of having *_alloc() and *_reserve() versions of the functions since they do the same thing and just cause confusion. lmb_alloc_addr_flags() returning the base address on success makes little sense since we already *request* the address on the function arguments, etc. Since this patchset grew enough already, I'd like to get it in before more refactoring happens. It's worth noting that although some patches slightly increase the code size due to an extra flags argument being carried around, the final result is eventually smaller. # qemu_arm64_lwip_defconfig (version string adds another 20b) add/remove: 0/5 grow/shrink: 15/1 up/down: 568/-628 (-60) Function old new delta lmb_alloc_base 80 324 +244 lmb_alloc_addr 8 144 +136 lmb_reserve 8 96 +88 version_string 50 70 +20 boot_relocate_fdt 488 508 +20 boot_ramdisk_high 268 284 +16 lmb_add_region_flags 696 704 +8 boot_fdt_reserve_region 100 108 +8 load_serial 548 552 +4 lmb_alloc 8 12 +4 image_setup_libfdt 368 372 +4 do_load 728 732 +4 do_bootz 332 336 +4 do_booti 520 524 +4 bootm_run_states 2176 2180 +4 lmb_alloc_addr_flags 4 - -4 boot_fdt_add_mem_rsv_regions 284 280 -4 lmb_alloc_base_flags 76 - -76 lmb_reserve_flags 96 - -96 _lmb_alloc_addr 144 - -144 _lmb_alloc_base 304 - -304 Total: Before=1020102, After=1020042, chg -0.01% # sandbox_defconfig (version string adds another 20b) add/remove: 0/3 grow/shrink: 24/3 up/down: 523/-501 (22) Function old new delta lmb_alloc_base 48 299 +251 lmb_alloc_addr 4 92 +88 lmb_reserve 4 58 +54 test_alloc_addr 2933 2963 +30 version_string 50 70 +20 lib_test_lmb_overlapping_reserve 1018 1030 +12 lmb_add_region_flags 600 610 +10 test_multi_alloc.constprop 3034 3042 +8 test_get_unreserved_size 1032 1038 +6 boot_relocate_fdt 599 605 +6 boot_fdt_reserve_region 67 73 +6 lmb_alloc 4 9 +5 lmb_free_flags 190 194 +4 wget_handler 1530 1533 +3 tftp_handler 1190 1192 +2 test_noreserved 1207 1209 +2 test_bigblock 911 913 +2 load_serial 946 948 +2 lib_test_lmb_flags 2101 2103 +2 do_spi_flash 3150 3152 +2 do_bootz 526 528 +2 do_bootm_linux 2067 2069 +2 bootm_run_states 5275 5277 +2 _fs_read.lto_priv 331 333 +2 lmb_dump_region.lto_priv 356 353 -3 lmb_add 59 52 -7 efi_allocate_pages.part 303 249 -54 lmb_reserve_flags 65 - -65 _lmb_alloc_addr.lto_priv 92 - -92 _lmb_alloc_base.lto_priv 280 - -280 Total: Before=2492722, After=2492744, chg +0.00% Link: https://lore.kernel.org/r/20241218070251.686383-1-ilias.apalodimas@linaro.org