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2021-05-12dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM64Dave Gerlach
Add pinctrl macros for AM64 SoC. These macro definitions are similar to that of previous platforms, but adding new definitions to avoid any naming confusions in the soc dts files. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12board: ti: am64x: Add board support for am64x evmDave Gerlach
Add board specific initialization for am64x based boards. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12mailbox: k3-sec-proxy: Extend valid thread IDsDave Gerlach
AM64x uses a different thread mapping that existing K3 SoCs, so update the valid thread ID list to include those used for AM64x. Also remove the comment identifying the purpose of each thread ID. The purpose of the thread ID is specified when describing the threads in the device tree and the same ID can mean different things on different SoCs, so the comment is not useful. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12mmc: sdhci_am654: Add Support for TI's AM642 SoCDave Gerlach
Add support for the controller present on the AM642 SoC. There are instances: sdhci0: 8bit bus width, max 400 MBps sdhci1: 4bit bus width, max 100 MBps Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12armv8: mach-k3: am642: Add custom MMU supportKeerthy
Change the memory attributes for the DDR regions used by the remote processors on AM65x so that the cores can see and execute the proper code. A separate table based on the previous K3 SoCs is introduced since the number of remote processors and their DDR usage is different between the SoC families. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: mach-k3: am642: Shut down R5 core after ATF startup on A53Suman Anna
The AM642 SoCs use the Main R5FSS0 as a boot processor, and runs the R5 SPL that performs the initialization of the System Controller processor and starting the Arm Trusted Firmware (ATF) on the Arm Cortex A53 cluster. The Core0 serves as this boot processor and is parked in WFE after all the initialization. Core1 does not directly participate in the boot flow, and is simply parked in a WFI. Power down these R5 cores (and the associated RTI timer resources that were indirectly powered up) after starting up ATF on A53 by using the appropriate SYSFW API in release_resources_for_core_shutdown(). This allows these Main R5F cores to be further controlled from the A53 to run regular applications. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: mach-k3: am642: Use mmc start and stop callbacksDave Gerlach
To avoid any glitches on MMC clock line, make use of pm per and post callbacks when loading sysfw. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: mach-k3: am642: Load SYSFW binary and config from boot mediaDave Gerlach
Use the System Firmware (SYSFW) loader framework to load and start the SYSFW as part of the AM642 early initialization sequence. Also make use of existing logic to detect if ROM has already loaded sysfw and avoided attempting to reload and instead just prepare to use already running firmware. While at it also initialize the MAIN_UART1 pinmux as it is used by SYSFW to print diagnostic messages. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: mach-k3: am642: Store boot info from ROMDave Gerlach
For AM642, ROM supports loading system firmware directly from boot image. ROM passes information about the number of images that are loaded to bootloader at a specific address that is temporary. Add support for storing this information somewhere permanent before it gets corrupted. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: mach-k3: am642: Unlock all applicable control MMR registersDave Gerlach
To access various control MMR functionality the registers need to be unlocked. Do that for all control MMR regions in the MAIN domain. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: mach-k3: am642: Add support for boot device detectionKeerthy
AM642 allows for booting from primary or backup boot media. Both media can be chosen individually based on switch settings. ROM looks for a valid image in primary boot media, if not found then looks in backup boot media. In order to pass this boot media information to boot loader, ROM stores a value at a particular address. Add support for reading this information and determining the boot media correctly. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: mach-k3: Add basic support for AM642 SoC definitionDave Gerlach
The AM642 SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration to enable applications such as Motor Drives, PLC, Remote IO and IoT Gateways. Some highlights of this SoC are: * Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F MCUs, and a single Cortex-M4F. * Two Gigabit Industrial Communication Subsystems (ICSSG). * Integrated Ethernet switch supporting up to a total of two external ports. * PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other peripherals. * Centralized System Controller for Security, Power, and Resource Management (DMSC). See AM64X Technical Reference Manual (SPRUIM2, Nov 2020) for further details: https://www.ti.com/lit/pdf/spruim2 Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12Revert "fdt: translate address if #size-cells = <0>"Dario Binacchi
This reverts commit d64b9cdcd475eb7f07b49741ded87e24dae4a5fc. As pointed by [1] and [2], the reverted patch made every DT 'reg' property translatable. What the patch was trying to fix was fixed in a different way from previously submitted patches which instead of correcting the generic address translation function fixed the issue with appropriate platform code. [1] https://patchwork.ozlabs.org/project/uboot/patch/1614324949-61314-1-git-send-email-bmeng.cn@gmail.com/ [2] https://lore.kernel.org/linux-clk/20210402192054.7934-1-dariobin@libero.it/T/ Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-12clk: ti: am3-dpll: use custom API for memory accessDario Binacchi
Using the custom TI functions required not only replacing common memory access functions but also rewriting the routines used to set bypass and lock states. As for readl() and writel(), they also required the address of the register to be accessed, a parameter that is hidden by the TI clk module. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-05-12clk: ti: gate: use custom API for memory accessDario Binacchi
Replaces the common memory access functions used by the driver with the ones exported from the TI clk module. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-05-12clk: ti: change clk_ti_latch() signatureDario Binacchi
The clock access functions exported by the clk header use the struct clk_ti_reg parameter to get the address of the register. This must also apply to clk_ti_latch(). Changes to TI's clk-mux and clk-divider drivers prevented the patch from generating compile errors. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-05-12clk: ti: add custom API for memory accessDario Binacchi
As pointed by [1] and [2], commit d64b9cdcd4 ("fdt: translate address if #size-cells = <0>") is wrong: - It makes every 'reg' DT property translatable. It changes the address translation so that for an I2C 'reg' address you'll get back as reg the I2C controller address + reg value. - The quirk must be fixed with platform code. The clk_ti_get_reg_addr() is the platform code able to make the correct address translation for the AM33xx clocks registers. Its implementation was inspired by the Linux Kernel code. [1] https://patchwork.ozlabs.org/project/uboot/patch/1614324949-61314-1-git-send-email-bmeng.cn@gmail.com/ [2] https://lore.kernel.org/linux-clk/20210402192054.7934-1-dariobin@libero.it/T/ Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-05-11Merge tag 'u-boot-imx-20210502' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20210502 ------------------- - mx6: fixes for Ventana - local fixes from maintainer - imx7d: Ronetix's iMX7-CM - imx8: Ronetix iMX8MQ-CM Engicam i.Core MX8M Compulab iot-gate-imx8 - Fixes i.MX8 documentation - Fixes phy usage with fec
2021-05-11configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-05-11Merge branch 'finish-DM_MMC-migration'Tom Rini
- Complete the migration to LIBATA requiring BLK to be enabled. - Complete the migration to DM_MMC being required for non-SPL/TPL U-Boot.
2021-05-11DM: DM_MMC migration is now mandatory for non-SPLTom Rini
As it has been now two years past the migration deadline, it is required to have migrated. Remove the check from the Makefile and rework some of the Kconfig logic slightly to get the functional dependencies of DM_MMC / BLK right in both the SPL and non-SPL case. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-05-11ata: Make LIBATA means AHCI is enabled mandatory.Tom Rini
The migration deadline for having LIBATA mean that AHCI is also enabled was v2019.07. As that has long since passed, adjust the Kconfig dependencies. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-05-11boards: Disable CMD_SATA on platforms that no longer have a SATA driver enabledTom Rini
There are a number of platforms that depend on a SATA driver that has been converted to require AHCI but the platforms themselves are behind on other migrations that would make it trivial to enable AHCI. Disable SATA in these cases. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-05-11ppc: Remove some SECURE_BOOT defconfigsTom Rini
These specific configs are missing a number of migrations. In addition, they are blocking completion of the now-expired DM_MMC migration as it requires enabling BLK. Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Ruchika Gupta <ruchika.gupta@nxp.com> Cc: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-05-10Prepare v2021.07-rc2v2021.07-rc2Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-05-10Merge https://source.denx.de/u-boot/custodians/u-boot-x86Tom Rini
- x86: correct regwidth prompt in cbsysinfo - virtio: convert README.virtio to reST
2021-05-10MAINTAINERS: Add an entry for VirtIOBin Meng
This was missed when VirtIO support was initially brought to U-Boot back in 2018. Add an entry for it and list myself as the maintainer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-10doc: develop: Convert README.virtio to reSTBin Meng
This converts the existing README.virtio to reST, and puts it under the develop/driver-model/ directory. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-10x86: Correct regwidth prompt in cbsysinfoSimon Glass
This should be 'regwidth', not 'baud'. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-07Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini
2021-05-06Merge branch '2021-05-06-misc-updates'Tom Rini
- Allow for boards to update bootargs before booting the OS (helpful in some forms of secure boot). - Enhance GPT write support. - gpio-sysinfo updates - Allow env to be appended from dtb
2021-05-05cmd/exception: support ebreak exception on RISC-VHeinrich Schuchardt
The ebreak instruction should generate a breakpoint exception. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-05atcspi200: Add timeout mechanism in spi_xfer()Dylan Jhong
Adding timeout mechanism to avoid spi driver from stucking in the while loop in __atcspi200_spi_xfer(). Signed-off-by: Dylan Jhong <dylan@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-05riscv: cpu: fu740: clear feature disable CSRGreen Wan
Clear feature disable CSR to turn on all features of hart. The detail is specified at section, 'SiFive Feature Disable CSR', in user manual https://sifive.cdn.prismic.io/sifive/aee0dd4c-d156-496e-a6c4-db0cf54bbe68_sifive_U74MC_rtl_full_20G1.03.00_manual.pdf Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-05riscv: cpu: Add callback to init each coreGreen Wan
Add a callback harts_early_init() to start.S to allow different riscv hart perform setup code for each hart as early as possible. Since all the harts enter the callback, they must be able to run the same setup. Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-04fdt_support.c: Allow late kernel cmdline modificationNiko Mauno
By declaring board-specific board_fdt_chosen_bootargs() the kernel command line arguments can be adjusted before injecting to flat dt chosen node. Signed-off-by: Niko Mauno <niko.mauno@vaisala.com>
2021-05-04cmd: gpt: Add option to write GPT partitions to environment variableFarhan Ali
This change would enhance the existing 'gpt read' command to allow (optionally) writing of the read GPT partitions to an environment variable in the UBOOT partitions layout format. This would allow users to easily change the overall partition settings by editing said variable and then using the variable in the 'gpt write' and 'gpt verify' commands. Signed-off-by: Farhan Ali <farhan.ali@broadcom.com> Cc: Simon Glass <sjg@chromium.org> Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Cc: Corneliu Doban <cdoban@broadcom.com> Cc: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Cc: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-04sandbox: add test of CONFIG_ENV_IMPORT_FDTRasmus Villemoes
Check that a variable defined in /config/environment is found in the run-time environment, and that clearing fdt_env_path from within that node works. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Acked-by: Joe Hershberger <joe.hershberger@ni.com> [trini: Conditionalize the test being linked in] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-05-04env: allow environment to be amended from control dtbRasmus Villemoes
It can be useful to use the same U-Boot binary for multiple purposes, say the normal one, one for developers that allow breaking into the U-Boot shell, and one for use during bootstrapping which runs a special-purpose bootcmd. Or one can have several board variants that can share almost all boot logic, but just needs a few tweaks in the variables used by the boot script. To that end, allow the control dtb to contain a /config/enviroment node (or whatever one puts in fdt_env_path variable), whose property/value pairs are used to update the run-time environment after it has been loaded from its persistent location. The indirection via fdt_env_path is for maximum flexibility - for example, should the user wish (or board logic dictate) that the values in the DTB should no longer be applied, one simply needs to delete the fdt_env_path variable; that can even be done automatically by including a fdt_env_path = ""; property in the DTB node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2021-05-04test: Add gpio-sysinfo testSean Anderson
This adds a test for the gpio-sysinfo driver. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-04sysinfo: Add gpio-sysinfo driverSean Anderson
This uses the newly-added dm_gpio_get_values_as_int_base3 function to implement a sysinfo device. The revision map is stored in the device tree. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-04sysinfo: Require that sysinfo_detect be called before other methodsSean Anderson
This has the uclass enforce calling detect() before other methods. This allows drivers to cache information in detect() and perform (cheaper) retrieval in the other accessors. This also modifies the only instance where this sequencing was not followed. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-04sysinfo: Use global sysinfo IDs for existing sysinfo driversSean Anderson
Since 07c9e683a4 ("smbios: Allow a few values to come from sysinfo") there are common global sysinfo IDs. This patch moved existing IDs above SYSINFO_ID_USER. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-04dm: gpio: Fix gpio_get_list_count failing with livetreeSean Anderson
of_parse_phandle_with_args (called by dev_read_phandle_with_args) does not support getting the length of a phandle list by using the index -1. Instead, use dev_count_phandle_with_args which supports exactly this use-case. Fixes: 8558217153 ("gpio: Convert to use APIs which support live DT") Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-02ARM:imx:imx8mq-cm: Add support for Ronetix iMX8MQ-CMIlko Iliev
Supported peripherals: Ethernet, eMMC, Serial. U-Boot SPL 2021.04-00911-g5fa1e2ffeb-dirty (Apr 23 2021 - 09:11:14 +0200) Normal Boot Trying to boot from MMC2 U-Boot 2021.04-00911-g5fa1e2ffeb-dirty (Apr 23 2021 - 09:11:14 +0200) CPU: Freescale i.MX8MQ rev2.1 at 1000 MHz Reset cause: POR Model: Ronetix iMX8M-CM SoM DRAM: 1 GiB WDT: Started with servicing (60s timeout) MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from MMC... OK In: serial Out: serial Err: serial Net: Warning: ethernet@30be0000 (eth0) using random MAC address - 42:0d:e7:78:da:53 eth0: ethernet@30be0000 Hit any key to stop autoboot: 0 u-boot=> Signed-off-by: Ilko Iliev <iliev@ronetix.at>
2021-05-02imx: Add support for Ronetix's iMX7-CM boardIlko Iliev
Console boot log: U-Boot SPL 2021.04-00836-ga6232e065d-dirty (Apr 16 2021 - 15:16:35 +0200) Trying to boot from MMC1 U-Boot 2021.04-00836-ga6232e065d-dirty (Apr 16 2021 - 15:16:35 +0200) CPU: Freescale i.MX7D rev1.3 1000 MHz (running at 792 MHz) CPU: Commercial temperature grade (0C to 95C) at 44C Reset cause: POR Model: Ronetix iMX7-CM Board Board: iMX7-CM DRAM: 512 MiB PMIC: PFUZE3000 DEV_ID=0x30 REV_ID=0x11 MMC: FSL_SDHC: 0, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial Out: serial Err: serial Net: Warning: ethernet@30be0000 (eth0) using random MAC address - fe:be:37:01:5a:3f eth0: ethernet@30be0000 Hit any key to stop autoboot: 0 Signed-off-by: Ilko Iliev <iliev@ronetix.at>
2021-05-02pci: imx: disable imx6sdl LTSSM upon driver removeTim Harvey
commit 6ecbe1375671 ("drivers: pci: imx: add imx_pcie_remove function") attempted to resolve an issue caused by MX6QDL not having a proper intneral PCIe core reset and thus hanging during kernel init if the bootloader had enabled PCI. The issue exists for IMX6Q, IMX6D, IXM6S, and IMX6DL. Fix the case for IMX6S and IMX6DL getting missed. This fixes IMX6S and IMX6DL with PCI enabled in U-Boot booting for Linux v4.11+. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-05-02imx: mkimage_fit_atf: fix file size reportingTim Harvey
instead using ls and awk to determine file size use stat instead. This fixes an invalid size reporting for user or group names that have spaces in them. This adds a dependency on the stat application which is part of the coreutils package which also includes ls. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-05-02imx: imx8: Update README with somewhat correct firmware versionsPriit Laes
Current setup instructions for i.MX8QM MEK board include somewhat conflicting instructions, so here's an attempt to fix it. After trying both sets of firmwares, I can conclude that both of them fail to work: - no boot at all with imx-sc-firmware-0.7 / firmware-imx-7.6 - partial success with imx-sc-firmware-1.1 / firmware-imx-8.0: U-Boot 2021.04-rc3-00135-ge0669a43c8 (Mar 08 2021 - 16:49:08 +0200) CPU: NXP i.MX8QM RevB A53 at 1200 MHz Model: Freescale i.MX8QM MEK Board: iMX8QM MEK mu_hal_receivemsg timeout Build: SCFW 65afe5f6, SECO-FW 65afe5f6, ATF a-20190 mu_hal_receivemsg timeout sc_misc_get_boot_dev: res:16 Boot: SD0 DRAM: mu_hal_sendmsg timeout sc_rm_is_memreg_owned: mr:0 res:21 ... Signed-off-by: Priit Laes <priit.laes@paf.com>
2021-05-02arm: imx8m: add support for Compulab iot-gate-imx8 (imx8mm-cl-iot-gate)Ying-Chun Liu (PaulLiu)
Add initial support for Compulab iot-gate-imx8 board (imx8mm-cl-iot-gate). The initial support includes: - MMC - eMMC - I2C - FEC - Serial console Signed-off-by: Kirill Kapranov <kirill.kapranov@compulab.co.il> Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Peter Robinson <pbrobinson@gmail.com>
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