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2021-04-23mips: octeon: Add cvmx-sli-defs.h header fileAaron Williams
Import cvmx-sli-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-sata-defs.h header fileAaron Williams
Import cvmx-sata-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-rst-defs.h header fileAaron Williams
Import cvmx-rst-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-pow-defs.h header fileAaron Williams
Import cvmx-pow-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-pko-defs.h header fileAaron Williams
Import cvmx-pko-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-pki-defs.h header fileAaron Williams
Import cvmx-pki-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-pip-defs.h header fileAaron Williams
Import cvmx-pip-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-pepx-defs.h header fileAaron Williams
Import cvmx-pepx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-pemx-defs.h header fileAaron Williams
Import cvmx-pemx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-pcsx-defs.h header fileAaron Williams
Import cvmx-pcsx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-pciercx-defs.h header fileAaron Williams
Import cvmx-pciercx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-pcieepx-defs.h header fileAaron Williams
Import cvmx-pcieepx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-npi-defs.h header fileAaron Williams
Import cvmx-npi-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-mio-defs.h header fileAaron Williams
Import cvmx-mio-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-l2c-defs.h header fileAaron Williams
Import cvmx-l2c-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-ipd-defs.h header fileAaron Williams
Import cvmx-ipd-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-gserx-defs.h header fileAaron Williams
Import cvmx-gserx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-gmxx-defs.h header fileAaron Williams
Import cvmx-gmxx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-fpa-defs.h header fileAaron Williams
Import cvmx-fpa-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-dtx-defs.h header fileAaron Williams
Import cvmx-dtx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-dpi-defs.h header fileAaron Williams
Import cvmx-dpi-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-dbg-defs.h header fileAaron Williams
Import cvmx-dbg-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-ciu-defs.h header fileAaron Williams
Import cvmx-ciu-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-bgxx-defs.h header fileAaron Williams
Import cvmx-bgxx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-asxx-defs.h header fileAaron Williams
Import cvmx-asxx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-agl-defs.h header fileAaron Williams
Import cvmx-agl-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add misc cvmx-helper header filesAaron Williams
Import misc cvmx-helper header files from 2013 U-Boot. They will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: global_data.h: Add Octeon specific data to arch_global_data structStefan Roese
This will be used by the upcoming Serdes and driver code ported from the original 2013 U-Boot code to mainline. Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23Merge branch '2021-04-22-assorted-updates'Tom Rini
- Move LMB to Kconfig, improve functionality - Add partlabel support to more fs cmds
2021-04-23Merge https://source.denx.de/u-boot/custodians/u-boot-usbTom Rini
2021-04-23Merge tag 'mips-pull-2021-04-22' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-mips - net: fix traffic problems in MSCC Jaguar 2 network driver - MIPS: mt7628: fix DDR memory init - MIPS: octeon: add MMC and USB support
2021-04-23arm64: versal: Remove gd referenceMichal Simek
gd is not used in this file that's why doesn't make sense to declare it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23clk: Fix typo in Zynq Kconfig symbol descriptionMichal Simek
Trivial typo fix. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23xilinx: Enable GUID partitions and EFI variable commandsMichal Simek
For work with EFI it is good to have GUID partitions enabled and also option to work with UEFI variables. That's why enable both. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23xilinx: common: Fix boot script addressT Karthik Reddy
Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23xilinx: Enable DFU_TIMEOUT configT Karthik Reddy
Enable CONFIG_DFU_TIMEOUT to set timeout waiting for dfu command. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23xilinx: zynq: Add usb dfu/thor distro boot supportT Karthik Reddy
Add support for usb dfu & thor to distro boot on zynq platform. Add 60s timeout of dfu-utils to start transaction. Remove DFU_ALT_INFO_RAM as we use bootcmd_usb_dfu instead of dfu_ram. Remove DFU_ALT_INFO_MMC as part of distro boot cleanup. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23xilinx: versal: Add usb dfu/thor distro boot supportT Karthik Reddy
Change "dfu_usb" to "usb_dfu" for better representation and change required macros. Add 60s timeout of dfu-utils to start transaction. Add support for usb thor to distro boot. Remove DFU_ALT_INFO_RAM as we use bootcmd_usb_dfu instead of dfu_ram. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23xilinx: zynqmp: Remove dfu_ram_info setupMichal Simek
The dfu ram info is wired in connection to Linux kernel and certain setup. We should change this to be more generic as others command. That's why using boot via script is the way to go. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23xilinx: zynqmp: Add usb dfu/thor distro boot supportT Karthik Reddy
In usb boot mode distro boot should select usb device as primary boot device instead of usb host. So make usb dfu as primary boot device. But do not list it in boot_targets as fallback option because it is not classic mode for booting. Using 60s timeout by default should be enough time for dfu-utils to start transaction. In case none needs this please change timeout value in the command or disable CONFIG_DFU_TIMEOUT. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23cmd: dfu: Propagate error if dfu gadget failsMichal Simek
On systems without usb gadget dfu core fails which was reported by error but command itself returns pass which breaks any usage in a script. That's why propagate error from run_usb_dnl_gadget(). Fixes: 16297cfb2a20 ("usb: new board-specific USB init interface") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23xilinx: Enable redundant variable handlingMichal Simek
Enable this feature by default to be able to work with env import/export commands which are done in this slightly changed variable format (There is addtional flag fields in variable file which is changing CRC calculation). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23xilinx: versal: Add support for saving env based on bootmodeAshok Reddy Soma
Enable saving variables to MMC(FAT) and SPI based on primary bootmode. If bootmode is JTAG, dont save env anywhere(NOWHERE). Enable ENV_FAT_DEVICE_AND_PART="0:auto" for Versal platforms as well. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23xilinx: zynq: Add support for saving env based on bootmodeAshok Reddy Soma
Enable saving variables to MMC(FAT), NAND, SPI based on primary bootmode. If bootmode is JTAG, dont save env anywhere(NOWHERE). Since most of the flashes on zynq evaluation boards are 16MB in size, set default ENV_OFFSET to 15MB(0xE00000). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-23env: Setup default value for ENV_OFFSET_REDUNDMichal Simek
This variable is used for pointing to location where redundant variables are located. There is no default value. And it doesn't need to be specified which is showing as warning when savedefconfig is called. make xilinx_zynqmp_virt_defconfig # # configuration written to .config # make savedefconfig scripts/kconfig/conf --savedefconfig=defconfig Kconfig .config:199:warning: symbol value '' invalid for ENV_OFFSET_REDUND Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-04-22usb: ehci-hcd: Add IAA handshake for removing async QHYe Li
According to EHCI spec, software needs to do handshake with HC for safely removing QH from async list. This handshake is implemented by setting IAAD (Interrupt on Async Advance Doorbell) bit in USB_USBCMD register and poll the IAA (Interrupt on Async Advance bit) in the USB_USBSTS to ensure the HC has released all on-chip state that may potentially reference one of the data structures just removed. Current codes only check active status of the last QTD, but this can't ensure the QH is released from HC. We can meet unrecoverable "EHCI timed out on TD" errors when running UEFI SCT tests on USB disk. The USB_ASYNCLISTADDR register is changed to a invalid address when the issue happens. It is fixed after adding the IAA handshake. Steps to reproduce the issue: 1. Build the UEFI SCT from https://github.com/tianocore/edk2-test 2. Build the EDK2 UEFI Shell from https://github.com/tianocore/edk2 3. Copy SCT files and Shell.efi to USB disk FAT partition 4. Load the Shell.efi from USB FAT, and run bootefi to execute it 5. After booting into Shell, enter the SCT directory and run "sct -a" to execute all tests. 6. Tests run about 1 hour and stop with many EHCI timeout errors like EHCI timed out on TD - token=0x801f8c80 Signed-off-by: Ye Li <ye.li@nxp.com>
2021-04-22configs: stm32mp15: increase the number of reserved memory region in lmbPatrick Delaunay
For the latest kernel device tree the max number of reserved regions in lmb library is reached: 8 with 5 reserved regions in device tree. When a new region is added, the lmb allocation for the device tree relocation failed and boot with ramdisk failed. This patch avoids this issue by increasing the max number of supported reserved memory in lmb library to 16. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-22lmb: Add 2 config to define the max number of regionsPatrick Delaunay
Add 2 configs CONFIG_LMB_MEMORY_REGIONS and CONFIG_LMB_RESERVED_REGIONS to change independently the max number of the regions in lmb library. When CONFIG_LMB_USE_MAX_REGIONS=y, move the lmb property arrays to struct lmb and manage the array size with the element 'max' of struct lmb_region; their are still allocated in stack. When CONFIG_LMB_USE_MAX_REGIONS=n, keep the current location in struct lmb_region to allow compiler optimization. Increase CONFIG_LMB_RESERVED_REGIONS is useful to avoid lmb errors in bootm when the number of reserved regions (not adjacent) is reached: + 1 region for relocated U-Boot + 1 region for initrd + 1 region for relocated linux device tree + reserved memory regions present in Linux device tree. The current limit of 8 regions is reached with only 5 reserved regions in DT. see Linux kernel commit bf23c51f1f49 ("memblock: Move memblock arrays to static storage in memblock.c and make their size a variable") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-22test: lmb: add test for overflow protection in lmb_add_regionPatrick Delaunay
Add test for max number of memory regions and in reserved regions. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-22lmb: correct size of the regions arrayPatrick Delaunay
As in lmb_region, cnt < max and in the lmb library use region[i] only with i in 0...cnt, this region array size can be reduced by 1 element without overflow. This patch allows to reduce the struct lmb size. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>