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2022-09-13microblaze: add arch_print_bdinfo() implementationOvidiu Panait
Allow bdinfo command to print icache/dcache information: U-Boot-mONStR> bdinfo boot_params = 0x00000000 DRAM bank = 0x00000000 -> start = 0x04000000 -> size = 0x04000000 flashstart = 0x00000000 flashsize = 0x00000000 flashoffset = 0x00000000 baudrate = 9600 bps relocaddr = 0x07f76000 reloc off = 0x02f76000 Build = 32-bit current eth = unknown ethaddr = (not set) IP addr = <NULL> fdt_blob = 0x07fec7e0 new_fdt = 0x00000000 fdt_size = 0x00000000 lmb_dump_all: memory.cnt = 0x1 memory[0] [0x4000000-0x7ffffff], 0x04000000 bytes flags: 0 reserved.cnt = 0x1 reserved[0] [0x7e94b8c-0x7ffffff], 0x0016b474 bytes flags: 0 devicetree = embed icache = 32 KiB icache line = 4 Bytes dcache = 32 KiB dcache line = 4 Bytes Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220829170205.1274484-4-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-09-13cmd: bdinfo: introduce bdinfo_print_size() helperOvidiu Panait
Add bdinfo_print_size() helper to display size variables (such as cache sizes) in bdinfo format. The size is printed as "xxx Bytes", "xxx KiB", "xxx MiB", "xxx GiB", etc as needed; Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Reviewed-by: Jason Liu <jason.hui.liu@nxp.com> Link: https://lore.kernel.org/r/20220829170205.1274484-3-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-09-13cpu: microblaze: add error handling in microblaze_cpu_get_desc()Ovidiu Panait
Check snprintf() return value for errors. Make microblaze_cpu_get_desc() directly return snprintf() error code if ret < 0. Otherwise, if the return value is greater than or equal to size, the resulting string is truncated, so return -ENOSPC. Fixes: 816226d27e ("cpu: add CPU driver for microblaze") Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220829170205.1274484-2-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-09-13microblaze: drop CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZEOvidiu Panait
These macros are not used anymore in microblaze code since commit f113d7d303467 ("Convert CONFIG_SPL_STACK to Kconfig"), so remove them. Fixes: f113d7d303467 ("Convert CONFIG_SPL_STACK to Kconfig") Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220829170205.1274484-1-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-09-13net: gem: Check rate before setting it upMichal Simek
On QEMU setting rate for fixed clock is failing. That's why check a rate first if the rate is the same there is no need to ask for the change. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/bc465ffd4904bfd65208b782daa06732b915db54.1661502645.git.michal.simek@amd.com
2022-09-13xilinx: versal: Disable LMB for mini configurationsMichal Simek
There shouldn't be a reason to have LMB on for these configurations. LMB was already disabled for ZynqMP by commit 0063487a5b60 ("configs: zynqmp: Disable LMB for mini u-boot"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/17d1e9b50b2fd032352911f94f4f213828e0a3f7.1662460892.git.michal.simek@amd.com
2022-09-13arm64: xilinx: Move board_get_usable_ram_top() to common locationMichal Simek
The commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location") adds functionality for ZynqMP to read reserved memory node and do not place U-Boot to reserved location. This functionality is generic across all Xilinx SOCs that's why move it to common location to be used by all Xilinx SOCs. On zynq platform this is also fixing issue where U-Boot was placed to locating which was reserved already which ends up with error message "ERROR: reserving fdt memory region failed (addr=30000000 size=10000000 flags=4)" which is shown when bdinfo is called. Tested on vck190, zcu102, zc706 and kc705 to cover all platforms. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b0817807912f7c7af6a8e1cf9ee04e5ab5de5f6a.1661430188.git.michal.simek@amd.com
2022-09-13ARM: zynq: Align bss and end of u-boot image to 64bitsMichal Simek
The main reason is that DT memory reserved code is expecting DT to be 64bit aligned. For more information take a look at commit 5bd5ee02b23b ("xilinx: zynqmp: Check that DT is 64bit aligned"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/9f3688cda188d8ea0b462df2aa08a10ddcc9c149.1661938136.git.michal.simek@amd.com
2022-09-13xilinx: Enable CMD_GREPENV/SETEXPR by defaultMichal Simek
Enable both of these commands in Xilinx SoCs to be able to use them in boot scripts. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1a612be7e09e9bc502f30e1f025441ccf8accba5.1661340513.git.michal.simek@amd.com
2022-09-13xilinx: Add env redund offsetT Karthik Reddy
ENV_OFFSET_REDUND config is by default set to 0 for flashes. Saving the env variables is overwriting data at 0 offset, which is wrong. So add default redund env offset for Zynq, ZynqMP, Versal and microblaze platforms. Configured ENV_OFFSET_REDUND offsets by ENV_OFFSET + (2 * ENV_SIZE). In case of versal, we configured ENV_OFFSET_REDUND at 0x7F00000 instead of 0x7F80000. As BOOT_SCRIPT_OFFSET is already configured at 0x7F80000. Added ENV_OFFSET_REDUND in Kconfig for microblaze due to dependency of ENV_IS_IN_SPI_FLASH config. Below table specifies platform specific env and env redund offsets. PLAT ENV_OFFSET ENV_OFFSET_REDUND ---- ---------- ----------------- ZYNQ 0xE0000 0xE40000 ZYNQMP 0x1E00000 0x1E80000 VERSAL 0x7F40000 0x7F00000 MICROBLAZE 0x1080000 0x10C0000 Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/92656dc08f0f5a749d62b71ca6e77fe1be72e9e0.1661340204.git.michal.simek@amd.com
2022-09-13arm64: zynqmp: add ref_clk property for REFCLKPER calculationPiyush Mehta
Added ref_clk 'ref' property for GUCTL_REFCLKPER and GFLADJ_REFCLK_FLADJ calculation. This property configure correct value for SOF/ITP counter and period of ref_clk. This patch adds 'ref' property for both dwc3_0 and dwc3_1 cores. Signed-off-by: Piyush Mehta <piyush.mehta@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/417545b948ea12a9301a5e80851f98523be2b443.1661259809.git.michal.simek@amd.com
2022-09-13arm64: zynqmp: Add missing tca6416 to zynqmp SCMichal Simek
Add missing tca6416 i2c gpio controller to SC dts file. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/a19c191d0dffb213d9dc8809d22728d79cf73a22.1661259623.git.michal.simek@amd.com
2022-09-13arm: dts: Add xlnx prefix to GEM compatible stringHarini Katakam
cdns,zynq/zynqmp were recentle deprecated in Linux in favour of xlnx prefix. Add this new compatible string and retain the existing string for compatibility with uboot drivers. Signed-off-by: Harini Katakam <harini.katakam@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/a38b1b55132fc026cc09224dba61e42fd03b1a36.1661259558.git.michal.simek@amd.com
2022-09-13arm64: zynqmp: Add mtd partition for secure OS storage areaAmit Kumar Mahapatra
Update MTD partitions of Kria device trees to allocate 128KB of QSPI memory for secure OS. Increased "SHA256" partition size & changed starting address of "User" partition to accommodate the new partition "Secure OS Storage" Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/9cc64b8c731d11439de73d0af54c65080068f00b.1661242681.git.michal.simek@amd.com
2022-09-13xilinx: Define only mmc devnum not partitionMichal Simek
The commit 53b406369e9d ("DFU: Check the number of arguments and argument string strictly") added strict control over string that 0:1 partition definition is not valid anymore that's why use only device number without partition ID. Device is specified by 2nd parameter and partition by 3rd. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/840eca944f4f2abeeb63b5d724f9ba5fe9a9213b.1660055571.git.michal.simek@amd.com
2022-09-13xilinx: zynq: Use CONFIG_SPL_FS_LOAD_PAYLOAD_NAME for dfu_alt_infoMichal Simek
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME stores the name of firmware file to be loaded by SPL. Name can be selected via Kconfig that's why use the macro. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/601fbc2dfd16b4708fc6b5f86954e10add43334e.1660055571.git.michal.simek@amd.com
2022-09-13xilinx: Fix logic when dfu_alt_info is generatedMichal Simek
Generate dfu_alt_info only when it is not defined. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/464e4b325c644e52a660df9cf44eeb4d80427f6a.1660055571.git.michal.simek@amd.com
2022-09-13xilinx: zynq: Enable mkeficapsule tools compilationMichal Simek
Zynq can use efi capsule infrastructure that's why enable it by default. For capsule generation for zynq you can use: pushd spl ../tools/mkeficapsule -g "1ba29a15-9969-40aa-b424-e86121618664" boot.bin \ --index 1 ../capsule1.bin popd ./tools/mkeficapsule -g "1a5178f0-87d3-4f36-ac63-3b31a23be305" u-boot.img \ --index 2 capsule2.bin Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/a8194ecfa7932f2d8ada5ee508b2a026c782f15e.1660055571.git.michal.simek@amd.com
2022-09-13xilinx: versal: Define CONFIG_CQSPI_REF_CLKAshok Reddy Soma
With commit 55b3ba4c2ba4 ("spi: cadence_qspi: Migrate CONFIG_CQSPI_REF_CLK to Kconfig") CONFIG_CQSPI_REF_CLK is moved to Kconfig. The static value via Kconfig is a fallback option in case of clock framework is not enabled or fails for some reason. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/fe7c38a19e878c307d5b75311bbfd8cf6c1f601e.1659691195.git.michal.simek@amd.com
2022-09-13xilinx: versal: Enable power domain driverAshok Reddy Soma
Enable power domain driver to request node for all the IP's that are enabled in DT. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/dbed54df622d647b8d520d8ce5289cd69ba66e0b.1659691195.git.michal.simek@amd.com
2022-09-13firmware: zynqmp: Skip loading config object for VersalAshok Reddy Soma
SET_CONFIGURATION is not yet implemented for Versal platforms. Skip loading config object for Versal until support is added. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/eb7ef6c6de36a1f7d056de43042f96fe3639f18e.1659691195.git.michal.simek@amd.com
2022-09-12xilinx: zynq: Disable LMB for mini configurationsMichal Simek
There shouldn't be a reason to have LMB on for these configurations. LMB was already disabled for ZynqMP by commit 0063487a5b60 ("configs: zynqmp: Disable LMB for mini u-boot"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/07d95f619a15672d1a234eddcfbb54c0ab382eaa.1662460867.git.michal.simek@amd.com
2022-09-12xilinx: zynqmp: Disable LMB for mini u-bootAshok Reddy Soma
LMB is not required for mini u-boot which runs out of on chip memory. Disable CONFIG_LMB from mini u-boot defconfig's. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/45fad28825f0f236ad45e700aca1f39afbb22236.1659691195.git.michal.simek@amd.com
2022-09-12cmd: bdinfo: Enable dumping lmb data when LMB is enabledMichal Simek
The commit 9996cea75f5a ("lmb/bdinfo: dump lmb info via bdinfo") added support for dumping LMB information as the part of bdinfo. But code itself should be called only when LMB is enabled. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/3e40c8bb77550dfca9f7eb48fe644a018d971411.1662537127.git.michal.simek@amd.com
2022-09-12xilinx: zynqmp: Disable various configs for mini U-BootAshok Reddy Soma
With 2022.01-rc3 upgrade, the size of the mini U-Boot increased and is not able to fit in OCM. Hence disable unnecessary configs and make room. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/306b57818601fa3571bc75c4182f25aaa3f2a793.1659691195.git.michal.simek@amd.com
2022-09-12xilinx: versal: Enable i2c mux uclass with pca954x driverMichal Simek
Xilinx is using pca954x i2c muxes on a lot of boards that's why enable this driver by default. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c090aea3436c7a4ebe698da6cbc70e70a14baae3.1659691195.git.michal.simek@amd.com
2022-09-12xilinx: zynqmp: Fix AES with a user provided keyJanne Ylalehto
The user provided key address was not flushed in struct aes because of the flushing location in the function. Signed-off-by: Janne Ylalehto <ylalehto@gmail.com> Link: https://lore.kernel.org/r/20220816124525.19671-1-ylalehto@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-09-12fpga: zynq: Remove post config info message for SPLStefan Herbrechtsmeier
The drivers informs the user that a post config was not run after FPGA configuration. This message is unnecessary in SPL because the ps7_post_config function is called via spl_board_prepare_for_boot function before jump_to_image_no_args function from board_init_r function. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220808145331.24723-1-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-09-12zynq: Convert arm twd timer to DM driverStefan Herbrechtsmeier
Move arm twd timer driver from zynq to generic location. DM timer drivers are designed differently to original driver. Timer is counting up and not down. Information about clock rates are find out in timer_pre_probe() that's why there is no need to get any additional information from DT in the driver itself (only register offset). Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220805061629.1207-1-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-09-02Merge branch '2022-09-02-assorted-improvements' into nextTom Rini
- DM RTC improvements that should help in CI, allow disabling LTO from the make line, add extension (cape, etc) support to distro bootcmd, add a pause command and re-enable ARM v4T support.
2022-09-02dm: rtc: Try to handle the localtime() raceSimon Glass
At present the sandbox timer uses localtime() which can jump around twice a year when daylight-saving time changes. It would be tricky to make use of gmtime() since we still need to present the time in local time, as seems to be required by U-Boot's RTC interface. The problem can only happen once, so use a loop to detect it and try again. This should be sufficient to detect either a change in the 'second' value, or a daylight-saving change. We can assume that the latter also incorporates a 'second' change, so there is no need to loop more than twice. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-02dm: rtc: Try to avoid a race in rtc_set_get testSimon Glass
It seems that the time can change in between getting it and reading the offset. Check for this and try again if this happens. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-02dm: rtc: Avoid a race in the rtc_reset testSimon Glass
Since resetting the RTC on sandbox causes it to read the base time from the system, we cannot rely on this being unchanged since it was last read. Allow for a one-second delay. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Fixes: https://source.denx.de/u-boot/u-boot/-/issues/4 Reported-by: Bin Meng <bmeng.cn@gmail.com> Reported-by: Tom Rini <trini@konsulko.com> Suggested-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-02test: Allow running tests multiple timesSimon Glass
Some tests can have race conditions which are hard to detect on a single one. Add a way to run tests more than once, to help with this. Each individual test is run the requested number of times before moving to the next test. If any runs failed, a message is shown. This is most useful when running a single test, since running all tests multiple times can take a while. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-02dm: rtc: Make use of ut_assertnonnull()Simon Glass
Use this (newish) macro since it is designed for the purpose of making sure things are non-NULL. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-02ci: Add a test for a non-LTO buildSimon Glass
Check that sandbox builds and runs tests OK with LTO disabled. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-02Makefile: Allow LTO to be disabled for a buildSimon Glass
LTO (Link-Time Optimisation) is an very useful feature which can significantly reduce the size of U-Boot binaries. So far it has been made available for selected ARM boards and sandbox. However, incremental builds are much slower when LTO is used. For example, an incremental build of sandbox takes 2.1 seconds on my machine, but 6.7 seconds with LTO enabled. Add a NO_LTO parameter to the build, similar to NO_SDL, so it can be disabled during development if needed, for faster builds. Add some documentation about LTO while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-02arm: ARMv4 assembly compatibilitySergei Antonov
There is currently a problem that U-Boot can not work on ARMv4 because assembly imlementations of memcpy() and some other functions use "bx lr" instruction that is not available on ARMv4 ("mov pc, lr" should be used instead). A working preprocessor-based solution to this problem is found in arch/arm/lib/relocate.S. Move it to the "ret" macro in arch/arm/include/asm/assembler.h and change all "bx lr" code to "ret lr" in functions that may run on ARMv4. Linux source code deals with this problem in the same manner. v1 -> v2: Comment update. Pointed out by Andre Przywara. Signed-off-by: Sergei Antonov <saproj@gmail.com> CC: Samuel Holland <samuel@sholland.org> CC: Ye Li <ye.li@nxp.com> CC: Simon Glass <sjg@chromium.org> CC: Andre Przywara <andre.przywara@arm.com> CC: Marek Vasut <marex@denx.de> CC: Sean Anderson <sean.anderson@seco.com> CC: Tom Rini <trini@konsulko.com>
2022-09-02cmd: Add pause commandSamuel Dionne-Riel
This command is being introduced with the goal of allowing user-friendly "generic use case" U-Boot builds to pause until user input under some situations. The main use case would be when a boot failure happens, to pause until the user has had time to acknowledge the current state. Tested using: make && ./u-boot -v -T -c 'ut lib lib_test_hush_pause' Signed-off-by: Samuel Dionne-Riel <samuel@dionne-riel.com> Cc: Simon Glass <sjg@chromium.org>
2022-09-02distro_bootcmd: Introduce support for extension commandMatwey V. Kornilov
Try to load required DTB overlays if the board supports extensions and CONFIG_CMD_EXTENSION is enabled. Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
2022-09-02Merge branch '2022-09-01-assorted-Kconfig-migrations' into nextTom Rini
- Assorted Kconfig migrations
2022-09-01ARM: imx6: dh-imx6: Enable d-cache early in SPLMarek Vasut
Enable d-cache early in SPL right after DRAM is started up. This reduces U-Boot proper load time by 650ms when loaded from SPI NOR. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-09-01ARM: cache: Allow SPL to build cache-pl310.cPhilip Oberfichtner
Introduce the new Kconfig symbol CONFIG_SPL_SYS_L2_PL310 to allow the SPL to build cache-pl310.c. Before this commit, the SPL could enable the PL310 L2 cache [1], but the cache maintenance functions from cache-pl310.c were only useable for non-SPL builds. After enabling the cache one must be able to flush it, too. Thus this commit allows cache-pl310.c to be included in the SPL build. [1] See for example arch/arm/mach-imx/cache.c: v7_outer_cache_enable() Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-09-01Convert CONFIG_SYS_L2_PL310 to KconfigPhilip Oberfichtner
This converts CONFIG_SYS_L2_PL310 to Kconfig. For omap2 and mvebu the 'select SYS_L2_PL310' locations were determined using ./tools/moveconfig -i CONFIG_SYS_L2_PL310. For mx6 I manually chose ARCH_MX6 as 'select' location. The correctness has been verified using $ ./tools/moveconfig.py -f ARCH_MX6 ~SYS_L2_PL310 ~SYS_L2CACHE_OFF 0 matches That means whenever an ARCH_MX6 board had SYS_L2_PL310 disabled, this was correctly reflected in SYS_L2CACHE_OFF. Thus it's safe to insert the 'select' statement under ARCH_MX6. Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-09-01Remove CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS et alTom Rini
This removes the following symbols: CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_DELAY_MS CONFIG_SYS_I2C_LDI_ADDR CONFIG_SYS_I2C_DVI_ADDR CONFIG_SYS_I2C_DVI_BUS_NUM They are unused by any code in tree at this time. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-09-01Convert CONFIG_SYS_I2C_EEPROM_CCID et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_I2C_EEPROM_CCID CONFIG_SYS_I2C_EEPROM_NXID CONFIG_SYS_EEPROM_BUS_NUM Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-26Merge branch '2022-08-26-assorted-platform-updates' into nextTom Rini
- Assorted Arm, TI and Qualcomm platform updates
2022-08-26firmware: ti_sci: Move ACK checking to ti_sci_do_xfer() functionAndrew Davis
We can check if the message was acknowledged in the common ti_sci_do_xfer() which lets us remove it from after each call to this function. This simplifies the code and reduces binary size. Signed-off-by: Andrew Davis <afd@ti.com>
2022-08-26firmware: ti_sci: Remove inline keyword from functionsAndrew Davis
The inline hint is not needed here, the compiler will do the right thing based on if we are compiling for speed or for code size. In this case the inline causes this function to be placed inside each callsite which is not the right thing to do for either speed nor size. There is no performance benefit to this due to the larger function size reducing cache locality, but there is a huge size penalty. Remove inline keyword. Signed-off-by: Andrew Davis <afd@ti.com>
2022-08-26firmware: ti_sci: Factor out message alloc failed messageAndrew Davis
We don't need to print the same message in every location, just print it in the function that fails and remove all the extra message printouts. Signed-off-by: Andrew Davis <afd@ti.com>
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