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2021-10-07configs: meson64: add SCSI boot targetNeil Armstrong
Add SCSI target to be able to boot from the SATA disks on the Odroid HC4 using an on-board AHCI PCIe controller. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2021-10-07ARM: meson-axg: remove local USB nodesNeil Armstrong
Drop the local USB nodes after Linux 5.14 sync. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07ARM: meson: keep HW order for MMC devicesNeil Armstrong
Since Linux commmit [1], the order is fixed with aliases, in order to keep the MMC device order, set it back to HW order in U-Boot dtsi files. [1] ab547c4fb39f ("arm64: dts: amlogic: Assign a fixed index to mmc devices") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07usb: dwc3: meson-gxl: add AXG compatibleNeil Armstrong
Upstream Linux uses the "amlogic,meson-axg-usb-ctrl" for AXG SoCs. This adds it to the compatible list for this driver. Reported-by: Vyacheslav Bocharov <adeep@lexina.in> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Vyacheslav Bocharov <adeep@lexina.in>
2021-10-07ARM: meson: Sync Amlogic DT from Linux 5.14Neil Armstrong
Import Amlogic DT changes from Linux commit 7d2a07b76933 ("Linux 5.14"), dt-bindings clock changes and new meson-g12b-gsking-x.dts, meson-sm1-bananapi-m5 & odroid-hc4 boards. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-07pci: pcie_dw_meson: fix usb fail when pci link fails to go upNeil Armstrong
On Amlogic A311D, when the PCIe link fails disabling the related clocks makes USB fail. For an unknown reason, this doesn happen on the S905D3 SoC. Mimic the Linux behavior by not considering a link failure a probe failure, and continue even if the PCIe link is down. Reported-by: Art Nikpal <email2tema@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-07ARM: meson: Add S905Y2 SOC IDChristian Hewitt
Add the SOC ID for the S905Y2 to board info, see below for before/after tested with a Radxa Zero board: SoC: Amlogic Meson G12A (Unknown) Revision 28:b (30:2) SoC: Amlogic Meson G12A (S905Y2) Revision 28:b (30:2) Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-06Merge branch '2021-10-06-assorted-improvements'Tom Rini
- Use better values for ACPI OEM_VERSION - Assorted NAND related Kconifg migrations and another dependency fix
2021-10-06Convert CONFIG_NAND_OMAP_ECCSCHEME to KconfigTom Rini
The values of CONFIG_NAND_OMAP_ECCSCHEME map to the enum in include/linux/mtd/omap_gpmc.h for valid ECC schemes. Make which one we will use be a choice statement, enumerating the ones which we have implemented. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_SYS_NAND_U_BOOT_LOCATIONS et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_NAND_U_BOOT_LOCATIONS CONFIG_SYS_NAND_U_BOOT_OFFS Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_NAND_FSL_ELBC et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_NAND_FSL_ELBC CONFIG_NAND_FSL_IFC Note that a number of PowerPC platforms had previously enabled CONFIG_NAND_FSL_ELBC without CONFIG_MTD_RAW_NAND, and now they no longer enable the option, reducing the size of a few functions. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_SYS_NAND_MAX_CHIPS to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_NAND_MAX_CHIPS Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06nand.h: Cleanup linux/mtd/rawnand.h usageTom Rini
We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_SYS_NAND_ONFI_DETECTION to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_NAND_ONFI_DETECTION Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_SYS_NAND_5_ADDR_CYCLE to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_NAND_5_ADDR_CYCLE Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_SYS_NAND_BAD_BLOCK_POS to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_NAND_BAD_BLOCK_POS In order to do this, introduce a choice for HAS_LARGE/SMALL_BADBLOCK_POS as those are the only valid values. Use LARGE as the default as no in-tree boards use SMALL, but it is possible. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06nand_spl_simple: Drop CONFIG_SYS_NAND_4_ADDR_CYCLE supportTom Rini
This code is unused, drop it. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_SYS_NAND_PAGE_COUNT to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_NAND_PAGE_COUNT Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_SPL_NAND_LOAD et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SPL_NAND_LOAD CONFIG_SYS_NAND_BLOCK_SIZE CONFIG_SYS_NAND_PAGE_SIZE CONFIG_SYS_NAND_OOBSIZE Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06Convert CONFIG_NAND_LPC32XX_MLC to KconfigTom Rini
This converts the following to Kconfig: CONFIG_NAND_LPC32XX_MLC Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06m53menlo: Switch to deriving CONFIG_SYS_NAND_PAGE_COUNTTom Rini
Typically platforms will define CONFIG_SYS_NAND_PAGE_COUNT based on CONFIG_SYS_NAND_BLOCK_SIZE / CONFIG_SYS_NAND_PAGE_SIZE. Switch to this in preparation for migrating CONFIG_SYS_NAND namespace to Kconfig. Cc: Marek Vasut <marex@denx.de> Cc: Olaf Mandel <o.mandel@menlosystems.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06rk3308: Remove unused NAND definesTom Rini
These platforms do not currently enable NAND, remove these references. Cc: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-06lib: rsa: fix dependency for SPL_RSA_VERIFYOleksandr Suvorov
SPL_RSA_VERIFY requires SPL_RSA to be enabled. Add correct dependency. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2021-10-06acpi: Use U-Boot version for OEM_REVISIONPali Rohár
OEM_REVISION is 32-bit unsigned number. It should be increased only when changing software version. Therefore it should not depend on build time. Change calculation to use U-Boot version numbers and set this revision to date number. Prior this change OEM_REVISION was calculated from build date and stored in the same format. After this change macro U_BOOT_BUILD_DATE is not used in other files so remove it from global autogenerated files and also from Makefile. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05Merge branch '2021-10-05-general-updates'Tom Rini
- Assorted OPTEE cleanups - pinctrl, gpio improvements, assorted livetree migrations - Assorted pytest improvements
2021-10-05reboot-mode: migrate uclass to livetreePatrick Delaunay
Use dev_ function to support a live tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05demo: migrate uclass to livetreePatrick Delaunay
Use dev_ function to read the sides and colour to support a live tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05remoteproc: migrate uclass to livetreePatrick Delaunay
Use dev_ function to read the name and boolean to support a live tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05doc: test: Explain how to run pytests in parallelSimon Glass
Add documentation for this so people can try it out. At present it does not fully work. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-05test: Allow tpm2 tests to run in parallelSimon Glass
These tests currently run in a particular sequence, with some of them depending on the actions of earlier tests. Add a check for sandbox and reset to a known state at the start of each test, so that all tests can run in parallel. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-05test: Allow hush tests to run in parallelSimon Glass
The -z tests don't really need to be part of the main set. Separate them out so we can drop the test setup/cleans functions and thus run all tests in parallel. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-05test: Allow vboot tests to run in parallelSimon Glass
Update the tests to use separate working directories, so we can run them in parallel. It also makes it possible to see the individual output files after the tests have completed. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-10-05test/py: Check hashes produced by mkimage against known valuesAlexandru Gagniuc
Target code and mkimage share the same hashing infrastructure. If one is wrong, it's very likely that both are wrong in the same way. Thus testing won't catch hash regressions. This already happened in commit 92055e138f28 ("image: Drop if/elseif hash selection in calculate_hash()"). None of the tests caught that CRC32 was broken. Instead of testing hash_calculate() against itself, create a FIT with containing a kernel with pre-calculated hashes. Then check the hashes produced against the known good hashes. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05gpio: Factor out DT flag translationSamuel Holland
The generic GPIO flags binding is shared across many drivers, some of which need their own xlate function. Factor out the flag translation code from gpio_xlate_offs_flags so it does not need to be duplicated. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05gpio: Verify validity of pin offsets from device treesSamuel Holland
Translation of an OF GPIO specifier should fail if the pin offset is larger than the number of pins in the GPIO bank. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05gpio: Verify validity of pin offsets when looking up namesSamuel Holland
Translation of a pin name to a device+offset should fail if the offset is larger than the number of pins in the GPIO bank. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05arm: imx: mx7: Move CONFIG_OPTEE_TZDRAM_SIZE from lib/opteeAlexandru Gagniuc
This config is only used by three boards with this SOC. Most other platforms derive this information from devicetree, and are unlikely to ever need this config. Moreover, it is confusing when Kconfig asks for this value under "Support OPTEE images", but does not do anything with the value. Move it to imx7 for those boards who still make use of it. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-05lib: optee: Remove CONFIG_OPTEE_LOAD_ADDRAlexandru Gagniuc
This value is not used by u-boot, and it should not. The load address of an OPTEE image is defined by said image. Either a uImage or a FIT will have a defined load address and entry point. Those values are the correct ones, not CONFIG_OPTEE_LOAD_ADDR. Commit f25006b96e9f ("optee: Add CONFIG_OPTEE_LOAD_ADDR") justifies this config by requiring its presence in u-boot's .config for other images as part of a larger build, claiming it is "the best way". This argument is not persuasive. U-boot's configuration is driven by platform requirements, not the other way around. It seems more likely that the argument is conflating tooling issues with Kconfig. Yocto and buildroot have excellent mechanisms for defining values across the board (pun intended). u-boot's Kconfig is the wrong place to do it. Furthermore, it is not "best" for u-boot because it hardcodes a value which is then not used. In fact the load address that u-boot uses is the one derived from the OPTEE image. Confused yet? I sure was. To prevent future confusion, remove CONFIG_OPTEE_LOAD_ADDR. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-05lib: optee: Remove CONFIG_OPTEE_TZDRAM_BASEAlexandru Gagniuc
It is no longer used in u-boot. Information about the TZDRAM location is usually available in the devicetree as "/reserved-memory/" nodes. Because this isn't used, remove it. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-05lib: optee: Avoid CONFIG_TZDRAM_* in optee_verify_bootm_image()Alexandru Gagniuc
The configs TZDRAM_BASE and TZDRAM_SIZE are expected to describe the memory allocated to the OPTEE region. according to according to commit c5a6e8bd00cc ("optee: Add optee_verify_bootm_image()"). The TZDRAM is with some limitations, described by "/reserved-memory" nodes in the devicetree. Consequently TZDRAM_BASE and TZDRAM_SIZE can point to imaginary regions which have nothing to do with actual DRAM. They are not used to configure the hardware or set up the Trust Zone Controller (TZC) for OP-TEE -- the devicetree values are used instead. When a valid OP-TEE image does not fall within the region described by these configs, u-boot will refuse to load it. In fact, it mostly serves to cause "bootm" to reject perfectly good OP-TEE images. Ironically, someone has to correctly configure the devicetree for TZDRAM, then go back and enter the same information in Kconfig for "bootm". To remedy this, do not use TZDRAM_BASE and TZDRAM_SIZE in the verification of OPTEE images. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-10-05tee: add a stub for tee_find_devicePatrick Delaunay
Add stub for tee_find_device function when CONFIG_TEE is not activated to simplify the caller code. This patch allows to remove the CONFIG_IS_ENABLED(OPTEE) tests for stm32 platform. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@inaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
2021-10-05lib: optee: remove the duplicate CONFIG_OPTEEPatrick Delaunay
The configuration CONFIG_OPTEE is defined 2 times: 1- in lib/optee/Kconfig for support of OPTEE images loaded by bootm command 2- in drivers/tee/optee/Kconfig for support of OP-TEE driver. It is abnormal to have the same CONFIG define for 2 purpose; and it is difficult to managed correctly their dependencies. Moreover CONFIG_SPL_OPTEE is defined in common/spl/Kconfig to manage OPTEE image load in SPL. This definition causes an issue with the macro CONFIG_IS_ENABLED(OPTEE) to test the availability of the OP-TEE driver. This patch cleans the configuration dependency with: - CONFIG_OPTEE_IMAGE (renamed) => support of OP-TEE image in U-Boot - CONFIG_SPL_OPTEE_IMAGE (renamed) => support of OP-TEE image in SPL - CONFIG_OPTEE (same) => support of OP-TEE driver in U-Boot - CONFIG_OPTEE_LIB (new) => support of OP-TEE library After this patch, the macro have the correct behavior: - CONFIG_IS_ENABLED(OPTEE_IMAGE) => Load of OP-TEE image is supported - CONFIG_IS_ENABLED(OPTEE) => OP-TEE driver is supported Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-10-05pinctrl: single: Add request() apiBharat Gooty
Add pinctrl_ops->request api to configure pctrl pad register in gpio mode. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com> Acked-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-05pinctrl: single: Parse gpio details from dtBharat Gooty
Parse different gpio properties from dt as part of probe function. This detail is required to enable pinctrl pad later when gpio lines are requested. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com> Acked-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
2021-10-04Merge branch 'next'Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-04Prepare v2021.10v2021.10Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-04mtd: cqspi: Fix division by zeroMarek Vasut
Both dummy.nbytes and dummy.buswidth may be zero. By not checking the later, it is possible to trigger division by zero and a crash. This does happen with tiny SPI NOR framework in SPL. Fix this by adding the check and returning zero dummy bytes in such a case. Fixes: 38b0852b0ea ("spi: cadence-qspi: Add support for octal DTR flashes") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Pratyush Yadav <p.yadav@ti.com> [trini: Drop Pratyush's RB as his requested changes weren't made as Marek disagreed]
2021-10-03Merge branch '2021-10-03-platform-updates' into nextTom Rini
- TI K3 updates, add IOT2050 platform - rtc rx8025 updates, PCI fixes
2021-10-03iot2050: Enable watchdog support, but do not auto-start itJan Kiszka
This allows to use the watchdog in custom scripts but does not enforce that the OS has to support it as well. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2021-10-03watchdog: rti_wdt: Add support for loading firmwareJan Kiszka
To avoid the need of extra boot scripting on AM65x for loading a watchdog firmware, add the required rproc init and loading logic for the first R5F core to the watchdog start handler. In case the R5F cluster is in lock-step mode, also initialize the second core. The firmware itself is embedded into U-Boot binary to ease access to it and ensure it is properly hashed in case of secure boot. One possible firmware source is https://github.com/siemens/k3-rti-wdt. The board is responsible for providing the firmware as additional loadable via the U-Boot fit image. The driver will pick up its location from /fit-images/k3-rti-wdt-firmware then. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-10-28 17:08:33 +0000