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This function is currently a misnomer at times as we have cases where it
passes arguments to the image. In preparation for making that be a more
common case rename this function to jump_to_image(...). In order to do
this, rename jump_to_image in board_init_r(...) to jumper so that we do
not have a conflict.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Reword the commit message, adding missing cases of
jump_to_image_no_args()]
Signed-off-by: Tom Rini <trini@konsulko.com>
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Move this so we can include it from sandbox, needed since it is in a
bloblist and must have a check.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Sukrut Bellary <sbellary@baylibre.com> says:
This patch series adds the support for
1. In am33xx SoC[1], enhanced capture (eCAP) supports auxiliary PWM (APWM).
This series adds the PWM driver support for the APWM feature for eCAP on
AM33xx. AM335X_ECAP0_IN_PWM0_OUT is used to enable the backlight.
2. Fix build warning in ti-ehrpwm driver in dev_deb().
3. Enable eCAP0 PWM and LCD pin muxing to support splash screen on
AM335x EVM[2].
[1] AM335x TRM - https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf
[2] AM335x EVM - https://www.ti.com/tool/TMDXEVM3358
per discussion on the earlier patch series,
https://lore.kernel.org/all/20250319202516.3300444-1-sbellary@baylibre.com/
dropping the device tree changes in this series due to OF_UPSTREAM
conflict.
As we are dropping the DT patch, started with the new series instead of
V2.
This series doesn't contain defconfig changes since we don't want to
enable LCD, splash screen and PWM support by default.
Enabling splash screen and PWM support in defconfig causes u-boot crash
on AM335x based beaglebone black. This will be handled in a separate
patch.
Link: https://lore.kernel.org/r/20250530212232.1686613-1-sbellary@baylibre.com
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On AM335x EVM[1],
1. pin AM335X_ECAP0_IN_PWM0_OUT is used to enable the
backlight. ECAP0 can be configured in single channel PWM mode.
If CONFIG_PWM_TI_ECAP is enabled, perform eCAP0 pin muxing.
2. Pins LCD_DATA0 - LCD_DATA15, gpmc_ad8 - gpmc_ad15 and
lcd_vsync, lcd_sync, lcd_ac_bias_en, lcd_pclk are used for driving LCD.
If CONFIG_AM335X_LCD is enabled, perform the LCD pin muxing.
This is required to enable splash screen support on AM335x EVM.
[1] AM335x EVM - https://www.ti.com/tool/TMDXEVM3358
Signed-off-by: Sukrut Bellary <sbellary@baylibre.com>
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If CONFIG_PWM_TI_EHRPWM is enabled, it throws the build warning in
dev_dbg() due to incorrect format specifier as,
"warning: format ‘%lx’ expects argument of type ‘long unsigned int’, but
argument 4 has type ‘fdt_addr_t’ {aka ‘unsigned int’}".
Fix this with the correct format specifier.
Signed-off-by: Sukrut Bellary <sbellary@baylibre.com>
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In am33xx SoC[1], enhanced capture (eCAP) supports auxiliary PWM (APWM).
This series adds the PWM driver support for the APWM feature for eCAP on
AM33xx.
eCAP HW also supports the capture mode. Currently, this driver only
supports APWM.
This is based on the Linux kernel driver -> drivers/pwm/pwm-tiecap.c
Version: v6.12
Tested on AM335x EVM[2].
[1] AM335x TRM - https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf
[2] AM335x EVM - https://www.ti.com/tool/TMDXEVM3358
Signed-off-by: Sukrut Bellary <sbellary@baylibre.com>
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RAM drivers using Device Model currently lack of their own Kconfig menu
entry, which makes Kconfig put all options of the class in the top-level
menu of device drivers. These options are also incorrectly grouped with
pinctrl options in the generated .config, which is hard to read. Let's
create a menu entry for these drivers.
Fixes: 6c51df6859f ("dm: Add support for RAM drivers")
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Fix typo from heder to header
Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
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Although if we don't setup an initrd, there could be a stale initrd
setting from the previous boot firmware in the live device tree. So,
make sure there is no setting left if we don't want an initrd.
This can happen when booting on a Raspberry Pi. The boot firmware can
happily load an initrd before us and configuring the addresses in the
live device tree we get handed over.
Especially the setting `auto_initramfs` in config.txt is dangerous.
When enabled (default), the firmware tries to be smart and looks for
initramfs files.
Signed-off-by: Richard Weinberger <richard@nod.at>
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Use lbaint_t for blknr to avoid overflow in ext4fs_read_file().
Background:
blknr (block number) used in ext4fs_read_file() could be increased to a
very large value and causes a wrap around at 32 bit signed integer max,
thus becomes negative. This results in an out-of-normal range for sector
number (during the assignment delayed_start = blknr) where delayed_start
sector is typed uint64 lbaint_t. This causes the "Read outside partition"
error.
Looks like we also have this overflown problem in ext4_write.c that needs
to be addressed.
This patch was tested on the Synology DS116 (Armada 385) board, and a
4TB Seagate HDD.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
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Some SoCs require a Trusted Firmware-A (TF-A) AP Trusted ROM (BL1) to
initialize the SoC before U-Boot can run properly. Add an atf-bl1 etype
so we can properly package BL1 into a final binary
Signed-off-by: Bryan Brattlof <bb@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Call do_board_detect() hook before the K3 DDRSS driver gets probed.
It will allow boards to adjust DDR timings in do_board_detect().
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
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Ilias Apalodimas <ilias.apalodimas@linaro.org> says:
Another series backporting and merging patches from Linux 5.1 kbuild.
There is still a gap that I plan to update after this series gets
merged [0]
[0] https://source.denx.de/u-boot/custodians/u-boot-tpm/-/commit/5da099cef04fb5c02dcafab8d1bab8ddc2855765
Link: https://lore.kernel.org/r/20250611202449.2317279-1-ilias.apalodimas@linaro.org
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Backported from kernel
commit e07db28eea38 ("kbuild: fix single target build for external module")
It's worth noting that crmodverdir is empty for U-Boot.
Just backport it to make diffing easier
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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Backported from kernel
commit 059bc9fc375e ("kbuild: make 'archprepare' depend on 'scripts'")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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Backported from kernel
commit e00d88804814 ("kbuild: mark prepare0 as PHONY to fix external module build")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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Backported from kernel
commit 221cc2d27ddc ("kbuild: skip parsing pre sub-make code for recursion")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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Backported from kernel
commit 156e7cbb3ef5 ("kbuild: do not overwrite .gitignore in output directory")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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Backported from kernel
commit 6f303d60534c ("gcc-9: silence 'address-of-packed-member' warning")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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Backported from kernel
commit 4f1c1008e786 ("kbuild: remove meaningless prepare2 target")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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Backported from kernel
commit 3a51ff344204 ("kbuild: gitignore output directory"
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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Backported from kernel
commit b89f25ea7892 ("kbuild: use -Werror=implicit-... instead of -Werror-implicit-..."
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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Backported from kernel
commit ad15006cc784 ("kbuild: clang: choose GCC_TOOLCHAIN_DIR not on LD")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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Backported from kernel
commit ba97df45581f ("kbuild: use assignment instead of define ... endef for filechk_* rules")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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Backported from kernel
commit 61a0902a06d6a ("kbuild: add -Werror=implicit-int flag unconditionally")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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Backport from kernel
commit 42a92bccd213 ("kbuild: add -fno-PIE flag unconditionally")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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dev_read_{s,u}32_default"
Quentin Schulz <foss+uboot@0leil.net> says:
Out of all the dev_read_*_default functions, only two do not properly
use the type as argument and return type: dev_read_u32_default and
dev_read_s32_default. They both use int instead of u32/s32.
Considering that it's generally not guaranteed that an int is 4 bytes
but also for consistency sake, let's have them use the expected type.
Note that I have not tested this, just stumbled upon that inconsistency
by chance.
Link: https://lore.kernel.org/r/20250528-dev_read_x32_default-v1-0-6ab1734dd7a2@cherry.de
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dev_read_s32_default is for getting an s32 from a Device Tree property
and allows to take a default value if that property is missing.
Considering it calls ofnode_read_u32_default which takes a u32 and
returns a u32, it should do the same instead of using an int, especially
considering that int size is typically architecture-specific, as opposed
to s32/u32.
s32 and u32 being the same size, dev_read_s32* functions calling
ofnode_read_u32_default shouldn't be an issue (at the type level at
least) as the information will be stored appropriately in 4B regardless
of the sign.
This incidentally matches all other dev_read_*_default functions.
Fixes: a1b17e4f4c82 ("dm: core: Add a function to read into a unsigned int")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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dev_read_u32_default is for getting a u32 from a Device Tree property
and allows to take a default value if that property is missing.
Considering it calls ofnode_read_u32_default which takes a u32 and
returns a u32, it should do the same instead of using an int, especially
considering that int size is typically architecture-specific, as opposed
to u32.
This incidentally matches all other dev_read_*_default functions (except
dev_read_s32_default which will be tackled in the next commit).
Fixes: 47a0fd3bad38 ("dm: core: Implement live tree 'read' functions")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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https://source.denx.de/u-boot/custodians/u-boot-stm into next
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/26607
- Add clock and reset drivers support for STM32MP25
- Add STM32H747-Discovery board support
- Add tamp_nvram driver
- Add SPL support and clock tree init to STM32MP13 RCC driver
- Add STM32MP13xx ram support
- Add support for STM32 Image V2.0 for STM32MP13xx
- Fix SYSRAM size on STM32MP13xx
- Fix DBGMCU macro on STM32MP13xx
- Auto-detect ROM API table on STM32MP15xx
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The board includes an STM32H747XI SoC with the following resources:
- 2 Mbytes Flash
- 1 Mbyte SRAM
- LCD-TFT controller
- MIPI-DSI interface
- FD-CAN
- USB 2.0 high-speed/full-speed
- Ethernet MAC
- camera interface
Detailed information can be found at:
https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
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Add stm32h747i-disco-u-boot DTS file with FMC SDRAM node and its
pinmux settings.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
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The board includes an STM32H747XI SoC with the following resources:
- 2 Mbytes Flash
- 1 Mbyte SRAM
- LCD-TFT controller
- MIPI-DSI interface
- FD-CAN
- USB 2.0 high-speed/full-speed
- Ethernet MAC
- camera interface
Detailed information can be found at:
https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20250427074404.3278732-9-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
[ upstream commit: 49ba8fc6eab63165639ffbb9f976222d39739cab ]
(cherry picked from commit 19c508dc3d584dc81c0cc6a05576f436022db5b6)
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Add an additional pin map configuration for using the USART1 controller
on the stm32h743 MCU.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20250427074404.3278732-8-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
[ upstream commit: 8e71dfe46a4a1e9505b1a327470f879b63388968 ]
(cherry picked from commit 9d5ec2c9c5d5131e701447c5c32aaf6c688c6e01)
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Add a pin map configuration for using the UART8 controller on the
stm32h743 MCU.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20250427074404.3278732-7-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
[ upstream commit: 47d16ab94b8e5e85aedba3cd22cfdf3877bf1dfb ]
(cherry picked from commit 59621a6472cd6eeb748ed6d6202a21d0f3cc5a83)
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Add support for UART8 by applying the settings specified in the
reference manual RM0433.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20250427074404.3278732-6-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
[ upstream commit: 07aa43adae2363c3734055aeba0789536fa0f8f2 ]
(cherry picked from commit 8fe35c381c7c6db1b95c80be551afada1e9f28e0)
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As stated in the reference manual RM0433, the STM32H743 MCU has
USART1/2/3/6, UART4/5/7/8, and LPUART1. The patches make all the clock
macros for the serial ports consistent with the documentation.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250427074404.3278732-5-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
[ upstream commit: ecab3c40fa49a2073c4c916ebff9496a6b5db7bd ]
(cherry picked from commit aae9a01929183784bf3e2a8001aba408bd0dadf3)
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The board includes an STM32H747XI SoC with the following resources:
- 2 Mbytes Flash
- 1 MByte SRAM
- LCD-TFT controller
- MIPI-DSI interface
- FD-CAN
- USB 2.0 high-speed/full-speed
- Ethernet MAC
- camera interface
Detailed information can be found at:
https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250427074404.3278732-3-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
[ upstream commit: 815d49f61ea049075482161f897aa13e1ae30cbb ]
(cherry picked from commit 06f64674b332c7db4ac56a4dccb0e960d25bea24)
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Allow expanding possible configurations for the same peripheral,
consistent with the scheme adopted in Linux.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20250427074404.3278732-2-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
[ upstream commit: 6a36dca4375fce51b627f5a985a79fc8b8bd7f55 ]
(cherry picked from commit 9a72c83f2e670087ae2d6dc54d2926f16c6762d0)
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TAMP backup registers will be exposed as nvmem cells.
Each registers ([0..127] for STM32MP2, [0..31] for STM32MP1) could be
exposed as nvmem cells under the nvram node in device tree
Signed-off-by: Simeon Marijon <simeon.marijon@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
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Add support for generating STM32 Image V2.0, which is used by STM32MP13xx.
The image header layout is similar to STM32MP15xx STM32 Image V1.0, but is
different enough to justify duplicate functions to generate the v2 image.
This code at least attempts to align the V1 and V2 image handling where
possible.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
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Add support for configuring DRAM controller on STM32MP13xx SoC.
The DRAM controller is basically identical to the DWC controller
on STM32MP15xx SoC, except the bus width is reduced from 32bit to
16bit and a few registers and bits are therefore not present.
Handle the difference by factoring these parts out. Use IS_ENABLE()
as much as possible to assure code which is not enabled on builds
for a single SoC gets compiled out. Handle the different offset of
RCC_DDRITFCR register and missing DDRC2 clock the same way.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
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Add SPL support and clock tree init to STM32MP13 RCC driver. This
consists of two parts, make SCMI into an optional dependency and
add clock tree initialization. The SCMI dependency is made optional
first by registering the few core clock provided by SCMI clock as
fixed clock, and second by letting the clock core parse out the
clock configuration from SoC registers. The clock initialization
code is derived from STM32MP15xx clock tree initialization code,
which is almost identical, except for the use of new PLL2000 for
PLL1 on STM32MP13xx .
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
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Fix basic typo, missing t in security . No functional change .
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
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The ROM API table location is passed to the SPL by BootROM in register r0,
make use of this, store the content of r0 and later use it to access the
ROM API table to determine current boot device.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
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The DBGMCU block is available at address 0x50081000 both on STM32MP13xx
and on STM32MP15xx . There is no reason to limit the DBGMCU macro being
set only on STM32MP15xx , remove the ifdeffery.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
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The STM32MP13xx has only 128 kiB of SYSRAM starting at address 0x2ffe0000 .
The STM32MP15xx has 256 kiB of SYSRAM starting at address 0x2ffc0000 . Make
sure both SoCs configure ARMV7_SECURE_BASE correctly . Define the SYSRAM
base in stm32.h to be consistent with the STM32MP15xx macro.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
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Drop a space after tab, no functional change.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
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Due activation of SCMI, we need to increase SYS_MALLOC_F_LEN value
to avoid following message:
U-Boot 2025.04-01224-g75b77a2a6d31-dirty (Apr 25 2025 - 11:23:30 +0200)
alloc space exhausted ptr 400040 limit 400000
alloc space exhausted ptr 400020 limit 400000
alloc space exhausted ptr 400060 limit 400000
alloc space exhausted ptr 400060 limit 400000
Set SYS_MALLOC_F_LEN to 0x60000 to fix this issue.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
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Due SCMI update to protocol v2.0, we need to increase
SYS_MALLOC_F_LEN value to avoid following message:
alloc space exhausted ptr 200040 limit 200000
Set SYS_MALLOC_F_LEN to 0x210000 to fix this issue.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
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