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2015-02-17Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini
2015-02-16ARM: lpc3250: config: add generic board supportVladimir Zapolskiy
The only LPC3250 board works fine with enabled generic board support, add CONFIG_SYS_GENERIC_BOARD right into the arch config header. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2015-02-16sunxi: Normalise FEL supportSimon Glass
Make sunxi's FEL code fit with the normal U-Boot boot sequence instead of creating its own. There are some #ifdefs required in start.S. Future work will hopefully remove these. This series is available at u-boot-dm, branch sunxi-working. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-02-16arm: spl: Provide for a board-specific loaderSimon Glass
Some boards have a special way of loading U-Boot that does not fit with the existing SPL code. For example sunxi uses an 'FEL' mode where U-Boot is loaded over USB. Add a CONFIG option and boot mode for this. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-02-16arm: Allow lr to be saved by board codeSimon Glass
The link register value can be required on some boards (e.g. FEL mode on sunxi) so use a branch instruction to jump to save_boot_params() instead of a branch link. This requires a branch back to save_boot_params_ret so adjust the users to deal with this. For exynos just drop the function since it doesn't do anything. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-02-16sunxi: dram: Un-inline dram helper functionsHans de Goede
Move the dram helper functions to a separate C file, rather then having them as inline helpers in dram.h. This saves 144 bytes in the .text segment for sun6i builds. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-02-16keystone2: ddr3: eliminate using global ddr3_size variableVitaly Andrianov
KS2 ddr3 initialization uses ddr3_size global variable before u-boot relocation. Even if the variable is not being used after relocation, writing to it corrupts relocation table. This patch removes the global ddr3_size variable and uses local one instead. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Tested-by: Nishanth Menon <nm@ti.com>
2015-02-16clock_am43xx:Set the MAC clock to /5 for OPP100Steve Kipisz
When EMAC is in the boot order, the boot ROM sets OPP50 and the MAC clock is set to /2. SPL needs to change it to /5 for Ethernet to generate the correct txclk. This patch sets it correctly. Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
2015-02-16ARM: DRA7: EMIF: Update SDRAM_REF_CTRL register valueLokesh Vutla
The value in SDRAM_REF_CTRL controls the delay time between the initial rising edge of DDR_RESETn to rising edge of DDR_CKE (JEDEC specs this as 500us). In order to achieve this, SDRAM_REF_CTRL should be written with a value corresponding to 500us delay before starting DDR initialization sequence, and configure proper value at the end of sequence. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-02-13Merge git://git.denx.de/u-boot-samsungTom Rini
2015-02-13Exynos542x: Add and enable get_periph_rate supportAkshay Saraswat
We planned to fetch peripheral rate through one generic API per peripheral. These generic peripheral functions are in turn expected to fetch apt values from a function refactored as per SoC versions. This patch adds support for fetching peripheral rates for Exynos5420 and Exynos5800. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-02-12dm: at91: Drop use of ATMEL_PIO_PORTS in the header fileSimon Glass
With driver model the number of PIO ports is defined by platform data, so remove it from the header file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-02-10Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini
2015-02-10Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
2015-02-10arm: mxs: Add 'Wait for JTAG user' if booted in JTAG modeGraeme Russ
When booting in JTAG mode, there is no way to use soft break-points, and no way of knowing when SPL has finished executing (so the user can issue a 'halt' command to load u-boot.bin for example) Add a debug output and simple loop to stop execution at the completion of the SPL initialisation as a pseudo break-point when booting in JTAG mode Signed-off-by: Graeme Russ <gruss@tss-engineering.com>
2015-02-10imx: mx6: Fixed AIPS3 base address issueYe.Li
Should use AIPS3 configuration address 0x0227C000 to set AIPS3, not the AIPS3 base address. Additional, replace AIPS1_BASE_ADDR to AIPS3_ARB_BASE_ADDR to align with AIPS1 and AIPS2, and resolve the AIPS3_ARB_BASE_ADDR undefine problem. Signed-off-by: Ye.Li <B37916@freescale.com>
2015-02-10imx:mx6 update fuse_bank0_regsPeng Fan
Update fuse_bank0_regs structure according reference mannual. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-02-09Merge branch 'microblaze' of git://git.denx.de/u-boot-microblazeTom Rini
2015-02-09common: Move dram_init() declaration to common locationMichal Simek
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-02-07arm, at91: add reset controller status registerHeiko Schocher
add reset controller status register Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Bo Shen <voice.shen@atmel.com>
2015-02-07ARM: atmel: cleanup: remove at91cap9 related codeBo Shen
As the at91cap9adk board is removed by commit: b5508344 (ARM: remove broken "at91cap9adk" board), so the at91cap9 code is not used anymore, and also the document for at91cap9 can not be found on www.atmel.com, so remove the at91cap9 related code. Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-02-07ARM: atmel: sama5d4: add matrix1 base addr definitionBo Shen
Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07ARM: atmel: spl: add saic to aic redirect functionBo Shen
Some SoC need to redirect the saic to aic to make the interrupt to work, here add a weak function to be replaced by real function. Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07ARM: atmel: sama5: add sfr register header fileBo Shen
The SFR (special function registers) can be shared bwteen sama5d3 and sama5d4 soc. Signed-off-by: Bo Shen <voice.shen@atmel.com> [whitespace adoptions for 80 char compliance] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-02-07ARM: atmel: sama5: add bus matrix header fileBo Shen
This matrix header file can be shared between sama5d3 and sama5d4 soc. Signed-off-by: Bo Shen <voice.shen@atmel.com> [whitespace adaptions for 80 char compliance] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-02-06Merge git://git.denx.de/u-boot-marvellTom Rini
2015-02-06arm: armada-xp: Add SPL support used to include the DDR training codeStefan Roese
This patch adds SPL support to the Marvell Armada-XP. With this addition the bin_hdr integration is not needed any more. The SPL will first initialize the serdes/PHY and the call the DDR setup and training code now integrated into mainline U-Boot. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
2015-02-06arm: maxbcm: Enable SPL to include DDR training code into U-BootStefan Roese
This patch adds SPL support to the maxbcm MV78460 based board. Including the fixed DDR configuratrion needed for the DDR training code. And the the serdes PHY init code. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
2015-02-06arm: armada-xp: Change built target to include the SPL binary as bin_hdrStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Luka Perkov <luka.perkov@sartura.hr>
2015-02-07ARM: UniPhier: refactor pinmon commandMasahiro Yamada
The return value of get_boot_mode_sel() is used as the index of the boot_device_table[] array. Its type should be "int" rather than "u32". Use only the iterator "i" for the loop in do_pinmon(). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-02-07ARM: UniPhier: remove dummy gpio.hMasahiro Yamada
This dummy header was introduced by commit 630bf80ebb34 (ARM: UniPhier: add dummy gpio.h to enable CONFIG_OF_CONTROL). Thanks to commit a08d643dbd85 (dm: Drop gpio.h header from fdtdec.c), such an ugly workaround is no longer needed. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-02-02Merge branch 'master' of git://git.denx.de/u-boot-tiTom Rini
2015-02-02Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2015-02-02sunxi: rsb: Move rsb_set_device_mode() call to rsb_init()Hans de Goede
It turns out that the device_mode_data is rsb specific, rather then slave specific, so integrate the rsb_set_device_mode() call into rsb_init(). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-02-02sunxi: rsb: Add sun9i (A80 support)Hans de Goede
Add support for the A80 to the rsb code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-02-02sunxi: Add a GMAC Transmit Clock Delay Chain Kconfig optionHans de Goede
And use this to set the GMAC Transmit Clock Delay Chain value on Banana boards, rather then keying of CONFIG_TARGET_FOO. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-01-29exynos5: pinmux: check flag for i2c configPrzemyslaw Marczak
Some versions of Exynos5 supports High-Speed I2C, on few interfaces, this change allows support this. The new flag is: PINMUX_FLAG_HS_MODE Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Akshay Saraswat <akshay.s@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-01-29dm: mmc: Remove use of fdtdec GPIO supportSimon Glass
These functions are going away, so use the new uclass support instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-01-29dm: zynq: Remove inline gpio functionsSimon Glass
These functions serve no useful purpose, and conflict with the generic API. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-01-29dm: tegra: video: Remove use of fdtdec GPIO supportSimon Glass
These functions are going away, so use the new uclass support instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-01-29omap3: add some MUX definitions for upcoming cairoAlbert ARIBAUD \(3ADEV\)
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-01-29omap3: mmc: add 1.8v bias setting for MMC1Albert ARIBAUD \(3ADEV\)
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-01-29omap3: add SDRC settings for Samsung K4X51163PGAlbert ARIBAUD \(3ADEV\)
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-01-29omap3: make SDRC SHARING setting configurableAlbert ARIBAUD \(3ADEV\)
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-01-29ARM: OMAP5: DRA7xx: Add support for power rail groupingLubomir Popov
On the DRA72x (J6Eco) EVM one PMIC SMPS is powering three SoC core rails. This concept of using one SMPS to supply multiple core domains (in various, although limited combinations, per primary device use case) has now become common and is used by many customer J6/J6Eco designs; it is supported by a number of corresponding PMIC OTP versions. This patch implements correct operation of the core voltages scaling routine by ensuring that each SMPS that is supplying more than one domain shall be written only once, and with the highest voltage of those fused in the SoC (or of those defined in the corresponding header if fuse read is disabled or fails) for the power rails belonging to the group. The patch also replaces some PMIC-related magic numbers with the appropriate definitions. The default OPP_NOM voltages for the DRA7xx SoCs are updated as well, per the latest DMs. Signed-off-by: Lubomir Popov <l-popov@ti.com>
2015-01-26Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini
2015-01-26Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini
2015-01-26ARM: zynq: List qspi, smc and nand baseaddressesMichal Simek
Add missing addresses to the list. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-01-26ARM: zynq: List nand, qspi and jtag boot modesMichal Simek
Use full boot mode list in SPL. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-01-23ls102xa: fdt: Disable QSPI and DSPI in NOR/NAND/SD bootAlison Wang
As QSPI/DSPI and IFC are pin multiplexed, QSPI and DSPI are only enabled in QSPI boot, and disabled in other boot modes. IFC is enabled in NOR/NAND/SD boot, and disabled in QSPI boot. This patch will add fdt support for the above rules. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>