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2020-10-16arm: fsl-layerscape: Include device_compat.h in soc.cTom Rini
Necessary for dev_xxx. Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-15Merge tag 'mmc-2020-10-14' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-mmc - fsl_esdhc_imx cleanup - not send cm13 if send_status is 0. - Add reinit API - Add mmc HS400 for fsl_esdhc - Several cleanup for fsl_esdhc - Add ADMA2 for sdhci
2020-10-14Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- Octeon TX: Add NAND driver (Suneel) - Octeon TX: Add NIC driver driver (Suneel) - Octeon TX2: Add NIC driver driver (Suneel) - Armada 8040: Add iEi Puzzle-M80 board support (Luka) - Armada A37xx SPI: Add support for CS-GPIO (George) - Espressobin: Use Linux model/compatible strings (Andre) - Espressobin: Add armada-3720-espressobin-emmc.dts from Linux (Andre) - Armada A37xx: Small cleanup of config header (Pali)
2020-10-14arm: enable DM_RNG on QEMU by defaultHeinrich Schuchardt
The EFI_RNG_PROTOCOL is needed for address randomization in Linux. We should provide it by default on QEMU. Reported-by: François Ozog <francois.ozog@linaro.org> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-10-14arm64: dts: a3720: add support for espressobin with populated emmcAndre Heider
Import armada-3720-espressobin-emmc.dts from Linux, but use sdhc1 for emmc, since our dtsi is still based on downstream and sdhc0 is used for the sd card. Signed-off-by: Andre Heider <a.heider@gmail.com>
2020-10-14arm64: dts: armada-3720-espressobin: split common parts to .dtsiAndre Heider
Move most of the dts to the new common armada-3720-espressobin.dtsi file, just like Linux, but keep the current, downstream based, version. The dts itself is imported from Linux. Signed-off-by: Andre Heider <a.heider@gmail.com>
2020-10-14arm64: dts: armada-3720-espressobin: use Linux model/compatible stringsAndre Heider
Fix the actual board vendor and ease synching dts files from Linux. Signed-off-by: Andre Heider <a.heider@gmail.com> Reviewed-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2020-10-14arm: mvebu: Initial iEi Puzzle-M801 supportLuka Kovacic
Add initial U-Boot support for the iEi Puzzle-M801 board based on the Marvell Armada 88F8040 SoC. Currently supported hardware: 1x USB 3.0 4x Gigabit Ethernet 2x SFP+ (with NXP PCA9555 and NXP PCA9544) 1x SATA 3.0 1x M.2 type B 1x RJ45 UART 1x SPI flash 1x EPSON RX8010 RTC Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Reviewed-by: Stefan Roese <sr@denx.de>
2020-10-12Merge branch 'for-next' of https://github.com/lftan/u-bootTom Rini
2020-10-12arm: dts: lx2160ardb: support eMMC HS400 modeYangbo Lu
Add properties related to eMMC HS400 mode. mmc-hs400-1_8v; bus-width = <8>; They had been already in kernel dts file since the first lx2160ardb dts patch. b068890 arm64: dts: add LX2160ARDB board support Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2020-10-09arm: dts: socfpga: arria10: Move to use generic handoff dtsiLey Foon Tan
Move to use generic handoff dtsi (socfpga_arria10-handoff.dtsi) and include the specify generated _handoff.h header file from qts-filter-a10.sh script. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09arm: socfpga: arria10: Add handoff header for A10 SoCDK SDMMCDalon Westergreen
Add the qts-filter-a10.sh generated handoff header file for the Arria10 SoCDK SDMMC u-boot device tree. Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09arm: socfpga: arria10: Add qts-filter for Arria10 socfpgaDalon Westergreen
Add a script to process HPS handoff data and generate a header for inclusion in u-boot specific devicetree addons. The header should be included in the top level of u-boot.dtsi. Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09arm: socfpga: mailbox: Add mailbox retry supportLey Foon Tan
Resend mailbox command for 3 times with 2ms interval in between if it receives MBOX_RESP_TIMEOUT and MBOX_RESP_DEVICE_BUSY response code. Add a wrapper function mbox_send_cmd_common_retry() for retry, change all the callers to use this wrapper function. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
2020-10-09arm: socfpga: mailbox: Update mailbox response codesLey Foon Tan
Sync latest mailbox response codes from SDM firmware. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
2020-10-09arm: socfpga: mailbox: Support sending large mailbox commandChee Hong Ang
Mailbox command which is too large to fit into the mailbox FIFO command buffer can be sent to SDM in multiple parts. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09arm: socfpga: mailbox: Always read mailbox responses before returning statusChee Hong Ang
Mailbox driver should always check for the length of the response and read the response data before returning the response status to caller. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09arm: socfpga: mailbox: Refactor mailbox timeout event handlingChee Hong Ang
Add miliseconds delay when waiting for mailbox event to happen before timeout. This will ensure the timeout duration is predictive. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09arm: socfpga: soc64: Document down boot_scratch_cold register usageChin Liang See
Document down the usage of boot_scratch_cold register to avoid overlapping of usage in the code for S10 & Agilex. The boot_scratch_cold register is generally used for passing critical system info between SPL, U-Boot and Linux. Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09arm: socfpga: soc64: Add timeout waiting for NOC idle ACKChee Hong Ang
Add timeout waiting for NOC idle ACK during FPGA bridge disable/enable. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
2020-10-09arm: socfpga: agilex: Enable FPGA Full Reconfiguration supportChee Hong Ang
Enable FPGA full reconfiguration support with Intel FPGA SDM Mailbox driver for Agilex. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09fpga: altera: Rename Stratix10 FPGA to Intel FPGA SDM MailboxChee Hong Ang
Rename Stratix10 FPGA driver to Intel FPGA SDM Mailbox driver because it is using generic SDM (Secure Device Manager) Mailbox interface shared by other platform (e.g. Agilex) as well. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09arm: socfpga: Use DM watchdog timerChee Hong Ang
All SoCFPGA platforms (except Cyclone V) are now switching to CONFIG_WDT (driver model for watchdog timer drivers) from CONFIG_HW_WATCHDOG. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09arm: socfpga: soc64: Show reset state in SPLChee Hong Ang
Print reset state (warm/cold) together with the source (watchdog/MPU) which has triggered the warm reset on S10 & Agilex. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09arm: socfpga: soc64: Add SDM triggered warm reset bit maskChee Hong Ang
Include SDM triggered warm reset bit (BIT1) in Reset Manager's stat register when checking for HPS warm reset status. Refactor the warm reset mask macro for clarity purpose. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09sysreset: socfpga: agilex: Enable sysreset supportChee Hong Ang
Enable sysreset support for Agilex platform. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09sysreset: socfpga: soc64: Rename SYSRESET SoCFPGA driver for S10 to SoC64Chee Hong Ang
Rename the driver from S10 to SoC64 because Intel Agilex platform also using the this SYSRESET SoCFPGA driver for S10. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09arm: socfpga: soc64: Initialize timer in SPL onlyChee Hong Ang
Timer only need to be initialized once in SPL. This patch remove the redundancy of initializing the timer again in U-Boot proper Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-09arm: socfpga: soc64: Remove PHY interface setup from misc arch initChee Hong Ang
'dwmac_socfpga' driver will setup the PHY interface during probe. PHY interface setup in arch_misc_init() is no longer needed. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-10-08qemu-arm64: Enable POSITION_INDEPENDENTAndre Przywara
Now that PIE works when U-Boot is started from ROM, let's enable CONFIG_POSITION_INDEPENDENT, which allows to load U-Boot also via ARM Trusted-Firmware's fip.bin to DRAM, without tweaking the configuration. To get a writable initial stack, we need to keep the fixed initial stack pointer, which points to DRAM in our case. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
2020-10-08qemu-arm: Drop ARCH_SUPPORT_TFABOOTAndre Przywara
CONFIG_ARCH_SUPPORT_TFABOOT was used on the qemu-arm64 platform to guard a tweak to the flash bank configuration. U-Boot now reads the current flash setup from the devicetree, so there is no need for this option anymore. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-10-08arm64: PIE: Allow fixed stack pointerAndre Przywara
Currently selecting CONFIG_POSITION_INDEPENDENT also forces us to use an initial stack pointer relative to the beginning of the BSS section. This makes some sense, because this should be writable memory anyway. However the BSS section is not cleared or used until later in the setup process (after relocation), so memory nearby might not be available early enough to host the initial stack. This is an issue if U-Boot is loaded from (Flash-)ROM, for instance. Allow CONFIG_INIT_SP_RELATIVE to be turned off by a board's config, to be able to select a fixed stack pointer, for instance in known good DRAM. This will help QEMU utilising PIE, when it's loaded to (Flash-)ROM. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
2020-10-08arm64: PIE: Skip fixups if distance is zeroAndre Przywara
When the actual offset between link and runtime address is zero, there is no need for patching up U-Boot early when running with CONFIG_POSITION_INDEPENDENT. Skip the whole routine when the distance is 0. This helps when U-Boot is loaded into ROM, or in otherwise sensitive memory locations. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
2020-10-08arm64: PIE: Do not skip static relocationAndre Przywara
When we build an arm64 target and enable POSITION_INDEPENDENT, we were skipping our build-time dynamic relocation fixup routine (STATIC_RELA). This was probably done because we didn't need it in this case, as the PIE fixup routine in start.S would take care of that at runtime. However when we now skip this routine (upon detecting that the fixup offset is 0), this might lead to uninitialised pointers. Remove the exception, so that we always do the build-time relocation. NOTE: GNU binutils starting with v2.27.1 do this build-time relocation automatically, to be in-line with other architecures. So on newer toolchains our manual fixup is actually not needed. It doesn't hurt to have it, though, so that we keep compatibility with the popular Linaro toolchains, which lack this feature. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
2020-10-08arm: Kconfig: Explain TFABOOTAndre Przywara
The CONFIG_TFABOOT option is more about what U-Boot DOES NOT need to do than to support some features. Explain a bit more in the Kconfig help text to avoid misunderstandings. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-10-08ram: move aspeed ram driver into drivers/ directoryDylan Hung
to improve the maintainability. It is more easier to modify and add configurations of the driver in the centralized ram driver directory. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2020-10-06Merge tag 'u-boot-amlogic-20201005' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - generate unique mac address from SoC serial on S400 board - Add USB support for GXL and AXG SoCs - Update Gadget code to use the new GXL and AXG USB glue driver - Add a VIM3 board support to add dynamic PCIe enable in OS DT - Fix AXG pinmux with requesting GPIOs - Add missing GPIOA_18 for AXG pinctrl - Add Amlogic PWM driver
2020-10-05Merge branch 'next'Tom Rini
Bring in the assorted changes that have been staged in the 'next' branch prior to release. Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-05ARM: dts: sync amlogic G12A/SM1 DT from Linux 5.9-rc1Neil Armstrong
This imports the G12A & SM1 SoC and boards DT changes from the Linux commit 9123e3a74ec7 ("Linux 5.9-rc1"). Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05ARM: dts: meson-axg: add USB nodes for S400Neil Armstrong
Add the correcly architectured USB Glue node for Meson AXG and the S400 board in -u-boot.dtsi until support in upstream Linux then backported. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05arm: meson-axg: add board_usb_init()/cleanup() for USB gadgetNeil Armstrong
Add the board_usb_init()/cleanup() for USB gadget for AXG based on the code for the G12A architecture. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05phy: meson-gxl: remove invalid USB3 PHY driverNeil Armstrong
The registers which are managed by the meson-gxl-usb3 PHY driver are actually "USB control" registers (which are "glue" registers which manage OTG detection and routing of the OTG capable port between the DWC2 peripheral-only controller and the DWC3 host-only controller). Drop the meson-gxl-usb3 PHY driver now that the dwc3-meson-gxl-usb driver supports the USB control registers on GXL and GXM SoCs (these were previously managed by the meson-gxl-usb3 PHY driver). Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05ARM: mach-meson: use new DWC3 glue for GXL & GXMNeil Armstrong
Use the new Amlogic GXL/GXM USB Glue instead of the set of USB3 PHY and Simple DWC3 wrapper. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05usb: dwc3: add Amlogic GXL & GXL DWC3 GlueNeil Armstrong
The USB support was initialy done with a set of PHYs and dwc3-of-simple because the architecture of the USB complex was not understood correctly at the time (and proper documentation was missing...). But with the G12A family, the USB complex was correctly understood and implemented correctly. This adds a proper driver for the glue, based on the G12A one, but with enough changes to require a different driver in U-Boot. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05ARM: dts: sync amlogic AXG/GXL/GXM DT from Linux 5.8-rc1Neil Armstrong
This imports the AXG, GXL & GXM SoC and boards DT changes from the Linux commit b3a9e3b9622a ("Linux 5.8-rc1"). This change also removes GXL & GXM u-boot.dtsi hacks for USB gadget. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-10-05Merge tag 'u-boot-atmel-2021.01-a' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-atmel into next First set of u-boot-atmel features for 2021.01 cycle: This feature set includes a new CPU driver for at91 family, new driver for PIT64B hardware timer, support for new at91 family SoC named sama7g5 which adds: clock support, including conversion of the clock tree to CCF; SoC support in mach-at91, pinctrl and mmc drivers update. The feature set also includes updates for mmc driver and some other minor fixes and features regarding building without the old Atmel PIT and the possibility to read a secondary MAC address from a second i2c EEPROM.
2020-10-02ARM: dts: stm32mp1: DT alignment with Linux kernel v5.9-rc4Patrick Delaunay
DT alignment with Linux kernel v5.9-rc4 for the STM32MP15x soc device tree files and the STMicroelectronics boards device tree files. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-10-02ARM: dts: stm32: Add missing dm-spl props for SPI NOR on AV96Marek Vasut
The u-boot,dm-spl DT props are missing on AV96, hence the pinmux and flash0 nodes are not included in the reduced SPL DT. This prevents SPI NOR boot from working at all. Fix this by filling them in. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-26arm: rmobile: Use imply for BOARD_EARLY_INIT_FBiju Das
Use "imply" instead of "select" for BOARD_EARLY_INIT_F config option, and then disable it on boards which don't need it. Updated grpeach_defconfig to disable CONFIG_BOARD_EARLY_INIT_F option for RZA1. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-09-26arm: mach-rmobile: Mark the default s_init function as weakBiju Das
Mark the default s_init function as weak, so that SoC's can override it if needed, and it will still be discarded if unused. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
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