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2024-12-02Revert "global_data: Drop spl_handoff"Simon Glass
This breaks chromebook_coral which says: Video: No video mode configured in FSP! This reverts commit 2e9313179a846b581c0fc3f6a49e19f3d343efa8. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-27Merge patch series "Implement ACPI on aarch64"Tom Rini
Patrick Rudolph <patrick.rudolph@9elements.com> says: Based on the existing work done by Simon Glass this series adds support for booting aarch64 devices using ACPI only. As first target QEMU SBSA support is added, which relies on ACPI only to boot an OS. As secondary target the Raspberry Pi4 was used, which is broadly available and allows easy testing of the proposed solution. The series is split into ACPI cleanups and code movements, adding Arm specific ACPI tables and finally SoC and mainboard related changes to boot a Linux on the QEMU SBSA and RPi4. Currently only the mandatory ACPI tables are supported, allowing to boot into Linux without errors. The QEMU SBSA support is feature complete and provides the same functionality as the EDK2 implementation. The changes were tested on real hardware as well on QEMU v9.0: qemu-system-aarch64 -machine sbsa-ref -nographic -cpu cortex-a57 \ -pflash secure-world.rom \ -pflash unsecure-world.rom qemu-system-aarch64 -machine raspi4b -kernel u-boot.bin -cpu cortex-a72 \ -smp 4 -m 2G -drive file=raspbian.img,format=raw,index=0 \ -dtb bcm2711-rpi-4-b.dtb -nographic Tested against FWTS V24.03.00. Known issues: - The QEMU rpi4 support is currently limited as it doesn't emulate PCI, USB or ethernet devices! - The SMP bringup doesn't work on RPi4, but works in QEMU (Possibly cache related). - PCI on RPI4 isn't working on real hardware since the pcie_brcmstb Linux kernel module doesn't support ACPI yet. Link: https://lore.kernel.org/r/20241023132116.970117-1-patrick.rudolph@9elements.com
2024-10-27acpi: acpi_table: Bump revisionsPatrick Rudolph
The FADT structure found in U-Boot represents FADT revision 6 and the GICC and GICD structures defined in U-Boot are based on ACPI revision 6.3. Bump the table revision to fix FWTS failures seen on aarch64. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2024-10-27acpi: x86: Move MADT to common codePatrick Rudolph
Write MADT in common code and let the SoC fill out the body by calling acpi_fill_madt() which must be implemented at SoC level. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2024-10-27acpi: x86: Write FADT in common codeMaximilian Brune
Write the FADT in common code since it's used on all architectures. Since the FADT is mandatory all SoCs or mainboards must implement the introduced function acpi_fill_fadt() and properly update the FADT. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2024-10-18x86: cpu: Add missing header inclusionAndy Shevchenko
Without asm/cpu_x86.h inclusion a compiler is not happy: arch/x86/cpu/cpu_x86.c:14:5: warning: no previous prototype for ‘cpu_x86_bind’ [-Wmissing-prototypes] arch/x86/cpu/cpu_x86.c:29:5: warning: no previous prototype for ‘cpu_x86_get_vendor’ [-Wmissing-prototypes] arch/x86/cpu/cpu_x86.c:41:5: warning: no previous prototype for ‘cpu_x86_get_desc’ [-Wmissing-prototypes] arch/x86/cpu/cpu_x86.c:55:5: warning: no previous prototype for ‘cpu_x86_get_count’ [-Wmissing-prototypes] Add missing header inclusion. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-10-18x86: cpu: Mark a few functions staticAndy Shevchenko
Some functions are not used anywhere except the same file where they are defined. Mark them static. This helps avoiding the compiler warnings: arch/x86/cpu/cpu.c:343:6: warning: no previous prototype for ‘detect_coreboot_table_at’ [-Wmissing-prototypes] arch/x86/cpu/mtrr.c:90:6: warning: no previous prototype for ‘mtrr_write_all’ [-Wmissing-prototypes] arch/x86/cpu/i386/interrupt.c:240:6: warning: no previous prototype for ‘__do_irq’ [-Wmissing-prototypes] Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-10-18x86: cpu: Use default print_cpuinfo() for allAndy Shevchenko
Most of the copies of the print_cpuinfo() call the default method. Remove all of those in order to have only the default one when no `cpu` command is compiled. This also helps avoiding compiler warning, e.g.: arch/x86/cpu/tangier/tangier.c:23:5: warning: no previous prototype for ‘print_cpuinfo’ [-Wmissing-prototypes] Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-10-18x86: coreboot: Add timestamps from coreboot to bootstageSimon Glass
Receiving timestamps from coreboot was unceremoniously dropped some time ago. Add it back. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: 8ad01ce36f7 ("x86: Remove x86 specific GD flags as they are...")
2024-10-18x86: coreboot: Update the timestamp code to use sysinfoSimon Glass
Rather than using a special variable, get the timestamp info from the coreboot sysinfo struct. Return a proper error as well. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-18x86: Ensure the CPU identity exists for timer initSimon Glass
When bootstage is used the timer can be inited before the CPU identity is set up, resulting in the checks for the vendor not working. Add a special call to work around this. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-18x86: Show the CPU vendor in bdinfoSimon Glass
Refactor the cpu code and use it to show the CPU vendor, e.g. AuthenticAMD or GenuineIntel Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-18x86: Make default_print_cpuinfo be a weak alias for print_cpuinfoTom Rini
While a few SoCs have a unique print_cpuinfo function, a number of them just use default_print_cpuinfo. Make default_print_cpuinfo have a weak alias to provie print_cpuinfo. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-10-11global: Rename SPL_TPL_ to PHASE_Simon Glass
Use PHASE_ as the symbol to select a particular XPL build. This means that SPL_TPL_ is no-longer set. Update the comment in bootstage to refer to this symbol, instead of SPL_ Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11global: Rename SPL_ to XPL_Simon Glass
Use XPL_ as the symbol to indicate an SPL build. This means that SPL_ is no-longer set. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILDSimon Glass
Use the new symbol to refer to any 'SPL' build, including TPL and VPL Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11xpl: Rename spl_phase() to xpl_phase()Simon Glass
Rename this function to indicate that it refers to any xPL phase. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-09-03Merge patch series "net: dwc_eth_qos: Add glue driver for Intel MAC"Tom Rini
Philip Oberfichtner <pro@denx.de> says: This patch series implements the dwc_eth_qos glue driver for Intel SOCs. Before doing that, a few general adaptions to the dwc_eth_qos.c main driver are required. Most notably, the preparation for PCI based driver instances, which do not necessarily use a device tree.
2024-09-03x86: provide mb() macroPhilip Oberfichtner
Implement a x86 memory barrier mb(). Furthermore, remove the previously used mfence() function, which does the same thing. The mb() macro is now equivalent to Linux (v6.9): linux/arch/x86/include/asm/barrier.h Signed-off-by: Philip Oberfichtner <pro@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-08-26global_data: Drop spl_handoffSimon Glass
Provide a function to locate this information, rather than doing it automatically on startup, to save space in global_data. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-26global_data: Drop global_data hoseSimon Glass
This is set on one x86 boards, but is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-26global_data: Remove pci_ram_topSimon Glass
This field is set but not used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-07-19bootstash: Do not provide a default address for allTom Rini
A valid memory location to stash bootstage information at will be architecture dependent. Move the existing defaults to the main Kconfig file for this option and set 0x0 as the default only for sandbox. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-07-15x86: Remove duplicate newlinesMarek Vasut
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-05-20Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"Tom Rini
As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-19Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""Tom Rini
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-06global: Make <asm/global_data.h> include <asm/u-boot.h>Tom Rini
This follows the example of RISC-V where <asm/global_data.h> includes <asm/u-boot.h> directly as "gd" includes a reference to bd_info already and so the first must include the second anyhow. We then remove <asm/u-boot.h> from all of the places which include references to "gd" an so have <asm/global_data.h> already. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-06x86: Remove <common.h> and add needed includesTom Rini
Remove <common.h> from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-04-10Merge patch series "Resolve issues with booting distros on x86"Tom Rini
Simon Glass <sjg@chromium.org> says: This little series reprises the EFI-video fix, fixes a USB problem and enables a boot script for coreboot. It also moves to truetype fonts for coreboot and qemu-x86, since the menus look much better and there are no strong size constraints. With these changes it is possible to boot a Linux distro automatically with U-Boot on x86, including when U-Boot is the second-stage bootloader.
2024-04-10x86: Enable SSE in 64-bit modeSimon Glass
This is needed to support Truetype fonts. In any case, the compiler expects SSE to be available in 64-bit mode. Provide an option to enable SSE so that hardware floating-point arithmetic works. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Suggested-by: Bin Meng <bmeng.cn@gmail.com>
2024-01-07acpi: use 64-bit addresses in FADT tableHeinrich Schuchardt
Fields X_FIRMWAE_CTRL and X_DSDT must be 64bit wide. Convert pointers to to uintptr_t to fill these. If field X_FIRMWARE_CTRL is filled, field FIRMWARE must be ignored. If field X_DSDT is filled, field DSDT must be ignored. We should not fill unused fields. See the field definitions in chapter "5.2.9 Fixed ACPI Description Table (FADT)" of the ACPI Specification 6.5. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-12-13Merge patch series "bootm: Refactoring to reduce reliance on CMDLINE (part A)"Tom Rini
To quote the author: It would be useful to be able to boot an OS when CONFIG_CMDLINE is disabled. This could allow reduced code size. Standard boot provides a way to handle programmatic boot, without scripts, so such a feature is possible. The main impediment is the inability to use the booting features of U-Boot without a command line. So the solution is to avoid passing command arguments and the like to code in boot/ A similar process has taken place with filesystems, for example, where we have (somewhat) separate Kconfig options for the filesystem commands and the filesystems themselves. This series starts the process of refactoring the bootm logic so that it can be called from standard boot without using the command line. Mostly it removes the use of argc, argv and cmdtbl from the internal logic. Some limited tidy-up is included, but this is kept to smaller patches, rather than trying to remove all #ifdefs etc. Some function comments are added, however. A simple programmatic boot is provided as a starting point. This work will likely take many series, so this is just the start. Size growth with this series for firefly-rk3288 (Thumb2) is: arm: (for 1/1 boards) all +23.0 rodata -49.0 text +72.0 This should be removed by: https://source.denx.de/u-boot/custodians/u-boot-dm/-/issues/11 but it is not included in this series as it is already large enough. No functional change is intended in this series. Changes in v3: - Add a panic if programmatic boot fails - Drop RFC tag Changes in v2: - Add new patch to adjust position of unmap_sysmem() in boot_get_kernel() - Add new patch to obtain command arguments - Fix 'boot_find_os' typo - Pass in the command name - Use the command table to provide the command name, instead of "bootm"
2023-12-13arm: x86: Drop discarding of command linker-listsSimon Glass
Since we can now cleanly disable CMDLINE when needed, drop the rules which discard the command code. It will not be built in the first place. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-11-28x86: coreboot: Add a sysinfo driverSimon Glass
Create a sysinfo driver to avoid needing a custom checkboard() function. With this the following information is printed when booting from coreboot under QEMU: Model: Standard PC (i440FX + PIIX, 1996) Manufacturer: QEMU Prior-stage version: 4.21-885-g2a87ef1eca56 Prior-stage date: 11/11/2023 Signed-off-by: Simon Glass <sjg@chromium.org>
2023-09-24common: Drop linux/printk.h from common headerSimon Glass
This old patch was marked as deferred. Bring it back to life, to continue towards the removal of common.h Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-09-22x86: coreboot: Drop USB init on startupSimon Glass
This is very annoying as it is quite slow on many machines. Also, U-Boot has an existing 'preboot' mechanism to enable this feature if desired. Drop this code so that it is possible to choose whether to init USB or not. Use the existing USE_PREBOOT mechanism instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: Set the CPU vendor in SPLSimon Glass
We don't read this information in 64-bit mode, since we don't have the macros for doing it. Set it to Intel by default. This allows the TSC timer to work correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: coreboot: Rearrange arch_cpu_init()Simon Glass
Init errors in SPL are currently ignored by this function. Change the code to init the CPU, reporting an error if something is wrong. After that, look for the coreboot table. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: broadwell: Avoid initing the CPU twiceSimon Glass
When TPL has already set up the CPU, don't do it again. This existing code actually has this backwards, so fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: Add some log categoriesSimon Glass
Add some missing log categories to a few files. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: broadwell: Show the memory delaySimon Glass
Samus only takes 7 seconds but it is long enough to think it has hung. Add a message about what it is doing, similar to the approach on coral. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22x86: Prevent from missing the FADT chainingAndy Shevchenko
Recent approach with FADT writer shows that there is a room for subtle errors. Prevent this from happening again by introducing acpi_add_fadt() helper. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22Reland "x86: Move FACP table into separate functions""Simon Glass
Each board has its own way of creating this table. Rather than calling the acpi_create_fadt() function for each one from a common acpi_write_fadt() function, just move the writer into the board-specific code. Co-developed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2023-09-22x86: cpu: i386: cpu: only set pci_ram_top if CONFIG_IS_ENABLED(PCI)Troy Kisky
This avoids an error when ifdef CONFIG_PCI is changed to if CONFIG_IS_ENABLED(PCI) Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com> [Rebased on top of u-boot/master] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-08-31event: Use an event to replace last_stage_init()Simon Glass
Add a new event which handles this function. Convert existing use of the function to use the new event instead. Make sure that EVENT is enabled by affected boards, by selecting it from the LAST_STAGE_INIT option. For x86, enable it by default since all boards need it. For controlcenterdc, inline the get_tpm() function and make sure the event is not built in SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-31event: Convert existing spy records to simpleSimon Glass
Very few of the existing event-spy records use the arguments they are passed. Update them to use a simple spy instead, to simplify the code. Where an adaptor function is currently used, remove it where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-15common: return type board_get_usable_ram_topHeinrich Schuchardt
board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-09x86: qemu: Add required linux/sizes.h includeSimon Glass
These files rely on the config.h file provided this include. Add it explictily so we can move to a text environment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-08-09Revert "x86: Switch QEMU over to use the bochs driver"Simon Glass
Unfortunately the bochs driver does not currently work with distros. It causes a hang between grub menu selection and the OS displaying something. Preliminary investigation shows that GRUB does not jump to the kernel at all. This reproduces reliably. This reverts commit b8956425d525c3c25fd218f252f89a5e44df6a9f. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> # qemu-x86_64 [Slightly modify the commit message about preliminary investigation] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-08-09x86: Run QEMU machine setup in SPLSimon Glass
Call the hardware-init function from QEMU from SPL. This allows the video BIOS to operate correctly. Create an x86-wide qemu.h header to avoid having to #ifdef the header in spl.c Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> # qemu-x86_64