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2016-09-06mx6: ddr: Allow changing REFSEL and REFR fieldsFabio Estevam
Currently MX6 SPL DDR initialization hardcodes the REF_SEL and REFR fields of the MDREF register as 1 and 7, respectively for DDR3 and 0 and 3 for LPDDR2. Looking at the MDREF initialization done via DCD we see that boards do need to initialize these fields differently: $ git grep 0x021b0020 board/ board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800 board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */ board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800 board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800 board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800 board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800 board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800 So introduce a mechanism for users to be able to configure REFSEL and REFR fields as needed. Keep all the mx6 SPL users in their current REF_SEL and REFR values, so no functional changes for the existing users. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Eric Nelson <eric@nelint.com>
2016-07-28cgtqmx6eval: Replace is_mx6q() for macroBreno Lima
It's not necessary to implement the is_mx6q function, there is a macro in sys_proto.h already implemented. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-01-03cgtqmx6eval: fix pad configuration for SPI busMichael Schanz
Use the macro SETUP_IOMUX_PAD(...) rather than imx_iomux_v3_setup_multiple_pads(...) in order to setup the pin configuration for ECSPI1. ARRAY_SIZE(pads) provides the wrong size for imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads)) in case of MX6QDL. In the particular case, the content of GPR12 is overwritten and the IPG/AHB/ATB/ATP clocks are deactivated. Therefore, the connection to the system via JTAG is not possible anymore. Furthermore, kernel version 3.0.35 hangs during bootprocess in the function etm_init(). Signed-off-by: Michael Schanz <michael.schanz@congatec.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2015-11-25cgtqmx6eval: Add SPL supportOtavio Salvador
Congatec has several MX6 boards based on quad, dual, dual-lite and solo. Add SPL support so that all the variants can be supported Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-11-25cgtqmx6eval: Add SPI NOR flash supportOtavio Salvador
Add SPI NOR support: => sf probe SF: Detected SST25VF032B with page size 256 Bytes, erase size 4 KiB, total 4 MiB Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-09-20cgtqmx6eval: Fit into a single lineOtavio Salvador
The printf can be put in a single line of code, so make it simpler Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2015-09-02cgtqmx6eval: Add Ethernet supportOtavio Salvador
cgtqmx6eval can be populated with a AR8035 or KSZ9031 depending on the board revision. Add Ethernet support. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2015-07-26cgtqmx6eval: Add SATA supportOtavio Salvador
Add SATA support. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2015-07-26cgtqmx6eval: Add splash screen supportOtavio Salvador
Add LVDS and HDMI support. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2015-07-26cgtqmx6eval: Add USB supportOtavio Salvador
Add USB support. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2015-07-26cgtqmx6eval: Add PMIC supportOtavio Salvador
cgtqmx6eval has a PFUZE100 FSL PMIC connected to I2C2. Add support for it. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2015-07-26cgtqmx6eval: Add ESDHC3 supportOtavio Salvador
cgtqmx6eval has an eMMC connected to ESDHC3. Add support for it. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2015-07-26cgtqmx6eval: Fit into single linesOtavio Salvador
There is no need to use multiple lines when they fit into a single line. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2015-07-26cgtqmx6eval: Improve the error handlingOtavio Salvador
Perfoming an OR operation on the error is not a good approach. Return the error immediately for each ESDHC instance instead. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2015-07-26cgtqmx6eval: Staticize when possibleOtavio Salvador
Declare 'static' when possible. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2013-11-13i.MX6DQ/DLS: replace pad names with their Linux kernel equivalentsEric Nelson
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2013-10-14Coding Style cleanup: remove trailing white spaceWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2013-07-24Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
2013-06-04Add support for Congatec Conga-QEVAl boardSARTRE Leo
Add minimal support (only boot from mmc device) for the Congatec Conga-QEVAl Evaluation Carrier Board with conga-Qmx6q (i.MX6 Quad processor) module. Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
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