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path: root/board/ti/am43xx/board.c
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2014-07-07am43xx: Update EMIF DDR3 Configuration for AM43x GPFranklin S. Cooper Jr
* Boot failures have been discovered due to a combination of routing issues and non optimal ddr3 timings in the EMIF * Since ddr3 timings are different after significant board layout changes different timings are required for alpha, beta and production boards. Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
2014-06-19board: ti: am43xx: add AM437x SK PHY AddressFelipe Balbi
pass correct PHY Address when running on SK so that we have working ethernet with this board too. Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-06-19board: ti: am43xx: add support for AM43xx Starter KitFelipe Balbi
AM43xx Starter Kit is a new board based on AM437x line of SoCs. Being a low-cost EVM and small size EVM are intended to provide an entry level development platform on a full fledged Hardware System. Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-06-19board: ti: am43xx: print unsupported board nameFelipe Balbi
when porting u-boot to a new am43xx board, it helps to know the name of the current unsupported board so we don't have to hunt for design documents to figure out what's written in the EEPROM. Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-06-06arm:am43xx: Add TPS65218 support to scale voltages upTom Rini
This family is supported by the TPS65218 PMIC. Implement a scale_vcores to set the MPU and CORE voltage correctly to the max frequency that is supported (and what we will be scaling them to in setup_dplls()). Signed-off-by: Tom Rini <trini@ti.com>
2014-06-06am43xx: Only read the MPU frequency bits of CTRL_DEV_ATTRTom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2014-06-06am43xx_evm: Add qspiboot targetSourav Poddar
The ePOS EVM and EVM SK have QSPI as an option to boot. Add a qspiboot target that utilizes QSPI for env and so forth as an example of best practices. As QSPI is booted from directly we need to chang CONFIG_SYS_TEXT_BASE. Note that on ePOS EVM the QSPI and NAND are mutually exclusive choices we need to handle that elsewhere, once NAND support is also added. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
2014-03-04ARM: AM43xx: Add Ethernet boot support to SPLMugunthan V N
Add Ethernet Boot support to SPL Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2014-03-04ARM: AM4372: Update EMIF registers for DDR3Lokesh Vutla
Updating EMIF_PHY_CTRL and adding EMIF_READ_WRITE_EXECUTION_THRESHOLD registers. In EMIF_PHY_CTRL: Updating [4:0]READ_LATENCY to 8, because at higher frequencies like 400MHz the read latency expected will be CL+3 as per tests from HW folks. Clearing [19]PHY_DIS_CALIB_RST bit as this is used onl for debug purpose. With out this resume is not working(Still waiting for PHY team to come back for better explanation). Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2014-03-04ARM: AM43xx: Add CPSW support to AM43xx EPOS and GP EVMMugunthan V N
Adding support for CPSW to AM43xx EPOS nad GP EVM which is connected to RMII and RGMII phy respectively and enable cpsw in config. Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2014-02-21ARM: AM43xx: GP-EVM: Correct GPIO used for VTT regulator controlDave Gerlach
Schematic indicates GPIO5_7 is to be used for VTT regulator control rather than GPIO0_21 so modify enable_vtt_regulator to reflect this. Without this some boards will experience DDR3 corruption and fail to boot. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> [trini: Rework patch against mainline] Signed-off-by: Tom Rini <trini@ti.com>
2014-01-24ARM: AM43xx: Enable DDR dynamic IO power down for DDR3Lokesh Vutla
This patch enables dynamically powering down the IO receiver when not performing a read on DDR3 board. This optimizes both active and standby power consumption. This is derived from a patch that is done on AM335x[1] [1] http://arago-project.org/git/projects/?p=u-boot-am33x.git;a=commit;h=6a9ee4bc72ece53fabf01825605fba3d71d5feb2 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-12-18ARM: AM43xx: GP_EVM: Add support for DDR3Lokesh Vutla
GP EVM has 1GB DDR3 attached(Part no: MT41K512M8RH). Adding details for the same. Below is the brief description of DDR3 init sequence(SW leveling): -> Enable VTT regulator -> Configure VTP -> Configure DDR IO settings -> Disable initialization and refreshes until EMIF registers are programmed. -> Program Timing registers -> Program leveling registers -> Program PHY control and Temp alert and ZQ config registers. -> Enable initialization and refreshes and configure SDRAM CONFIG register Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-12-18ARM: AM43xx: EPOS_EVM: Add support for LPDDR2Lokesh Vutla
AM4372 EPOS EVM has 1GB LPDDR2(Part no: MT42L256M32D2LG-25 WT:A) Adding LPDDR2 init sequence and register details for the same. Below is the brief description of LPDDR2 init sequence: -> Configure VTP -> Configure DDR IO settings -> Disable initialization and refreshes until EMIF registers are programmed. -> Program Timing registers -> Program PHY control and Temp alert and ZQ config registers. -> Enable initialization and refreshes and configure SDRAM CONFIG register -> Wait till initialization is complete and the configure MR registers. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-12-18ARM: AM43xx: clocks: Update DPLL detailsLokesh Vutla
Updating the Multiplier and Dividers value for all DPLLs. Safest OPP is read from DEV ATTRIBUTE register. Accoring to the value returned the MPU DPLL is locked. At different OPPs follwoing are the MPU locked frequencies. OPP50 300MHz OPP100 600MHz OPP120 720MHz OPPTB 800MHz OPPNT 1000MHz According to the latest DM following is the OPP table dependencies: VDD_CORE VDD_MPU OPP50 OPP50 OPP50 OPP100 OPP100 OPP50 OPP100 OPP100 OPP100 OPP120 So at different OPPs of MPU it is safest to lock CORE at OPP_NOM. Following are the DPLL locking frequencies at OPP NOM: Core locks at 1000MHz Per locks at 960MHz LPDDR2 locks at 266MHz DDR3 locks at 400MHz Touching AM33xx files also to get DPLL values specific to board but no functionality difference. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-12-18ARM: AM43XX: Add CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG supportSekhar Nori
CONFIG_ENV_VARS_UBOOT_CONFIG, CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG and CONFIG_BOARD_LATE_INIT is already set. Adding support to detect the board. These variables are used by findfdt. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-12-18ARM: AM43XX: board: add support for reading onboard EEPROMSekhar Nori
Add support for reading onboard EEPROM to enable board detection. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-12-18ARM: AM43xx: Adapt to ti_armv7_common.h config fileLokesh Vutla
Use ti_armv7_common.h config file to inclde the common configs. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-08-15ARM: AM43xx: clocks: Add dpll and clock dataLokesh Vutla
Add dpll and clock data for AM43xx Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-08-15ARM: AM43xx: Add Board filesLokesh Vutla
Add board specific information for AM43xx. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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