| Age | Commit message (Collapse) | Author |
|---|
|
Using linux,usable-memory the board code carves out 1MiB of memory
for the Cortex-M4 core at the end of the 256MiB block. However,
in case a board has 256MiB of memory (Colibri iMX7S), that is the
area where U-Boot gets relocated to... Use board_get_usable_ram_top
to avoid using that area as relocation target.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
i.MX 7's Cortex-M4 core can run from DDR and uses DDR memory for
the rpmsg communication. Both use cases need a fixed location of
memory reserved. For the rpmsg use case the reserved area needs
to be in sync with the kernel's hardcoded vring descriptor location.
Use the linux,usable-memory property to carve out 1MB of memory
in case the M4 core is running. Also make sure that the i.MX 7
specific rpmsg driver does not get loaded in case we do not carve
out memory.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
This reverts commit 34fcaeec51fa3f519a13eb8d127abea1853e77e5.
If you have this version of U-Boot running, the change we warned
about has already been applied. No need to warn anymore.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
Configure GPIO_PV2 as SD1_CD# according to latest V1.1 HW.
Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output driver enabled aka
not tristated and input driver enabled as well as it features some
magic properties even though the external loopback is disabled and the
internal loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 register's
SDMMC_SPARE1 bits being set to 0xfffd according to the TRM! This pin is
now a not-connect on V1.1 HW in order to avoid any interference.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Dominik Sliwa <dominik.sliwa@toradex.com>
|
|
Configure DP_HPD_PFF0 pin as optional DisplayPort hot-plug detect.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Dominik Sliwa <dominik.sliwa@toradex.com>
|
|
Pull-up GPIO_PI6 connected to TMP451's ALERT#/THERM2#.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Dominik Sliwa <dominik.sliwa@toradex.com>
|
|
Get rid of obsolete non-Jetson configuration options.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Dominik Sliwa <dominik.sliwa@toradex.com>
|
|
Few GPIOs are being used as special function pins
and should not be initialized as GPIOs.
Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
Add a note about the non-working apalis_tk1_gpio_inits table caused by
a reservation failure. If it wouldn't be run in SPL without anything
ever getting printed one would see the following:
A: dir_input: error: gpio A1 not reserved
Please note: The current workaround is to configure pull-up/downs in
the apalis_tk1_pingrps table further below.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
Implement optional PCIe EvalBoard initialisation which properly reset the PLX
(now Avago) PEX 8605 PCIe switch plus PCIe devices on the Apalis Evaluation
carrier board.
Please note that you will have to enable the second PCIe port in the dts as well
e.g.:
diff --git a/arch/arm/dts/tegra124-apalis.dts b/arch/arm/dts/tegra124-apalis.dts
index 595aae8..841c676 100644
--- a/arch/arm/dts/tegra124-apalis.dts
+++ b/arch/arm/dts/tegra124-apalis.dts
@@ -42,6 +42,10 @@
vddio-pex-ctl-supply = <®_3v3>;
avdd-pll-erefe-supply = <&avdd_1v05>;
+ pci@1,0 {
+ status = "okay";
+ };
+
/* I210 Gigabit Ethernet Controller (on-module) */
pci@2,0 {
status = "okay";
While at it also get rid of the DECLARE_GLOBAL_DATA_PTR which is probably a
remnant of the Apalis T30 board file where we use it to get the memory size.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
Floating pins towards the camera input level-shifter cause it to
consume at least 100mW of power even in idle. This patch fixes this by
configuring pull-downs on all multiplexed camera input pins.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
Add common code for i.MX SoC's which avoids loading the environment.
This reimplements the functionaltiy lost with ("common: autoboot:
do not reset environment") by not loading the environment from the
beginning. The main difference will be that dynamically set
environment variables such as "soc" in the i.MX 7 case will still
be set.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
We plan to no longer support the work-around for errata e9609 since
it does not allow to detect factory bad blocks. Print a warning to
prepare customers of the upcoming change.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
Skip over data which have the tag flag reporting invalid rather than
abort parsing.
Break parsing when the first tag id set to 0xffff is encountered or the
maximum size of the config block is reached.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
Cleanup whitespace found when preparing patches for mainline.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
Cleanup whitespace found when preparing patches for mainline.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
Cleanup whitespace found when preparing patches for mainline.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
Disable DCDC2 discharge as this leads to higher power consumption when
turning off DCDC2 on Colibri iMX7S. This is likely due to backfeeding
the DCDC2 through the VFB2 pin.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
Configure sleep slots for LDO1 (Ethernet) and ARM CPU rail. This
makes sure the rails get disabled when the SoC enters sleep mode.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
Add board_usb_phy_mode function for detecting whether a port is
being used as host or client using a GPIO. On Colibri Vybrid we
provide GPIO 102 for this very same purpose.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
|
|
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
|
|
Due to an undefined pin muxing function being used for CAM_MCLK_PCC0
that pin got locked and did no more allow for the Linux kernel and/or
our GPIOConfig tool to make any further modifications.
On Apalis T30 this pin is used as camera master clock CAM1_MCLK which
was impossible to do due to it being locked while on Colibri T30 this
pin is just multiplexed with the SD/MMC card clock MM_CLK which is
tri-stated by default anyway.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
Change file and other names resp. strings to apalis-tk1 rather than
apalis_tk1 due to upstream Linux kernel device tree maintainers no
longer allowing any underscores to be used in any such.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
Regular HDA mode requires the TK1 SoC being the master to drive the
DAP1_BIT_CLK and DAP1_SYNC pins therefore do not tristate their
outputs. Further more despite the level shifter direction of those pins
being called Shift_CTRL_Dir_In[2] those need to be configured as output
for regular HDA mode.
Note: If connecting to a I2S codec operating in master mode (e.g. as on
our i.MX 6 designs) the later would have to be changed to inputs again.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
To properly reset a Colibri iMX7 the PMIC reset capabilities need
to be used.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
The i.MX 7Solo only has one USB controller. Do not enable USB_PEN
but return a -ENODEV return code instead. This allows "usb start"
to work properly on Colibri iMX7S modules.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
i.MX7D TO1.1 changes DDR retension mode control to IOMUXC_GPR,
add support to this change for LPSR which needs to exit from
DDR retension mode.
Signed-off-by: Anson Huang <Anson.Huang@freescale.com>
|
|
U-Boot on Apalis iMX6 has a known problem:
Apparently Apalis iMX6 does not works with Gigabit switches...
Limiting speed to 10/100Mbps, and setting master mode, seems to
be the only way to have a successful PHY auto negotiation.
How to fix: Understand why Linux kernel do not have this issue.
However, the current work around did not take effect since the
generic phy config function (which gets called after the board
level work-around) reenabled gigabit advertisment again.
Use the newly introduced environment variable to disable gigabit
Ethernet advertisement.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
The four level shifter output enables Shift_CTRL_OE[0 to 2 and 4] were
wrongly pulled up therefore disabling the respective pin's input resp.
output capabilities.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
Implement optional PCIe EvalBoard initialisation which properly reset the PLX
(now Avago) PEX 8605 PCIe switch plus PCIe devices on the Apalis Evaluation
carrier board.
Please note that you will have to enable the second PCIe port in the dts as well
e.g.:
diff --git a/arch/arm/dts/tegra30-apalis.dts b/arch/arm/dts/tegra30-apalis.dts
index be4f4d6..321c7d6 100644
--- a/arch/arm/dts/tegra30-apalis.dts
+++ b/arch/arm/dts/tegra30-apalis.dts
@@ -59,6 +59,7 @@
};
pci@2,0 {
+ status = "okay";
nvidia,num-lanes = <1>;
};
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
Make sure the Intel i210 gigabit Ethernet controller gets properly enabled by
disabling DEV_OFF_N in the initialisation sequence.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
Fix PCIe gigabit Ethernet initialisation by explicitly
controlling +V3.3_ETH provided by LDO9 and LDO10.
Note: For this to work an assembly option needs to be
patched on the current prototypes.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
Newer U-Boot changed the DCD alignment with the effect that the
MMDCx_MDCTL reg/val pair moved 4 bytes.
Move away from a hardcoded offset and parse the IVT and DCD table
to find the correct location.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
Adding command availability check for update fusing command useful for
update scripts.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
Adding update fusing command to assist in updating modules to the fast
boot mode as per the following article on our developer website:
http://developer.toradex.com/knowledge-base/linux-booting#eMMC_Fast_Boot_Mode_ApalisColibri_iMX6
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
Currently a divider of 6 has been used, leading to following NAND
Flash Controller (NFC) clocks:
VF61: 27.7 MHz (166.7MHz bus clock)
VF50: 22 MHz (132MHz bus clock)
The NAND Flash Memory used on VF50 allows to use clock speed of
up to 33MHz, while the Flash Memory of VF61 allows 50MHz. We can
use the same divider of 4 on both modules to configure the maximal
possible clock speeds:
VF61: 41.7 MHz
VF50: 33 MHz
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
Configure the Ricoh PMIC RN5T567 at startup to reset the board
without delay.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
|
|
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
|
|
Cap product id to avoid issues with a yet unknown one.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
|
|
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
|
|
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
|
|
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
|
|
Used during manufacturing for setting the boot fuses.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
|
|
While at it fix whitespace issue.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
|
