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Most device headers contain SoC specific part and common Tegra post part.
Add a generic header which can be used by any Tegra device of one of the
supported SoC generations (T20, T30, T114, T124 or T210) without need in
device specific configuration.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
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Convert CFG_TEGRA_BOARD_STRING into Kconfig option and move it into device
board Kconfig.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
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The Motorola Atrix 4G (MB860) and Droid X2 (MB870) both featured a
dual-core NVIDIA Tegra 2 AP20H processor clocked at 1GHz, coupled with 1GB
of DDR2 RAM. Storage consisted of 16GB of internal flash memory, expandable
via microSD. The display was a 4.0-inch TFT LCD with a resolution of
960x540 pixels (qHD). The devices originally ran on Android up to 2.3
(Gingerbread).
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
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Fix DC and DSI config names to reflect more generic nature of existing
Tegra video drivers.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
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GPIO reset and power-off functionality depends on device tree data, which
is often absent in SPL or TPL. To address this, incorporate PHASE_ into the
config option and add Kconfig option or each phase.
Adjust SYSRESET_GPIO and POWEROFF_GPIO uses to address possible
regressions.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
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Tom Rini <trini@konsulko.com> says:
This series switches to always using $(PHASE_) in Makefiles when
building rather than $(PHASE_) or $(XPL_). It also starts on documenting
this part of the build, but as a follow-up we need to rename
doc/develop/spl.rst and expand on explaining things a bit.
Link: https://lore.kernel.org/r/20250401225851.1125678-1-trini@konsulko.com
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It is confusing to have both "$(PHASE_)" and "$(XPL_)" be used in our
Makefiles as part of the macros to determine when to do something in our
Makefiles based on what phase of the build we are in. For consistency,
bring this down to a single macro and use "$(PHASE_)" only.
Signed-off-by: Tom Rini <trini@konsulko.com>
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https://source.denx.de/u-boot/custodians/u-boot-snapdragon
Qualcomm changes for v2025.07:
CI: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/25653
There's been a surprising amount of activity lately on the Qualcomm
side with the two oldest boards getting some fresh attention and a lot
of cleanup and polish going on across the board.
* SDM660 gets USB phy fixes and a pinctrl driver
* The recently added SA8775P/QCS9100 SoC gets a pinctrl driver
* The Qualcomm pinctrl driver now handles reserved pins correctly,
fixing crashes on some boards when running "gpio status -a"
* OF_UPSTREAM_BUILD_VENDOR is enabled in qcom_defconfig
* SDM845 and SC7280 get missing clocks added (since we're now stricter
about those). This gets USB working more reliably in more cases.
* DM_USB_GADGET is enabled for all boards using DWC3 and fasbtoot is
enabled too
* A bug in the livetree fixup code is fixed (making USB work on a lot
more platforms)
* Button label lookup is made case insensitive* bootretry becomes more dynamic, allowing it to be hijacked to make a
"persistent" boot menu that allows dropping to U-Boot shell later on
* A new qcom-phone.config fragment is added along with a phone-specific
default environment and phone-specific debugging/bringup docs. These
make U-Boot more usable on devices without a serial port or keyboard.
* The db820c gets fixed up and updated documentation
* The db410c also gets some love and modernisation as well as a new
reviewer.
* A new driver is added for the USB VBUS regulator found on various
Qualcomm PMICs
* The Qualcomm SPMI driver gets some fixes and cleanup for SPMI v5 and
v7 support.
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/25652
- Add i.MX8MP LDB support.
- Various phycore-imx93 environment improvements.
- Add support for Toradex SMARC iMX8MP.
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Ramon has been inactive on the U-Boot mailing list for over a year now and
the DB410c port has not been updated much lately. I've been doing most of
the DB410c-specific fixes/rework lately and try to test it every now and
then, so add myself as new maintainer. Also add Sam as reviewer, since he's
been doing lots of testing and reviews for MSM8916 recently.
Cc: Sam Day <me@samcday.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-13-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Simplify the board code by using the new BUTTON_CMD functionality, instead
of implementing this separately using C code. This allows disabling or
customizing this functionality if wanted.
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-12-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Reduce the environment size by using standard boot instead of distro boot.
It uses faster bootdevs first by default (eMMC -> SD -> USB -> Network), so
set "boot_targets" to keep the current ordering (USB -> SD -> eMMC ->
Network). Perhaps this should be changed for consistency, but for now this
keeps the behavior similar to before.
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-10-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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The generic Qualcomm board code allocates addresses for loading the kernel,
ramdisk, DT, fastboot etc. This also happens on the DB410c and already
overrides these definitions defined in the default env. So let's just drop
the static ones, since the dynamic ones work just fine.
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-7-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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This does not seem to be used anywhere.
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-6-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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This is broken ever since we switched to using U-Boot as first stage
bootloader. Since no one seems to test this actively, let's just drop this
entirely. There are other tools available for re-flashing the DB410c.
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-5-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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This was originally taken from Linux, but at this point it's an inline
function upstream and no longer a macro. Given that we just want to extract
the serial number from the MMC CID, let's just inline that specifically.
This is also the style used in the MMC core code within U-Boot.
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-4-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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local-bd-address in the device tree needs to be formatted with the least
significant byte first (i.e. little endian). We're not doing this when
adding it to the DT, which means the MAC address ends up being reversed in
Linux. Fix this by reversing the array before setting it in the DT.
We're also flipping the wrong bit when generating the BD address. Before
reversing the array, the least significant bit is in the last byte.
Fixes: ff06dc240325 ("db410: alter WLAN/BT MAC address fixup")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-3-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Boards using gpio-keys for volume buttons label them "Volume Down",
let's match that here, and make the power button nicer too.
This simplifies configuring button_cmds in a board-agnostic way.
Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish
Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-5-f52e57d3b8c6@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Phones don't have keyboards! Introduce a phone-specific config fragment
and associated environment file to make U-Boot more useful on these
devices. This allows for navigating via the buttons and enabling
various USB gadget modes or displaying info about U-Boot.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish
Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci
Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-1-f52e57d3b8c6@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Add a common RAUC boot logic environment and make use of it in the
i.MX93 environment. The RAUC boot logic is deactivated by default and
can be activated by setting "doraucboot" to "1".
Signed-off-by: Martin Schwan <m.schwan@phytec.de>
Reviewed-by: Leonard Anderweit <l.anderweit@phytec.de>
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
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Move the default bootcmd from the defconfig to the board environment in
preparation for RAUC support. No change in functionality.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
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Add support for disabling external environment import (bootenv.txt) by
setting the ${no_bootenv} environment variable.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
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Add prepare_mcore script to environment to be able to notify Linux about
the state of M33 core via the kernel cmdline by appending to ${optargs}.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
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Add the optargs variable so we can set optional arguments while booting.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
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Move the load addresses for FDTs and bootenv.txt to create space for
loading OS image. Otherwise, parts of the image might get corrupted.
and the following boot error will be present:
ERROR: FDT image overlaps OS image (OS=80400000..832a0000)
Moreover, this commit also syncs addresses with downstream PHYTEC
u-boot for i.MX93 in preparation for FIT image support in the future.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
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Add support for the Toradex SMARC iMX8MP.
Link: https://www.toradex.com/computer-on-modules/smarc-arm-family/nxp-imx-8m-plus
Link: https://www.toradex.com/products/carrier-board/smarc-development-board-kit
Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
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Add PID4 0096 Toradex SMARC iMX95 Hexa 8GB WB IT to config block handling.
Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
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If CONFIG_VIDEO_IPUV3 is enabled without also having CONFIG_IMX_HDMI
enabled, the build fails for the Apalis iMX6 board.
Fixes: 592f4aed6db7 ("arm: imx: initial support for apalis imx6")
Signed-off-by: Rafael Beims <rafael.beims@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Now that capsule update sets the dfu_alt_info environment variable
explicitly, there is no need to support it in the set_dfu_alt_info()
function. Decouple SET_DFU_ALT_INFO from EFI_CAPSULE_FIRMWARE_FIT and
EFI_CAPSULE_FIRMWARE_RAW. For many boards, this was the only use of
set_dfu_alt_info() so remove the function entirely.
Fixes: a9e6f01a941f ("efi: Define set_dfu_alt_info() for boards with UEFI capsule update enabled")
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> # for board/libre-computer/*
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de> # for
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Directly fill update_info.dfu_string to prepare platforms to switch
from using dfu_alt_info variable to dfu_string which contains description
for capsule update when switch is done.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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SoMs ***"
Wadim Egorov <w.egorov@phytec.de> says:
Add general ethernet boot support for AM62Ax SoC.
Some of the work is based on TI's downstream u-boot patches found in
[1], patches touching code in mach-k3 and *.yaml board config files.
Also, provide defconfigs and device tree changes for phyCORE-AM62x and
phyCORE-AM62Ax to support booting via ethernet.
[1] https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1307981/sk-am62a-lp-rgmii-boot-mode-problem
Link: https://lore.kernel.org/r/20250325035824.2304200-1-w.egorov@phytec.de
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Provide a defconfig for booting the phycore-am62ax via Ethernet.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
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During the U-Boot SPL R5 boot stage the code is running on the MAIN R5
core, which means a host ID of 36 is used for DM/TIFS communication,
see [1]. In order to enable Ethernet boot update the DMA resources used
to be shared with the MAIN R5 core instead of the MCU R5 core.
[1] https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/am62ax/hosts.html
Based on patch 19 from https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1307981/sk-am62a-lp-rgmii-boot-mode-problem
Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
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Provide a defconfig for booting the phycore-am62x via Ethernet.
We need a separate defconfig because the AM62x has not enough internal
SRAM to support all boot sources.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
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Update build instructions.
Be sure to use the u-boot-nodtb.bin image, as the Snapdragon platform
prioritizes the embedded Device Tree Blob (DTB) when present, rather
than the external one. The external DTB—modified by LK—is the version
required by the DB820c.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407175617.3494506-1-jorge.ramirez@oss.qualcomm.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Heinrich Schuchardt <heinrich.schuchardt@canonical.com> says:
Introduce a new function to update ACPI table headers.
This allows to simplify the existing code.
Link: https://lore.kernel.org/r/20250321232121.251800-1-heinrich.schuchardt@canonical.com
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The ACPI IORT and ACPI MADT needs to use the same IDs when referencing
GIC ITS. The GIC-v3 ITS driver uses dev_seq(dev) to generate a unique ID
for the MADT, but qemu sbsa-ref hardcodes it.
Currently it's not the same ID, breaking interrupt routing on the OS.
Don't assume it's 0 and fetch it from the device instead.
TEST: Fixes non working IRQs in QEMU sbsa-ref.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
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According to the binding [1] the ITS node should be a subnode of the
GICv3 node. Thus move it now that the driver binds subnodes as well.
1: https://www.kernel.org/doc/Documentation/devicetree/bindings/interrupt-controller/arm%2Cgic-v3.txt
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
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Use acpi_update_checksum() to update table header.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
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Use acpi_update_checksum() to update table header.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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Note that this undoes the changes of commit cf6d4535cc4c ("x86:
emulation: Disable bloblist for now") as that was intended only for the
release due to time.
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Currently in j721e_init.c we check which firewalls to remove using
the board configuration (e.g CONFIG_TARGET_J721E_R5_EVM). We do this
as J721e and J7200 have different IP and firewalls but use the same
SoC definition (SOC_K3_J721E) even though they are different SoCs.
The idea was they would be similar enough that they both could use
the same SoC config to help with common code sharing. Board checks
would then be used differentiate.
This has grown far too messy to maintain any more, especially now
that there is more than one board using J721e (EVM, SK, Beagle AI64).
As differentiation is done based on board, every one of these boards
would have to have checks added for them. Instead let's split J7200
support out from J721e like how normal new SoC support is done.
This patch touches several subsystems and could not be split much better
as when we add SOC_K3_J7200 we want to make use of it in all spots that
once used the combined SOC_K3_J721E so we can turn off SOC_K3_J721E when
building for J7200 boards.
Signed-off-by: Andrew Davis <afd@ti.com>
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Jeremy Compostella <jeremy.compostella@intel.com> says:
Introduces a new configuration option X86_RUN_64BIT_NO_SPL to allow
building U-Boot as a 64-bit binary without using the SPL (Secondary
Program Loader). The motivation is to simplify the boot process for
specific x86-based platforms that do not require SPL, such as those
booting directly from a 64-bit coreboot firmware.
Link: https://lore.kernel.org/r/87bjtyutkp.fsf@jcompost-mobl.amr.corp.intel.com
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When set_dfu_alt_info() is called, interface can be NULL when called for
the EFI capsule, so check it before calling it with strcmp().
Fixes: 12ea40d29dc ("ARM: meson: add support for Libre Computer aml-s905d3-cc")
Fixes: 9e6e6b034b1 ("ARM: meson: add support for Libre Computer aml-a311d-cc")
Fixes: 75c87c6cbc0 ("board: libre-computer: aml-s805x-cc: Enable capsule updates")
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Link: https://lore.kernel.org/r/20250403-u-boot-fix-set-dfu-alt-info-interface-v1-1-1fdd12463186@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Manorit Chawdhry <m-chawdhry@ti.com> says:
The series adds support for J742S2 family of SoCs. Also adds J742S2 EVM
Support and re-uses most of the stuff from the superset device J784s4.
This device is a subset of J784S4 and shares the same memory map and
thus the code is being reused from J784S4 to avoid duplication.
It initially cleans up the J784s4 and AM69 files so that they can be
re-usable for j742s2 and then it introduces J742S2.
The DT for the following SoC will be coming to U-boot during 6.13 Sync
so the series is kept as RFC till then.
Here are some of the salient features of the J742S2 automotive grade
application processor:
The J742S2 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration in automotive, ADAS and industrial
applications requiring AI at the network edge. This SoC extends the K3
Jacinto 7 family of SoCs with focus on raising performance and
integration while providing interfaces, memory architecture and compute
performance for multi-sensor, high concurrency applications.
Some changes that this devices has from J784S4 are:
* 4x Cortex-A72 vs 8x Cortex-A72
* 3x C7x DSP vs 4x C7x DSP
* 4 port ethernet switch vs 8 port ethernet switch
* 2 DDR controller vs 4 DDR controller
Test logs:
https://gist.github.com/manorit2001/f7df0e8cca1e9973b4361f0559c6f53d
Link: https://lore.kernel.org/r/20250317-b4-upstream-j742s2-v4-0-4ba88bfd357a@ti.com
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Based off j784s4 configs with delta changes for J742S2
[ Add AVS support for J742S2 ]
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
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Include the U-boot device tree files needed to boot the board.
[ DDR config ]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
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Introduce the basic files needed to support the TI J742S2 family of SoCs.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
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Refactor J784s4 ddr file to a common file which uses the
superset device to allow reuse in j742s2-evm which uses the subset part.
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
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As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. In the case of OF_SEPARATE this is
the default so we do not need to do anything here normally to enforce
this.
Signed-off-by: Tom Rini <trini@konsulko.com>
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