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path: root/drivers/clk/exynos/clk-exynos850.c
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2024-07-24clk: exynos: Add SSS clocks for Exynos850Sam Protsenko
Add ACLK (operating clock) and PCLK (bus clock) for Security Sub System (SSS) in Exynos850. Those clocks are needed for RNG enablement. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2024-03-26clk: exynos: Add CMU_CORE and CMU_HSI for Exynos850Sam Protsenko
CMU_CORE generates clocks needed for eMMC enablement, and CMU_HSI provides clocks for SD card and USB. Most of the code is copied from the Linux kernel counterpart driver. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2024-03-26clk: exynos: Fix incorrect clock lookup for non-top CMUsSam Protsenko
Samsung clock drivers usually define the clock indices that are unique per one CMU, but are not unique across all CMUs. That is, clock indices start from 1 for each CMU, as provided in CMU bindings header. The way the clock lookup via clk_get_by_index() works at the moment is by using clk_of_xlate_default(), which returns globally non-unique clock ids for for clocks registered with Samsung CCF API, which leads to incorrect clocks being obtained. One way to fix that would be to make all clock ids defined in the bindings header unique, but it'd make it incompatible with Linux kernel bindings header. A better way to solve this issue is to calculate the global clock id and use it when registering a clock with clk_dm() and when obtaining it, in a custom .of_xlate function. This patch adds an API for such mapping calculation, introducing the necessary modifications to CMU registering functions in Samsung CCF. Exynos850 clock driver (the only driver that uses Samsung CCF at the moment) is modified accordingly, as it uses the changed API. So the clock lookup with clk-exynos850.c driver is also fixed here. The global clock id is calculated from CMU id and local clock id in SAMSUNG_TO_CLK_ID() macro like this: clk_id_global = cmu_id * 256 + clk_id_local leaving a range of up to 256 clocks for each CMU. Then this mapping macro is used in clk_dm() to register clocks using their global ids, and in .of_xlate() to lookup the clock by its local id correctly. Because .of_xlate() operation has a separate function for each CMU, it "knows" the correct way of finding the correct clk_id_global by provided clk_id_local. Fixes: ff3e8b8c6c22 ("clk: exynos: Add Samsung clock framework") Fixes: a36cc5e3ef4d ("clk: exynos: Add Exynos850 clock driver") Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2024-03-26clk: exynos: Re-arrange clocks in Exynos850 CMU_TOPSam Protsenko
Group CMU_TOP clocks to make it easier to add the support for more CMUs. No functional change. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2024-01-24clk: exynos: Add Exynos850 clock driverSam Protsenko
Heavily influenced by its Linux kernel counterpart. It's implemented on top of recently added Samsung CCF clock framework API. For now only UART leaf clocks are implemented, along with all preceding clocks in CMU_TOP and CMU_PERI. The UART baud clock is required in the serial driver, to get its rate for the consequent baud rate calculation. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>