Age | Commit message (Collapse) | Author | |
---|---|---|---|
2022-02-05 | imx8ulp:ddr: saving the dram config timing data into sram | Jacky Bai | |
On i.MX8ULP, The dram config timing need to be saved into sram for ddr retention when APD enter PD mode, so add this support on i.MX8ULP. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> | |||
2021-08-09 | ddr: Add DDR driver for iMX8ULP | Ye Li | |
Add iMX8ULP DDR initialization driver which loads the DDR timing parameters and executes the training procedure. When enabling IMX8ULP_DRAM_PHY_PLL_BYPASS, using PHY PLL bypass mode to do DDR init Signed-off-by: Ye Li <ye.li@nxp.com> |