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path: root/drivers/mtd/nand/raw
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2021-04-12mtd: Update fail_addr when erase fails due to bad blocksFarhan Ali
For all other erase failures, the fail_addr is updated with the failing address. Only in the case of erase failure due to bad block detection, the fail_addr is not updated. This change simply updates the fail_addr for this specific scenario so that it is consistent with the rest of the code. Signed-off-by: Farhan Ali <farhan.ali@broadcom.com>
2021-04-08spl: fit: nand: allow for non-page-aligned elementsTim Harvey
Add a weak nand_get_mtd function for nand drivers to provide mtd info and use this to set pagesize such that reading of non page-aligned elements can succeed. The spl_load_simple_fit already handles block block access so all we need to do is provide the nand writesize as the block length. Further cleanup of the drivers which use nand_spl_loaders.c such as am335x_spl_bch.c, atmel_nand.c, and nand_spl_simple.c could be done using info from mtd_info instead of statically defined details. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-03-23mtd: rawnand: fsl_ifc: fix FSL NAND driver to read all ONFI parameter pagesMaxim Kochetkov
Linux commit a75bbe71a27 ("mtd: rawnand: fsl_ifc: fix FSL NAND driver to read all ONFI parameter pages") Per ONFI specification (Rev. 4.0), if the CRC of the first parameter page read is not valid, the host should read redundant parameter page copies. Fix FSL NAND driver to read the two redundant copies which are mandatory in the specification. Signed-off-by: Jane Wan <Jane.Wan@nokia.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-24mtd: rawnand: cortina_nand: missing initializationHeinrich Schuchardt
ca_do_bch_correction() takes a random value from the stack and starts counting bitflips from this value. Initialize the counter. This passed unnoticed as the value is finally ignored in the call hierarchy. Fixes: 161df94b3c43 ("mtd: rawnand: cortina_nand: Add Cortina CAxxxx SoC support") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-02-15Merge branch '2021-02-02-drop-asm_global_data-when-unused'Tom Rini
- Merge the patch to take <asm/global_data.h> out of <common.h>
2021-02-03nand: brcmnand: Don't use -EPROBE_DEFERSimon Glass
This has no useful meaning in U-Boot and will never be returned. We want to reserve this flag for internal driver model use. Drop the code. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-18mtd: rawnand: cortina_nand: Add Cortina CAxxxx SoC supportKate Liu
Add Cortina Access parallel Nand support for CAxxxx SOCs Signed-off-by: Kate Liu <kate.liu@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Tom Rini <trini@konsulko.com> CC: Scott Wood <oss@buserror.net> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-01-13mtd: stm32_fmc2: migrate trace to dev and log macroPatrick Delaunay
Change pr_* to dev_ or log_ macro and define LOG_CATEGORY. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-06Merge tag 'xilinx-for-v2021.04' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.04 arm64: - DT updates microblaze: - Add support for NOR device support spi: - Fix unaligned data write issue nand: - Minor code change xilinx: - Fru fix in limit calculation - Fill git repo link for all Xilinx boards video: - Add support for seps525 spi display tools: - Minor Vitis file support cmd/common - Minor code indentation fixes serial: - Uartlite debug uart initialization fix
2021-01-05dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()Simon Glass
In the spirit of using the same base name for all of these related macros, rename this to have the operation at the end. This is not widely used so the impact is fairly small. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05dm: core: Access device ofnode through functionsSimon Glass
At present ofnode is present in the device even if it is never used. With of-platdata this field is not used, so can be removed. In preparation for this, change the access to go through inline functions. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05dm: core: Access device flags through functionsSimon Glass
At present flags are stored as part of the device. In preparation for storing them separately, change the access to go through inline functions. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05zynq: mtd: nand: remove superfluous ifHeinrich Schuchardt
This sort of code does not make much sense: if (ondie_ecc_enabled) { if (ondie_ecc_enabled) { Remove the inner if. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-12-13dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass
This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29mtd: nand: pxa3xx: enable NAND controller if the SoC needs itShmuel Hazan
Based on Linux kernel commit fc256f5789cb ("mtd: nand: pxa3xx: enable NAND controller if the SoC needs it"). This commit adds support for the Armada 8040 nand controller. The kernel commit says this: Marvell recent SoCs like A7k/A8k do not boot with NAND flash controller activated by default. Enabling the controller is a matter of writing in a system controller register that may also be used for other NAND related choices. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Shmuel Hazan <shmuel.h@siklu.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29mtd: pxa3xx_nand: remove dead codeBaruch Siach
The kfree() call is unreachable, and is not needed. Remove this call and the fail_disable_clk label. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29mtd: pxa3xx_nand: port to use driver modelShmuel Hazan
Use the generic DT code to find the device compatible property for us. This makes the driver look more like other current drivers. It also make it easier to add support for other variants like Armada 8K in a future commit. Signed-off-by: Shmuel Hazan <shmuel.h@siklu.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-15mtd: mxs_nand: Fix not calling dev_xxx with a deviceSean Anderson
This includes device_compat.h, and fixes several calls to dev_xxx. Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-10-14mtd: nand: Add NAND controller driver for OcteonTXSuneel Garapati
Adds support for NAND controllers found on OcteonTX or OcteonTX2 SoC platforms. Also includes driver to support Hardware ECC using BCH HW engine found on these platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2020-09-30nand: vybrid: Re-introduce vf610_nfc.devSean Anderson
This member was presumably dropped when this driver was converted from Linux. However, it is still used in log statements during initialization. This patch adds the member back. In addition, allocation of struct vf610_nfc has been moved to the callers of vf610_nfc_nand_init. This allows it to be allocated by DM (if it is being used) and for dev to be initialized. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30nand: brcmnand: Fix not calling dev_err() with a deviceSean Anderson
There are too many levels of indirection when calling dev_err. This is an artifact of the conversion of brcmnand_host.pdev from a struct platform_device (which has a member `dev` pointing to a struct device) to struct udevice. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30nand: atmel: Fix not calling dev_xxx with a deviceSean Anderson
Use mtd_info to get a device to log with. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30mtd: nand: sunxi: Fix not calling dev_err with a deviceSean Anderson
Usually the device is gotten from sunxi_nfc. This is a struct device and not a struct udevice, but the whole driver seems to be written wihout DM anyway... In a few instances, this patch modifies functions to take an nfc to log with. In once instance we use mtd_info's device since there is no nfc. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30mtd: nand: pxa3xx: Fix not calling dev_xxx with a deviceSean Anderson
Use the device from any mtd already available, or from the active mtd via pxa3xx_nand_info if one is not. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-23nand: Kconfig: Change dependency for NAND_ARASANMichal Simek
NAND_ARASAN selecting DM_MTD uunconditionally. Driver can be enabled with !DM that's why Kconfig it showing it as error: WARNING: unmet direct dependencies detected for DM_MTD Depends on [n]: DM [=n] Selected by [y]: - NAND_ARASAN [=y] && MTD_RAW_NAND [=y] Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-09-23xilinx: drivers: Use '_' instead of '-' in driver nameMichal Simek
The most of drivers are using '_' instead of '-' in driver name. That's why sync up these names to be aligned. It looks quite bad to see both in use. It is visible via dm tree command. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-11mtd: nand: Fix nand write error with bad block addresses above 32-bitT Karthik Reddy
Nand writes should skip the bad blocks with "nand write" command. In case of bad blocks with above 32-bit address, nand_block_isbad() returns false due to truncated bad block address. In below code segment, if (nand_block_isbad(mtd, offset & ~(mtd->erasesize - 1))) offset is 64-bit and mtd->erasesize is 32-bit, hence the truncation is happening. Cast 'mtd->erasesize' with loff_t to fix this issue. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-13mtd: rawnand: stm32_fmc2: get resources from parent nodeChristophe Kerello
FMC2 EBI support has been added. Common resources (registers base address and clock) can now be shared between the 2 drivers using "st,stm32mp1-fmc2-nfc" compatible string. It means that the common resources should now be found in the parent device when EBI node is available. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13mtd: rawnand: stm32_fmc2: use clrsetbits_le32Christophe Kerello
This patch uses clrsetbits_le32 function instead of multiple instructions. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13mtd: rawnand: stm32_fmc2: use FIELD_PREP/FIELD_GET macrosChristophe Kerello
This patch removes custom macros and uses FIELD_PREP and FIELD_GET macros. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13mtd: rawnand: stm32_fmc2: cosmetic change to use nfc instead of fmc2 where ↵Christophe Kerello
relevant This patch renames functions and local variables. This cleanup is done to get all functions starting by stm32_fmc2_nfc in the FMC2 raw NAND driver when all functions will start by stm32_fmc2_ebi in the FMC2 EBI driver. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13mtd: rawnand: stm32_fmc2: use FMC2_TIMEOUT_5S for timeoutsChristophe Kerello
FMC2_TIMEOUT_5S will be used each time that we need to wait. It was seen, during stress tests in an overloaded system, that we could be close to 1 second, even if we never met this value. To be safe, FMC2_TIMEOUT_MS is set to 5 seconds. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13mtd: rawnand: stm32_fmc2: remove useless inline commentsChristophe Kerello
Remove inline comments that are useless since function label are self explanatory. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-13mtd: rawnand: stm32_fmc2: fix a buffer overflowChristophe Kerello
The chip select defined in the device tree could only be 0 or 1. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-08-03nand: Drop dm.h header fileSimon Glass
This header file should not be included in other header files. Remove it and use a forward declaration instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-11mtd: nand: raw: denali: Wait for reset completion statusLey Foon Tan
Fixed delay 200us is not working in certain platforms. Change to poll for reset completion status to have more reliable reset process. Controller will set the rst_comp bit in intr_status register after controller has completed its reset and initialization process. Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Radu Bacrau <radu.bacrau@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11mtd: nand: raw: denali: Assert reset before deassertLey Foon Tan
Always put the controller in reset, then take it out of reset. This is to make sure controller always in reset state in both SPL and proper Uboot. This is preparation for the next patch to poll for reset completion (rst_comp) bit after reset. Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Radu Bacrau <radu.bacrau@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-08spl: fit: nand: fix fit loading in case of bad blocksDario Binacchi
The offset at which the image to be loaded from NAND is located is retrieved from the itb header. The presence of bad blocks in the area of the NAND where the itb image is located could invalidate the offset which must therefore be adjusted taking into account the state of the sectors concerned. cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2020-05-22mtd: rawnand: denali: deassert write protect pinMasahiro Yamada
[ Linux commit 9afbe7c0140f663586edb6e823b616bd7076c00a ] If the write protect signal from this IP is connected to the NAND device, this IP can handle the WP# pin via the WRITE_PROTECT register. The Denali NAND Flash Memory Controller User's Guide describes this register like follows: When the controller is in reset, the WP# pin is always asserted to the device. Once the reset is removed, the WP# is de-asserted. The software will then have to come and program this bit to assert/de-assert the same. 1 - Write protect de-assert 0 - Write protect assert The default value is 1, so the write protect is de-asserted after the reset is removed. The driver can write to the device unless someone has explicitly cleared register before booting the kernel. The boot ROM of some UniPhier SoCs (LD4, Pro4, sLD8, Pro5) is the case; the boot ROM clears the WRITE_PROTECT register when the system is booting from the NAND device, so the NAND device becomes read-only. Set it to 1 in the driver in order to allow the write access to the device. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-05-22mtd: rawnand: denali: configure SPARE_AREA_SKIP_BYTES only for denali_splMasahiro Yamada
This CONFIG option is only used in denali_spl.c Move it close to SPL_NAND_DENALI, and make it depend on SPL_NAND_DENALI. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-05-18common: Drop linux/bitops.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop linux/delay.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop linux/bug.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop log.h from common headerSimon Glass
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop part.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop net.h from common headerSimon Glass
Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18arm: Don't include common.h in header filesSimon Glass
It is bad practice to include common.h in other header files since it can bring in any number of superfluous definitions. It implies that some C files don't include it and thus may be missing CONFIG options that are set up by that file. The C files should include these themselves. Update some header files in arch/arm to drop this. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-10mtd: nand: raw: mxs_nand changes for nandbcbHan Xu
Add more BCH setting mode and remove the unnecessary platform constrain Signed-off-by: Han Xu <han.xu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
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