summaryrefslogtreecommitdiff
path: root/drivers/mtd/nand
AgeCommit message (Collapse)Author
2022-07-29arm: mvebu: Fix compatible string for nand controllerPali Rohár
Linux kernel uses compatible string "marvell,armada370-nand-controller" for nand controllers on Armada 370/XP/38x. U-Boot currently uses mix of "marvell,armada370-nand" and "marvell,mvebu-pxa3xx-nand". So unify it and use just Linux kernel compatible string. Signed-off-by: Pali Rohár <pali@kernel.org> Acked-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-22mtd: decommission the NAND museumMichael Trimarchi
Upstream linux commit f7025a43a9da26. The MTD subsystem has its own small museum of ancient NANDs in a form of the CONFIG_MTD_NAND_MUSEUM_IDS configuration option. The museum contains stone age NANDs with 256 bytes pages, as well as iron age NANDs with 512 bytes per page and up to 8MiB page size. It is with great sorrow that I inform you that the museum is being decommissioned. The MTD subsystem is out of budget for Kconfig options and already has too many of them, and there is a general kernel trend to simplify the configuration menu. We remove the stone age exhibits along with closing the museum REMARK Don't apply this part from upstream: Some of the iron age ones are transferred to the regular NAND depot. Namely, only those which have unique device IDs are transferred, and the ones which have conflicting device IDs are removed. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: toshiba: Retrieve ECC requirements from extended IDMichael Trimarchi
Upstream linux commit fb3bff5b407e58. This patch enables support to read the ECC strength and size from the NAND flash using Toshiba Memory SLC NAND extended-ID. This patch is based on the information of the 6th ID byte of the Toshiba Memory SLC NAND. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Move Macronix specific initialization in nand_macronix.cMichael Trimarchi
Upstream linux commit 3b5206f4be9b65. Move Macronix specific initialization logic into nand_macronix.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Move AMD/Spansion specific init/detection logic in nand_amd.cMichael Trimarchi
Upstream linux commit 229204da53b31d. Move AMD/Spansion specific initialization/detection logic into nand_amd.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Move Micron specific init logic in nand_micron.cMichael Trimarchi
Upstream linux commit 10d4e75c36f6c1. Move Micron specific initialization logic into nand_micron.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Move Toshiba specific init/detection logic in nand_toshiba.cMichael Trimarchi
Upstream linux commit 9b2d61f80b060c. Move Toshiba specific initialization and detection logic into nand_toshiba.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Move Hynix specific init/detection logic in nand_hynix.cMichael Trimarchi
Upstream linux commit 01389b6bd2f4f7. Move Hynix specific initialization and detection logic into nand_hynix.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Move Samsung specific init/detection logic in nand_samsung.cMichael Trimarchi
Upstream linux commit c51d0ac59f2420. Move Samsung specific initialization and detection logic into nand_samsung.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Export symbol nand_decode_ext_idMichael Trimarchi
In preparation of moving specific nand support that are not jedec or onfi Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Fix MediaTek MT7621 SoC buildMichael Trimarchi
nand_get_flash_type was reworked in commit 1ca6f9483e9ab5. This change break the Mediatek MT721. Fix it adjust the function call parameters +include/linux/mtd/rawnand.h:32:62: note: expected 'struct nand_chip *' but argument is of type 'struct mtd_info *' + 32 | struct nand_flash_dev *nand_get_flash_type(struct nand_chip *chip, + | ~~~~~~~~~~~~~~~~~~^~~~ +drivers/mtd/nand/raw/mt7621_nand.c:1189:48: error: passing argument 2 of 'nand_get_flash_type' from incompatible pointer type [-Werror=incompatible-pointer-types] + | ^~~~ + | | + | struct nand_chip * +include/linux/mtd/rawnand.h:33:49: note: expected 'int *' but argument is of type 'struct nand_chip *' + 33 | int *maf_id, int *dev_id, Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Get rid of mtd variable in function callsMichael Trimarchi
chip points to mtd. Passing chip is enough to have a reference to mtd when is necessary Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Add manufacturer specific initialization/detection stepsMichael Trimarchi
Upstream linux commit abbe26d144ec22. A lot of NANDs are implementing generic features in a non-generic way, or are providing advanced auto-detection logic where the NAND ID bytes meaning changes with the NAND generation. Providing this vendor specific initialization step will allow us to get rid of full-id entries in the nand_ids table or all the vendor specific cases added over the time in the generic NAND ID decoding logic. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Store nand ID in struct nand_chipMichael Trimarchi
Upstream linux commit 7f501f0a72036d. Store the NAND ID in struct nand_chip to avoid passing id_data and id_len as function parameters. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-22mtd: nand: Get rid of busw parameterMichael Trimarchi
Upstream linux commit 29a198a1592d83. Auto-detection functions are passed a busw parameter to retrieve the actual NAND bus width and eventually set the correct value in chip->options. Rework the nand_get_flash_type() function to get rid of this extra parameter and let detection code directly set the NAND_BUSWIDTH_16 flag in chip->options if needed. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-07-18sunxi-nand: fix the PIO instead of DMA implementationMarkus Hoffrogge
The sunxi nand SPL loader was broken at least for SUN4I, SUN5I and SUN7I SOCs since the implementation change from DMA to PIO usage - commit 6ddbb1e. Root cause for this issue is the NFC control flag NFC_CTL_RAM_METHOD being set by method nand_apply_config. This flag controls the bus being used for the NFCs internal RAM access. It must be set for the DMA use case only. See A33_Nand_Flash_Controller_Specification.pdf page 12. This fix is tested by myself on a Cubietruck A20 board. Others should test it on new generation SOCs as well. Signed-off-by: Markus Hoffrogge <mhoffrogge@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-07-13nand: raw: add support for MediaTek MT7621 SoCWeijie Gao
This patch adds NAND flash controller driver for MediaTek MT7621 SoC. The NAND flash controller of MT7621 supports only SLC NAND flashes. It supports 4~12 bits correction with maximum 4KB page size. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2022-07-11Merge branch 'next'Tom Rini
2022-07-08mtd: rawnand: Add support to dedicated function to set timingsKory Maincent
With the current code if the board has an ONFI compliant NAND without support to the get and set features, U-boot returns an ENOTSUP error when trying to tune the timings which prevents the probe of the device. Indeed onfi_set_features() return ENOTSUP error if set/get features is not supported. In the case of timings we should not return ENOTSUP because we can use the default timings. The NAND is already capable of listening at its highest supported rate, so we assume in this case that it is fine to skip the operation. Fix it by adding an intermediate nand_onfi_set_timings() function which does not error out if set/get feature is not supported. Signed-off-by: Kory Maincent <kory.maincent@bootlin.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2022-07-07spl: Ensure all SPL symbols in Kconfig have some SPL dependencyTom Rini
Tighten up symbol dependencies in a number of places. Ensure that a SPL specific option has at least a direct dependency on SPL. In places where it's clear that we depend on something more specific, use that dependency instead. This means in a very small number of places we can drop redundant dependencies. Reported-by: Pali Rohár <pali@kernel.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-07-03mtd: rawnand: fsl_elbc: Fix detection when nand_scan_ident() has not ↵Pali Rohár
selected ecc.mode ecc.mode is set to 0 (aliased to NAND_ECC_NONE) either when function nand_scan_ident() has not selected ecc.mode or when it selected it to none ecc mode. Distinguish between these two states by checking of node property "nand-ecc-mode" which function nand_scan_ident() uses for filling ecc.mode. This change fixes usage of none ecc mode if it is specified in DTS file. Fixes: c9ea9019c5aa ("mtd: rawnand: fsl_elbc: Use ECC configuration from device tree") Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-29mtd: mxs_nand_spl: fix nand_command protocol violationAndrea Scian
mxs_nand_command() implementation assume that it's working with a LP NAND, which is a common case nowadays and thus uses two bytes for column address. However this is wrong for NAND_CMD_READID and NAND_CMD_PARAM, which expects only one byte of column address, even for LP NANDs. This leads to ONFI detection problem with some NAND manufacturer (like Winbond) but not with others (like Samsung and Spansion) We fix this with a simple workaround to avoid the 2nd byte column address for those two commands. Also align the code with nand_base to support 16 bit devices. Tested on an iMX6SX device with: * Winbond W29N04GVSIAA * Spansion S34ML04G100TF100 * Samsung K9F4G08U00 Tested on imx8mn device with: * Windbond W29N04GV Signed-off-by: Andrea Scian <andrea.scian@dave.eu> CC: Stefano Babic <sbabic@denx.de> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-06-20Merge tag 'u-boot-stm32-20220620' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-stm into next - Add STM32MP13 SoCs support with associated board STM32M135F-DK - Correct livetree support in stm32mp1 boards - Activate livetree for stm32mp15 DHSOM boards
2022-06-20mtd: rawnand: fsl_elbc: Fix DM support in DTS code pathPali Rohár
For proper DM support it is required to fill also mtd->dev member. Otherwise DM would not see nand device at all. Signed-off-by: Pali Rohár <pali@kernel.org>
2022-06-17stm32mp1: fix reference for STMicroelectronicsPatrick Delaunay
Replace reference to the correct name STMicroelectronics Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-06-06Convert CONFIG_TPL_NAND_INIT to KconfigTom Rini
This converts the following to Kconfig: CONFIG_TPL_NAND_INIT Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-20mtd: nand: mxs_nand_spl: Fix bad block skippingMichael Trimarchi
The specific implementation was having bug. Those bugs are since the beginning of the implementation. Some manufactures can already experience this bug in their SPL code. This bug can be more visible on architecture that has complicated boot process like imx8mn. Older version of uboot can be affected if the bad block appear in correspoding of the beginning of u-boot image. In order to adjust the function we scan from the first erase block. The problematic part of old code was in this part: while (is_badblock(mtd, offs, 1)) { page = page + nand_page_per_block; /* Check i we've reached the end of flash. */ if (page >= mtd->size >> chip->page_shift) { free(page_buf); return -ENOMEM; } } Even we fix it adding increment of the offset of one erase block size , we don't fix the problem, because the first erase block where the image start is not checked. The code was tested on an imx8mn where the boot rom api was not able to skip it. This code is used by other architecures like imx6 and imx8mm Cc: Han Xu <han.xu@nxp.com> Cc: Fabio Estevam <festevam@gmail.com> Acked-by: Han Xu <han.xu@nxp.com> Tested-By: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-05-20nand: raw: mxs_nand: Fix specific hook registrationMichael Trimarchi
Move the hook after nand_scan_tail is called. The hook must be replaced to the mxs specific one but those must to be assignment later in the probe function. With this fix markbad is working again. Before this change: nand markbad 0xDEC00 NXS NAND: Writing OOB isn't supported NXS NAND: Writing OOB isn't supported block 0x000dec00 NOT marked as bad! ERROR 0 Cc: Han Xu <han.xu@nxp.com> Cc: Fabio Estevam <festevam@gmail.com> Acked-by: Han Xu <han.xu@nxp.com> Tested-By: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-05-19mtd: rawnand: mxs_nand: Fix use_minimum_ecc for spl driverYe Li
Because mxs_nand_spl driver does not support DM, to use the minimum ECC layout, it needs to handle the CONFIG_NAND_MXS_USE_MINIMUM_ECC. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Han Xu <han.xu@nxp.com>
2022-05-03pci: Add mask parameter to dm_pci_map_bar()Andrew Scull
Add a mask parameter to control the lookup of the PCI region from which the mapping can be made. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-03pci: Map bars with offset and lengthAndrew Scull
Evolve dm_pci_map_bar() to include an offset and length parameter. These allow a portion of the memory to be mapped and range checks to be applied. Passing both the offset and length as zero results in the previous behaviour and this is used to migrate the previous callers. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-04-26mtd: nand: raw: Add support for DT property nand-ecc-algo=bchPali Rohár
According to Linux kernel DT schema nand-controller.yaml, using DT property nand-ecc-algo=bch is the correct way for specifying BCH as ECC algorithm. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26mtd: rawnand: fsl_elbc: Use ECC configuration from device treePali Rohár
Initialize ECC configuration after nand_scan_ident() call and only in case nand_scan_ident() have not done it. nand_scan_ident() fills ECC configuration from device tree. Fixes usage of NAND_ECC_SOFT_BCH when it is specified in device tree. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26mtd: rawnand: fsl_elbc: Add device tree supportPali Rohár
This allows boards to specify NAND settings via standard DT properties. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26mtd: rawnand: fsl_elbc: Implement RNDOUT commandPali Rohár
This is needed for SW ECC. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-13Merge tag 'u-boot-imx-20220413' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20220413 i.MX patches for 2022.07 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/11710
2022-04-12mtd: nand: mxs_nand_spl: Remove the page aligned accessYe Li
The mxs_nand_spl driver can support to read from page unaligned offset, so don't need to set bl_len to ask spl_load_simple_fit to handle the page unaligned access. Actually spl_load_simple_fit has two parts of reading: spl_simple_fit_read and spl_load_fit_image. The spl_load_fit_image can handle the page unaligned offset, but the spl_simple_fit_read can't do it. spl_simple_fit_read requires the FIT location at page aligned offset. Hence, remove the nand_get_mtd overwrite function from mxs_nand_spl to use page unaligned read by driver. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Tim Harvey <tharvey@gateworks.com> #gw_ventana
2022-04-11mtd: Add flash_node in struct mtd_infoPatrice Chotard
Currently, add_mtd_partitions_of() can be used only if dev field of mtd_info struct is populated. It's the case, for example, for a spi nor flash, which has a DT compatible "jedec,spi-nor" and an associated device. mtd->dev is populated in spi_nor_scan(). But in case of a raw nand node, mtd_info's dev field can't be populated as flash node has no compatible, so no associated device. add_mtd_partitions_of() can't be used to parse "partitions" subnode. To remove this constraint, add an ofnode field in mtd_info struct which reference the DT flash node. This new field is populated by nand_scan_tail(). This new field will be used by add_mtd_partitions_of() to parse the flash node for "partitions" defined in DT. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Farhan Ali <farhan.ali@broadcom.com> Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Marek Behun <marek.behun@nic.cz> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Simon Glass <sjg@chromium.org> Cc: Wolfgang Denk <wd@denx.de>
2022-03-28Merge tag 'v2022.04-rc5' into nextTom Rini
Prepare v2022.04-rc5
2022-03-28mtd: gpmi: fix the bch setting backward compatible issueHan Xu
Previous u-boot code changed the default bch setting behavior and caused backward compatible issue. This fix choose the legacy bch geometry back again as the default option. If the minimum ecc strength that NAND chips required need to be chosen, it can be enabled by either adding DT flag "fsl,use-minimum-ecc" or CONFIG_NAND_MXS_USE_MINIMUM_ECC in configs. The unused flag "fsl,legacy-bch-geometry" get removed. Fixes: 51cdf83eea (mtd: gpmi: provide the option to use legacy bch geometry) Fixes: 616f03daba (mtd: gpmi: change the BCH layout setting for large oob NAND) Tested-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Signed-off-by: Han Xu <han.xu@nxp.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2022-03-16Merge tag 'xilinx-for-v2022.07-rc1' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2022.07-rc1 microblaze: - Add support for reserved memory xilinx: - Update FRU code with MAC reading zynqmp: - Remove double AMS setting - DT updates (mostly for SOMs) - Add support for zcu106 rev 1.0 zynq: - Update nand binding nand: - Aligned zynq_nand to upstream DT binding net: - Add support for ethernet-phy-id mmc: - Workaround CD in zynq_sdhci driver also for ZynqMP - Add support for dynamic/run-time SD config for SOMs gpio: - Add driver for slg7xl45106 firmware: - Add support for dynamic SD config power-domain: - Update zynqmp driver with the latest firmware video: - Add skeleton driver for DP and DPDMA i2c: - Fix i2c to work with QEMU pinctrl: - Add driver for zynqmp pinctrl driver
2022-03-15mtd: rawnand: stm32_fmc2: add NAND Write Protect supportChristophe Kerello
This patch adds the support of the WP# signal. WP will be disabled before the first access to the NAND flash. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-03-07nand: brcmnand: add bcm6753 supportPhilippe Reynes
This adds the nand support for chipset bcm6753. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07mtd: nand: Update driver to match new DT bindingMichal Simek
New binding changed node name from flash@e1000000 to nand-controller@0,0 which should be reflected in the driver. Both names are supported for backward compatibility. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/61f6edd965e0c0b179184823d5283c6c61a1eb35.1645625433.git.michal.simek@xilinx.com
2022-01-19doc: replace @return by Return:Heinrich Schuchardt
Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-01-17mtd: nand: pxa3xx: set mtd->devRobert Marko
Currently the pxa3xx driver does not set the udevice in the mtd_info struct and this prevents the mtd from parsing the partitions via DTS like for SPI-NOR. So simply set the mtd->dev to the driver udevice. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-16nand: gpmc: Handle bitflips in erased pages when using BCH ECC engineDavid Rivshin
In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
2022-01-14BRCMNAND: Fix reporting of uncorrectable errors on subpages during page readJoel Peshkin
Previously, a subpage with an uncorrectable error followed by a subpage with a correctable error would return an erroneous correctable status. Signed-off-by: Joel Peshkin <joel.peshkin@broadcom.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-14mtd: nand: pxa3xx: use marvell, prefix for custom DT propertiesPierre Bourdon
The DT properties for the "enable-arbiter" and "keep-config" config knobs were previously named inconsistently: - The u-boot driver used "nand-enable-arbiter" and "nand-keep-config" names, without Marvell prefixes. - The Linux driver uses "marvell,nand-keep-config" ("enable-arbiter" does not exist anymore in recent kernels, but it also used to be "marvell,nand-enable-arbiter"). - The device trees almost all use "marvell," prefixed names, except for one single instance of "nand-enable-arbiter" without vendor prefix. This commit standardizes on the vendor prefixed version, making the u-boot driver read from DT props "marvell,nand-enable-arbiter" and "marvell,nand-keep-config". The one device tree using the unprefixed version is also changed to use the new naming. This has the side effect of making the previously no-op "marvell," config knobs already present in some DTs actually do something. This was likely the original intention of the DT authors, but note that this commit was not tested on every single impacted board. Signed-off-by: Pierre Bourdon <delroth@gmail.com>
2021-12-27Finish conversion CONFIG_SYS_NAND_SELF_INIT to KconfigTom Rini
In order to finish this conversion we need to add a symbols for SPL_SYS_NAND_SELF_INIT and TPL_SYS_NAND_SELF_INIT as there are cases there where we need to, or need to not, use that framework as things stand. Signed-off-by: Tom Rini <trini@konsulko.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-10-19 11:14:04 +0000