summaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Collapse)Author
2016-11-07net: mvgbe: Fix build error with CONFIG_PHYLIBChris Packham
Commit 5a49f17481bb ("net: mii: Use spatch to update miiphy_register") updated the mvgbe implementation of smi_reg_read/smi_reg_write. Prior to that change mvgbe_phy_read and mvgbe_phy_write where used as wrappers to satisfy the phylib APIs. Because these functions weren't updated in that commit build errors where triggered when CONFIG_PHYLIB was enabled. Fix these build errors by removing mvgbe_phy_read and mvgbe_phy_write and using smi_reg_read/smi_reg_write directly. Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-11-07net: phy: micrel: center FLP burst timing at 16msAsh Charles
Like [1], reset the FLP burst timing for the KSZ9031 to the 16ms specified by the IEEE802.3 standard from the chip's default of 8ms. For more details, see the "Auto-Negotiation Timing" section of the KSZ9031RNX datasheet. [1] https://patchwork.kernel.org/patch/6558371/ Signed-off-by: Ash Charles <ash.charles@savoirfairelinux.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-11-07net: add driver for Synopsys Ethernet QoS deviceStephen Warren
This driver supports the Synopsys Designware Ethernet QoS (Quality of Service) a/k/a eqos IP block, which is a different design than the HW supported by the existing designware.c driver. The IP supports many options for bus type, clocking/reset structure, and feature list. This driver currently supports the specific configuration used in NVIDIA's Tegra186 chip, but should be extensible to other combinations quite easily, as explained in the source. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> # V1 Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-11-03Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
2016-11-03dfu: align array in dfu_get_dev_type with enum dfu_device_typePatrick Delaunay
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
2016-11-02Merge git://git.denx.de/u-boot-rockchipTom Rini
2016-10-31Fix spelling of "resetting".Vagrant Cascadian
Cover-Letter: Fixes several spelling errors for the words "resetting", "extended", "occur", and "multiple". Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-30rockchip: rk3288: Move rockchip_get_cru() out of the driverSimon Glass
This function is called from outside the driver. It should be placed into common SoC code. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2016-10-30rockchip: rk3399: Move rockchip_get_cru() out of the driverSimon Glass
This function is called from outside the driver. It should be placed into common SoC code. Move it. Also rename the driver symbol to be more consistent with the other rockchip clock drivers. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2016-10-30rockchip: rk3036: Move rockchip_get_cru() out of the driverSimon Glass
This function is called from outside the driver. It should be placed into common SoC code. Move it. Also rename the driver symbol to be more consistent with the other rockchip clock drivers. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2016-10-30clk: rk3399: fix rockchip_get_cruJacob Chen
clk_rk3399 is driver name, not device name Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-30Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini
2016-10-30sunxi: A64: enable USB supportAmit Singh Tomar
Mostly by adding MACH_SUN50I to some existing #ifdefs enable support for the the HCI0 USB host controller on the A64. Fix up some minor 64-bit hiccups on the way. Add the bare minimum DT bits to the A64 .dtsi and enable the controllers and the PHY on the Pine64. This is limited to the first USB controller at the moment, which is connected to the lower USB socket on the Pine64 board. [Andre: remove unneeded defines, enable OHCI, add commit message] Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30sunxi: Rename CONFIG_SUNXI to CONFIG_ARCH_SUNXIJagan Teki
CONFIG_SUNXI -> CONFIG_ARCH_SUNXI and removed CONFIG_SUNIX from config_whitelist.txt Cc: Simon Glass <sjg@chromium.org> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-29Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2016-10-29Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
2016-10-29drivers: USB: OHCI: allow compilation for 64-bit targetsAndre Przywara
OHCI has a known limitation of allowing only 32-bit DMA buffer addresses, so we have a lot of u32 variables around, which are assigned to pointers and vice versa. This obviously creates issues with 64-bit systems, so the compiler complains here and there. To allow compilation for 64-bit boards which use only memory below 4GB anyway (and to avoid more invasive fixes), adjust some casts and types and assume that the EDs and TDs are all located in the lower 4GB. This fixes compilation of the OHCI driver for the Pine64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2016-10-28Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini
2016-10-28dm: at91: Add driver model support for the spi driverWenyou Yang
Add driver model support while retaining the existing legacy code. This allows the driver to support boards that have converted to driver model as well as those that have not. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
2016-10-28serial: atmel_usart: Support enable an early debug UARTWenyou Yang
Add support to enable an early debug UART for debugging. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-10-28serial: Kconfig: Add ATMEL_USART optionWenyou Yang
Add ATMEL_USART option to support to enable the Atmel usart driver from Kconfig. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-10-28mmc: atmel_sdhci: Remove unnecessary clock callingWenyou Yang
Due to the peripheral and generated clock driver improvement, remove the unnecessary clock calling. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-10-28usb: ehci-atmel: Remove unnecessary clock callingWenyou Yang
Due to the peripheral clock driver improvement, remove the unnecessary clock calling. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-10-28i2c: at91_i2c: Change error return -ENODEV to -EINVALWenyou Yang
Change the error return value -ENODEV from to -EINVAL for more reasonable. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2016-10-28i2c: at91_i2c: Remove unnecessary clock callingWenyou Yang
Due to the peripheral clock driver improvement, remove the unnecessary clock calling. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2016-10-28gpio: atmel_pio4: Remove unnecessary clock callingWenyou Yang
Due to the peripheral clock driver improvement, remove the unnecessary clock calling. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Stephen Warren <swarren@nvidia.com>
2016-10-28clk: at91: Improve the clock implementationWenyou Yang
For the peripheral clock, provide the clock ops for the clock provider, such as spi0_clk. The .of_xlate is to get the clk->id, the .enable is to enable the spi0 peripheral clock, the .get_rate is to get the clock frequency. The driver for periph32ck node is responsible for recursively binding its children as clk devices, not provide the clock ops. So do the generated clock and system clock. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Stephen Warren <swarren@nvidia.com>
2016-10-28clk: clk-uclass: Assign clk->dev before call .of_xlateWenyou Yang
In order to make clk->dev available in ops->of_xlate() to get the clock ID from the 'reg' property of the clock node, assign the clk->dev before calling ops->of_xlate(). Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-28clk: at91: Fix at91-pmc and at91-sckc's class IDWenyou Yang
The at91-pmc and at91-sckc aren't the clock providers, change their class ID from UCLASS_CLK to UCLASS_SIMPLE_BUS, they also don't need to bind the child nodes explicitly, the .post_bind callback of simple_bus uclass will do it for them. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-28Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: common/Kconfig configs/dms-ba16_defconfig
2016-10-28Merge branch 'master' of http://git.denx.de/u-boot-mmcTom Rini
2016-10-28pci: Move CONFIG_PCI_PNP to KconfigBin Meng
Introduce CONFIG_PCI_PNP in Kconfig and move over boards' defconfig to use that. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Re-generate configs and include/configs/ changes] Signed-off-by: Tom Rini <trini@konsulko.com>
2016-10-28dm: mmc: socfpga: fix MMC_OPS supportSylvain Lesne
Now that CONFIG_BLK and CONFIG_MMC_OPS are enabled by default with CONFIG_DM_MMC, the DWMMC driver on the socfpga platform fails at runtime. This adds the missing fields in the driver declaration. Signed-off-by: Sylvain Lesne <lesne@alse-fr.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-28mmc: sdhci: assign to clk_mul when host version is upper than SD3.0Jaehoon Chung
To prevent the wrong value check the SD version. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-10-28mmc: add the device name in debugging message for supplying vmmcJaehoon Chung
If vmmc didn't supply, we didn't know which card didn't supply vmmc. And changed from "put" to "debug". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2016-10-28dm: mmc: socfpga: fix MMC_OPS supportSylvain Lesne
Now that CONFIG_BLK and CONFIG_MMC_OPS are enabled by default with CONFIG_DM_MMC, the DWMMC driver on the socfpga platform fails at runtime. This adds the missing fields in the driver declaration. Signed-off-by: Sylvain Lesne <lesne@alse-fr.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-28mmc: refactor two core functionsMasahiro Yamada
Drop unneeded variables and assignments. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-28mmc: sdhci: fix the "misaligned operation at range" for cacheJaehoon Chung
This pathc is fixed the below thing. If misaligned the cache range, Just flush to CACHLINE_SIZE. "CACHE: Misaligned operation at range [7ae55b00, 7ae55b08]" Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-10-28mmc: introduce mmc_power_initPeng Fan
In device tree, there is vmmc-supply property for SD/MMC. Introduce mmc_power_init function to handle vmmc-supply. mmc_power_init will first invoke board_mmc_power_init to avoid break boards which already implement board_mmc_power_init. If DM_MMC and DM_REGULATOR is defined, the regulator will be enabled to power up the device. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com>
2016-10-27drivers/pci/Kconfig: Add PCITom Rini
Add 'PCI' as a menu option and migrate all existing users. Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Stephen Warren <swarren@nvidia.com>
2016-10-27ddr: altera: Configuring SDRAM extra cycles timing parametersChin Liang See
To enable configuration of sdr.ctrlcfg.extratime1 register which enable extra clocks for read to write command timing. This is critical to ensure successful LPDDR2 interface Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27usb: xhci-mvebu: use xhci_deregister() for .remove callbackMasahiro Yamada
No need to use a wrapper that is equivalent to xhci_deregister(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-27usb: ehci-vf: use ehci_deregister() for .remove callbackMasahiro Yamada
This driver was recently converted to Driver Model, so missed the subsystem-wide cleanups by commit 405273427366 ("usb: replace ehci_*_remove() with usb_deregister()"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-26mtd: nand: Kconfig: Add NAND_MXS entryJagan Teki
Added kconfig for NAND_MXS driver. Cc: Scott Wood <oss@buserror.net> Cc: Simon Glass <sjg@chromium.org> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2016-10-26net: Kconfig: Add FEC_MXC entryJagan Teki
Added kconfig for FEC_MXC driver. Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2016-10-26thermal: Kconfig: Add IMX_THERMAL entryJagan Teki
Added kconfig for IMX_THERMAL driver. Cc: Simon Glass <sjg@chromium.org> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2016-10-26serial: Kconfig: Add MXC_UART entryJagan Teki
Added kconfig for MXC_UART driver. Cc: Simon Glass <sjg@chromium.org> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2016-10-24i2c: designware: Avoid overwriting the cmd_data registerMarek Vasut
Make sure the driver writes the cmd_data register only once per read transfer instead of doing so potentially repeatedly. In case the read transfer didn't finish quickly enough, the loop in the driver code would spin fast enough to write the same value into the cmd_data register again before re-checking whether the transfer completed, which would cause another spurious read transfer on the bus. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Alexey Brodkin <abrodkin@synopsys.com> Cc: Heiko Schocher <hs@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
2016-10-24Fix codying style broken by recent libfdt syncMasahiro Yamada
Commit b02e4044ff8e ("libfdt: Bring in upstream stringlist functions") broke codying style in some places especially by inserting an extra whitespace before fdt_stringlist_count(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-10-24power: twl6030: fix code refactoringNicolae Rosia
Commit a85362fb3e1fc7833723accddbbae431091d06b8 refactored the code but the register read ended up in the wrong if branch. Currently, the else branch checks a variable which is always 0. Signed-off-by: Nicolae Rosia <nicolae_rosia@mentor.com> Reviewed-by: Tom Rini <trini@konsulko.com>