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2018-11-26Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini
2018-11-26Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2018-11-26spl: Support hash, input, pch, pci, rtc, tpm in SPLSimon Glass
At present these subsystems are only supported in U-Boot proper but it is sometimes necessary to support them in SPL, or even TPL. Update the Kconfig and Makefile to support this. Also adjust GPIO so that it can be used in TPL if required. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-23sun8i_emac: add support for setting EMAC TX/RX delayIcenowy Zheng
Some boards have the EMAC TX/RX lanes wired with a different length with the clock lane, which can be workarounded by setting a TX/RX delay in the EMAC. This kind of delays are already defined in the newest device tree binding of dwmac-sun8i, which has already entered linux-next. Add support for setting these delays. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-11-22sunxi-mmc: use new mode on both controllers on A64Vasily Khoruzhick
Using new mode improves stability of eMMC and SD cards. Without it SPL fails to load u-boot from SD on Pinebook. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-11-22sunxi-mmc: don't double clock for new mode unconditionallyVasily Khoruzhick
Comment in Linux driver says that clock needs to be doubled only if we use DDR modes, moreover divider has to be set accordingly. U-boot driver doesn't declare support for any DDR modes and doesn't set internal clock divider in CLKCR, so it doubles clock unconditionally when new mode is used. Some cards can't handle that and as result SPL fails to load u-boot. Fixes: de9b1771c3b ("mmc: sunxi: Support new mode") Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
2018-11-22sunxi-mmc: introduce new MMC_SUNXI_HAS_MODE_SWITCH optionVasily Khoruzhick
Allwinner A64 has new mode but doesn't have a mode switch in CCM, and CCM_MMC_CTRL_MODE_SEL_NEW is not defined, so compilation fails if MMC_SUNXI_HAS_NEW_MODE is enabled Introduce new MMC_SUNXI_HAS_MODE_SWITCH option to be able to ifdef usage of CCM_MMC_CTRL_MODE_SEL_NEW Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> [jagan: update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
2018-11-20sf: Add a method to obtain the block-protect settingSimon Glass
It is useful to obtain the block-protect setting of the SPI flash, so we know whether it is fully open or (perhaps partially) write-protected. Add a method for this. Update the sandbox driver to process this operation and add a test. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20misc: Update read() and write() methods to return bytes xferedSimon Glass
At present these functions return 0 on success. For some devices we want to know how many bytes were transferred. It seems useful to adjust the API to be more like the POSIX read() and write() functions. Update these two methods, a test and all users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-11-20video: Update video_set_default_colors() to support invertSimon Glass
It is useful to be able to invert the colours in some cases so that the text matches the background colour. Add a parameter to the function to support this. It is strange that function takes a private data structure from another driver as an argument. It seems better to pass the device and have the function internally work out how to find its required information. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20sandbox: tpm: Allow debugging of data packagesSimon Glass
This is not normally useful, so change the code to avoid writing out every data package. This can be enabled with #define DEBUG. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20cros_ec: Add new features for events and powerSimon Glass
This adds new commands to the EC related to setting and clearing events as well as controlling power-related settings. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20cros_ec: Align uclass data to a cache boundarySimon Glass
The LPC driver expects its buffer to be word-aligned. Add the required flag to the uclass driver to ensure this. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20cros_ec: Fail if we cannot determine the flash burst sizeSimon Glass
This value is required for flashing to work correctly. Add a check for it. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20cros_ec: Add error logging on a few commandsSimon Glass
Add some more logging to provide more information on failures. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20cros_ec: Use uint instead of u8 for parametersSimon Glass
There is no advantage to using a u8 for function parameters. It forces the compiler to mask values and can increase code size. Also the command enum has been extended to 16 bits. Update the functions to use uint instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20dm: spi: prevent setting a speed of 0 HzSimon Goldschmidt
When the device tree is missing a correct spi slave description below the bus (compatible "spi-flash" or spi-max-frequency are missing), the 'set_speed' callback can be called with 'speed' == 0 Hz. At least with cadence qspi, this leads to a division by zero. Prevent this by initializing speed to 100 kHz in this case (same fallback value as is done in 'dm_spi_claim_bus') and issue a warning to console. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-20dm: core: Widen the dump tree to show more of the driver's name.Liviu Dudau
With drivers that have prefix names that are quite long (like 'versatile_') it is useful to have a wider column for the driver's name when dumping the device driver tree. Also update the tests to take into account the wider output format. Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-20dm/pci: Change the first CFG read to Vendor ID in enumerationHou Zhiqiang
As the PCIe specification recommend reading the Vendor ID register to determine if a Function is present, read the Vendor ID of a non-existent Function must not result in system error, so we'd better make the first CFG read to Vendor ID instead of Header Type register in the PCIe enumeration. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-11-20clk: meson: fix clk81 divider calculationJerome Brunet
clk81 divider is 0 based (meaning that 0 value in the register means divide by 1). Fix clk81 rate calculation for this. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-20dm: adc: add uclass's mask and conversion helpersFabrice Gasnier
Add two functions to ADC uclass's: - adc_raw_to_uV() to ease ADC raw value conversion to microvolts - adc_channel_mask() to get channels on consumer side Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-18gpio: Add MT7621 GPIO supportStefan Roese
This patch adds GPIO support for the Mediatek MT7621 SoC, tested on MT7688 (Gardena smart-gateway). The driver is loosly based on the Linux kernel version. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> [fixed checkpatch.pl warnings: Prefer 'unsigned int' to bare use of 'unsigned'] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-18wdt: Add MT7621 watchdog driverStefan Roese
This patch adds watchdog support for the Mediatek MT7621 SoC. The driver is loosly based on the Linux kernel version. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> [fixed merge conflict in drivers/watchdog/Kconfig] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-17dm: video: correctly set the cursor positionHeinrich Schuchardt
The terminal escape sequence ESC [ <x> ; <y> H is used to set the cursor position. According to the ECMA 48 standard the upper left corner in the escape sequences is [1, 1]. The video uclass uses [0, 0] as upper left corner. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16misc: fs_loader: Fix compiler warningKeerthy
Fix compiler warning drivers/misc/fs_loader.c:193:9: warning: format ‘%d’ expects argument of type ‘int’, but argument 5 has type ‘size_t {aka long unsigned int}’ [-Wformat=] Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16misc: fs_loader: Use device_get_global_by_ofnode to get to nodeKeerthy
Instead of two staged ofnode_to_offset followed by device_get_global_by_of_offset approach, direcly use the device_get_global_by_ofnode to fetch the device. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16serial: ns16550: add setconfig supportSimon Goldschmidt
Add possibility to update the serial parity used. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-11-16ram: Introduce K3 AM654 DDR Sub System driverLokesh Vutla
K3 based AM654 devices has DDR memory subsystem that comprises Synopys DDR controller, Synopsis DDR phy and wrapper logic to intergrate these blocks into the device. This DDR subsystem provides an interface to external SDRAM devices. Adding support for the initialization of the external SDRAM devices by configuring the DDRSS registers and using the buitin PHY routines. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: James Doublesin <doublesin@ti.com>
2018-11-16i2c: stm32f7: change setup struct to constPatrick Delaunay
Change static array to const when it is useful to save memory (move stm32f7_setup=0x18 from .data to .rodata section) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-11-16i2c: stm32f7: cosmetic: clean the driverPatrick Delaunay
Solve alignments issues in the driver to avoid checkpatch error. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-11-16pinctrl: sandbox: Add get_pin_muxing ops supportPatrice Chotard
Add get_pin_mux ops support to display the pin muxing description of the sandbox_pins[] Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16gpio: stm32f7: Add ops get_functionPatrice Chotard
This patch adds gpio get_function ops support. This function reports the state of a gpio. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-11-16pinctrl: stm32: Add get_pin_muxing() opsPatrice Chotard
Add get_pin_muxing() ops to obtain the pin muxing description a given pin index. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16pinctrl: stm32: Add get_pin_name() opsPatrice Chotard
Add get_pin_name ops to obtain a pin name given a pin index of a specified pin-controller. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16pinctrl: stm32: Add get_pins_count() opsPatrice Chotard
Add get_pins_count ops to obtain the number of pins owns by a pin-controller. On STM32 SoCs bindings, each pin-controller owns several gpio banks. Each GPIO bank can own up to 16 pins. To obtain the total pins count, walk through each sub-nodes (ie GPIO banks) and sum each GPIO banks pins number. For that in probe() we build a list with each GPIO device reference found. This list will also be used with future get_pin_muxing and get_pin_name ops to speed up and optimize walk through all GPIO banks. As this code is common to all STM32 SoCs, this code is put under SPL_BUILD compilation flag to avoid to increase SPL code size for STM32F7 which is limited to 32Ko. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16dm: uclass: Add uclass_next_device_err() to return a valid devicePatrice Chotard
Similarly to uclass_first_device_err(), add uclass_next_device_err() which returns an error if there are no next devices in that uclass. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16dm: pinctrl: Add pinctrl_get_pin_name and pinctrl_get_pins_countPatrice Chotard
Add pinctrl_get_pin_name() and pinctrl_get_pins_count() methods to obtain pin's name and pin's muxing given a pin reference. This will be used by the new pinmux command. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16dm: pinctrl: Add get_pin_muxing() opsPatrice Chotard
Add get_pin_muxing() which allows to display the muxing of a given pin belonging to a pin-controller. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-16w1-eeprom: Add support for Maxim DS2502 add only memoryMartin Fuzzey
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
2018-11-16mtd: nand: lpc32xx slc: disable DMA support in SPL buildsVladimir Zapolskiy
Testing and analysis shows that at the moment LPC32xx NAND SLC driver can not get PL080 DMA backbone support in SPL build, because SPL NAND loaders operate with subpage (ECC step to be precisely) reads, and this is not supported in the NAND SLC + DMA + hardware ECC calculation bundle. The change removes a cautious build time warning and explicitly disables DMA flavour of the driver for SPL builds, to reduce the amound of #ifdef sections the code blocks are minimally reorganized. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2018-11-16mtd: nand: lpc32xx mlc: predefine number of NAND chips to supportVladimir Zapolskiy
Build option CONFIG_SYS_MAX_NAND_CHIPS is used by NXP LPC32xx NAND MLC driver only, as a preparation for potential removal or replacement of the option the change predefines CONFIG_SYS_MAX_NAND_CHIPS to 1, same value is used by the single user Work Microwave Work 92105 board, thus it will be safe now to remove the option as a board specific one. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-11-16gpio: pca953x: Clear the polarity invert register at initYe Li
The pca953x_gpio driver uses default value of polarity inversion register. For some devices like PCA9557 and MAX7310, their polarity inversion register default value is 0xf0. So for high 4 ports, when reading their values, the values are inverted as the actual level. This patch clears the polarity inversion register to 0 at init, so that the port read and write values are aligned. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Fugang Duan <fugang.duan@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-11-16clk: Allow clock defaults to be set also during re-reloc stateAndreas Dannenberg
The earlier commit f4fcba5c5ba ("clk: implement clk_set_defaults()") which introduced the functionality for setting clock defaults such as rates and parents will skip the processing when executing in a re-reloc state. This for example can prevent the assigning of clock parents when running in SPL code. Go ahead and remove this limitation. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16serial: bcm6858: add serial supportPhilippe Reynes
This driver add the support of serial on bcm6858. It's based on serial for bcm6345. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-11-16arm: at91: wdt: Convert watchdog driver to dm/dtPrasanthi Chellakumar
Convert the Watchdog driver for AT91SAM9x processors to support the driver model and device tree. Changes "CONFIG_AT91SAM9_WATCHDOG" to new "CONFIG_WDT_AT91" Kconfig option. Signed-off-by: Prasanthi Chellakumar <prasanthi.chellakumar@microchip.com>
2018-11-16Merge tag 'pull-14nov18' of git://git.denx.de/u-boot-dmTom Rini
- virtio implementation and supporting patches - DM_FLAG_PRE_RELOC fixes - regmap improvements - minor buildman and sandbox things
2018-11-14Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2018-11-14watchdog: Remove DM_FLAG_PRE_RELOC flag in various driversBin Meng
When a driver declares DM_FLAG_PRE_RELOC flag, it wishes to be bound before relocation. However due to a bug in the DM core, the flag only takes effect when devices are statically declared via U_BOOT_DEVICE(). This bug has been fixed recently by commit "dm: core: Respect drivers with the DM_FLAG_PRE_RELOC flag in lists_bind_fdt()", but with the fix, it has a side effect that all existing drivers that declared DM_FLAG_PRE_RELOC flag will be bound before relocation now. This may expose potential boot failure on some boards due to insufficient memory during the pre-relocation stage. To mitigate this potential impact, the following changes are implemented: - Remove DM_FLAG_PRE_RELOC flag in the driver, if the driver only supports configuration from device tree (OF_CONTROL) - Keep DM_FLAG_PRE_RELOC flag in the driver only if the device is statically declared via U_BOOT_DEVICE() - Surround DM_FLAG_PRE_RELOC flag with OF_CONTROL check, for drivers that support both statically declared devices and configuration from device tree Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14video: simplefb: Remove DM_FLAG_PRE_RELOC flagBin Meng
When a driver declares DM_FLAG_PRE_RELOC flag, it wishes to be bound before relocation. However due to a bug in the DM core, the flag only takes effect when devices are statically declared via U_BOOT_DEVICE(). This bug has been fixed recently by commit "dm: core: Respect drivers with the DM_FLAG_PRE_RELOC flag in lists_bind_fdt()", but with the fix, it has a side effect that all existing drivers that declared DM_FLAG_PRE_RELOC flag will be bound before relocation now. This may expose potential boot failure on some boards due to insufficient memory during the pre-relocation stage. To mitigate this potential impact, the following changes are implemented: - Remove DM_FLAG_PRE_RELOC flag in the driver, if the driver only supports configuration from device tree (OF_CONTROL) - Keep DM_FLAG_PRE_RELOC flag in the driver only if the device is statically declared via U_BOOT_DEVICE() - Surround DM_FLAG_PRE_RELOC flag with OF_CONTROL check, for drivers that support both statically declared devices and configuration from device tree Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14sysreset: Remove DM_FLAG_PRE_RELOC flag in various driversBin Meng
When a driver declares DM_FLAG_PRE_RELOC flag, it wishes to be bound before relocation. However due to a bug in the DM core, the flag only takes effect when devices are statically declared via U_BOOT_DEVICE(). This bug has been fixed recently by commit "dm: core: Respect drivers with the DM_FLAG_PRE_RELOC flag in lists_bind_fdt()", but with the fix, it has a side effect that all existing drivers that declared DM_FLAG_PRE_RELOC flag will be bound before relocation now. This may expose potential boot failure on some boards due to insufficient memory during the pre-relocation stage. To mitigate this potential impact, the following changes are implemented: - Remove DM_FLAG_PRE_RELOC flag in the driver, if the driver only supports configuration from device tree (OF_CONTROL) - Keep DM_FLAG_PRE_RELOC flag in the driver only if the device is statically declared via U_BOOT_DEVICE() - Surround DM_FLAG_PRE_RELOC flag with OF_CONTROL check, for drivers that support both statically declared devices and configuration from device tree Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>