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2023-07-13clk: imx8mp: Update clocks based on kernel 6.4-RC4Adam Ford
There are some newer clocks added to the kernel recently, so to fix prepare for resycing the device trees, update the clock list. Since there are some minor changes to the USB clocks, update which USB clocks are enabled to match with the upstream kernel as well. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Fabio Estevam <festevam@denx.de> Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
2023-07-13dm: adc: add iMX93 ADC supportLuca Ellero
This commit adds driver for iMX93 ADC. The driver is implemented using driver model and provides ADC uclass's methods for ADC single channel operations: - adc_start_channel() - adc_channel_data() - adc_stop() ADC features: - channels: 4 - resolution: 12-bit Signed-off-by: Luca Ellero <l.ellero@asem.it> Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
2023-07-13imx: imx8ulp: start the ELE RNG at bootPeng Fan
On the imx8ulp A1 SoC, the ELE RNG needs to be manually started. Signed-off-by: Clement Faure <clement.faure@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13imx: misc: ele_mu: Update ELE MU driverYe Li
Extend the RX timeout value to 10s, because when authentication is failed the ELE needs long time (>2s for 28M image) to return the result. Print rx wait info per 1s. Also correct TX and RX status registers in debug. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13imx: misc: ele_mu: Update MU TR registers countYe Li
According to SRM, the Sentinel MU has 8 TR and 4 RR registers. All of them are used for ELE message. So update TR count to 8 and fix a typo in receive msg Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13imx: ele_api: add DEK Blob generationPeng Fan
- Add crc computation. - Add ele_generate_dek_blob API for encrypted boot support. Signed-off-by: Clement Faure <clement.faure@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13imx: ele_api: support program secure fuse and return lifecyclePeng Fan
Add two ELE API: ele_return_lifecycle_update and ele_write_secure_fuse Add two cmd: ahab_return_lifecycle and ahab_sec_fuse_prog Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13imx: use generic name ele(EdgeLockSecure Enclave)Peng Fan
Per NXP requirement, we rename all the NXP EdgeLock Secure Enclave code including comment, folder and API name to ELE to align. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13imx: scu_api: update to version 1.16 and add more APIsPeng Fan
Upgrade SCFW API to 1.16 Add more APIs: sc_misc_get_button_status sc_pm_reboot sc_seco_v2x_build_info Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-13imx: mach: correct SCU API usagePeng Fan
The return value is int type, not sc_err_t(u8), correct the usage. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-07-11serial: pl01x: Modify pending callback to test if transmit FIFO is emptyLukasz Majewski
Before this change the FR_TXFF (Transmit FIFO full) bit (5 in HW_UARTDBG_FR) has been used to assess if there is still data pending to be sent via UART. This approach is problematic, as it may happen that serial is in the middle of transmission (so the TX FIFO is NOT full anymore) and this test returns true infinitely. As a result, for example in _serial_flush() DM serial function we are locked in endless while(). The fix here is to test explicitly if the TX FIFO is empty. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2023-07-11serial: pl01x: Prepare the driver to support SPL_OF_PLATDATALukasz Majewski
This commit prepares the pl01x serial driver to be used with SPL_OF_PLATDATA enabled. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2023-07-11serial: pl01x: Change OF_CONTROL to OF_REALLukasz Majewski
Before this change, building this driver for SPL with enabled SPL_DM_SERIAL was problematic, as '-Wunused-const-variable=' warning was visible. Now, the code is only considered when u-boot proper is build. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2023-07-11power: imx8m-power-domain: Add delay to align with kernel driverFabio Estevam
In the imx8m power domain kernel driver, there is an extra udelay(5) prior to requesting the domain to power up: https://github.com/torvalds/linux/blob/v6.3/drivers/soc/imx/gpcv2.c#L347-L375 Haven't observed any issues due to the lack of this delay in U-Boot yet, but better to align it with the kernel driver implementation. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Marek Vasut <marex@denx.de>
2023-07-07sysreset: Change Kconfig GPIO dependencyMichal Simek
DM_GPIO depends on GPIO to be enabled but select will cause that DM_GPIO is selected without GPIO which ends up in compilation error: undefined reference to `dm_gpio_set_value' undefined reference to `dm_gpio_get_value' undefined reference to `dm_gpio_free' undefined reference to `gpio_request_by_name' Signed-off-by: Michal Simek <michal.simek@amd.com> [trini: Fix configs which had relied on these select's] Signed-off-by: Tom Rini <trini@konsulko.com>
2023-07-06Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-usb ↵Tom Rini
into next
2023-07-06clk: starfive: pll: Fix to use postdiv1_maskHoegeun Kwon
There is a problem that the rates of PLL0 and PLL1 are set incorrectly because the postdiv1_mask value is incorrectly entered when setting the pll clk reg. Modify postdiv1's mask value to be put correctly. Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2023-07-06clk: sifive: only build sifive-prci.o for CONFIG_CLK_SIFIVE_PRCIBen Dooks
If we're building non FU540/FU740 SoC drivers, then the sifive-prci.o is not needed. Only build this when CONFIG_CLK_SIFIVE_PRCI is selected. Signed-off-by: Ben Dooks <ben.dooks@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-07-05Merge tag 'v2023.07-rc6' into nextTom Rini
Prepare v2023.07-rc6
2023-07-04regulator: handle different error codes in regulator_set_enable_if_allowedEugen Hristev
The regulator core can return different codes which are not considered a real error for this function. Return success in such cases. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-07-04regulator: rename dev_pdata to platEugen Hristev
Simplify the subsystem by renaming `dev_pdata` to just `plat`. No functional change, just trivial renaming. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-07-04regulator: implement basic reference counterEugen Hristev
Some devices share a regulator supply, when the first one will request regulator disable, the second device will have it's supply cut off before graciously shutting down. Hence there will be timeouts and other failed operations. Implement a reference counter mechanism similar with what is done in Linux, to keep track of enable and disable requests, and only disable the regulator when the last of the consumers has requested shutdown. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-07-03usb: dwc3-generic: Ensure reset GPIO is configured as an outputPeter Korsgaard
GPIOD_ACTIVE_LOW is not enough to configure a GPIO as an output, we need GPIOD_IS_OUT as well. Fixes: b252d79b0936d60b ("usb: dwc3: Add support to reset usb ULPI phy") Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
2023-06-29pinctrl: rockchip: Fix Data Abort exception in SPLJonas Karlman
Using CONFIG_ARMV8_SPL_EXCEPTION_VECTORS=y and CONFIG_OF_LIVE=y triggers a Data Abort exception from unaligned memory access when the pinctrl driver iterate node properties, e.g. for UART2 on RK3568. setting mux of GPIO0-24 to 1 setting mux of GPIO0-24 to 1 "Synchronous Abort" handler, esr 0x96000021 elr: 000000000000e554 lr : 000000000000e54c x 0: 0000000000000a5c x 1: 0000000000000a5c x 2: 0000000000000007 x 3: 0000000000000065 x 4: 0000000000000007 x 5: 0000000000022d4e x 6: 0000000000000a7c x 7: 00000000000227a4 x 8: 0000000000021cf0 x 9: 0000000000000a7c x10: 0000000000021cf0 x11: 0000000000021cf0 x12: 00000000003fda1c x13: 0000000000000007 x14: 00000000003fd9ec x15: 000000000001c0ff x16: 0000000007000000 x17: 00000000fdccd028 x18: 00000000003fde20 x19: 0000000000000018 x20: 0000000000020670 x21: 0000000000000000 x22: 00000000003fdb00 x23: 00000000003fef90 x24: 0000000000020688 x25: 0000000000000000 x26: 0000000000000001 x27: 00000000003ffc50 x28: 0000000000000000 x29: 00000000003fda60 Code: b94083e1 97ffd508 93407c01 37f81260 (f9401038) Resetting CPU ... Fix this by replacing the loop to access node properties with use of ofnode_for_each_prop instead of the current ifdef. Also continue to next prop instead of aborting at first sign of an unknown property. This fixes the Data Abort exception and also pinconf of e.g. pull and drive in SPL, e.g. for UART2 on RK3568. setting mux of GPIO0-24 to 1 setting mux of GPIO0-24 to 1 setting pull of GPIO0-24 to 5 setting mux of GPIO0-25 to 1 setting mux of GPIO0-25 to 1 setting pull of GPIO0-25 to 5 Fixes: e7ae4cf27a6d ("pinctrl: rockchip: Add common rockchip pinctrl driver") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-06-29phy: rockchip: inno-usb2: fix phy reg=0 caseEugen Hristev
The support for #address-cells=2 has a loophole: if the reg is actually 0, but the #address-cells is actually 1, like in such case below: syscon { #address-cells = <1>; phy { reg = <0 0x10>; }; }; then the second u32 of the 'reg' is the size, not the address. The code should check for the parent's #address-cells value, and not assume that if the first u32 is 0, then the #address-cells is 2, and the reg property is something like reg = <0 0xff00 0x10>; Fixed this by looking for the #address-cells value and retrieving the reg address only if this is ==2. To avoid breaking anything I also kept the check `if reg==0` as some DT's may have a wrong #address-cells as parent and even if this commit is correct, it might break the existing wrong device-trees. Fixes: d538efb9adcf ("phy: rockchip: inno-usb2: Add support #address_cells = 2") Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-06-28drivers: meson: introduce secure power controller driverAlexey Romanov
This patch adds Power controller driver support for Amlogic A1 family using secure monitor calls. The power domains register only can access in secure world. Signed-off-by: Alexey Romanov <avromanov@sberdevices.ru> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230531093156.29240-4-avromanov@sberdevices.ru Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-28pinctrl: meson: add pinctrl driver for Amlogic A1Igor Prusov
Based on Linux kernel commit: dabad1ff85611 (pinctrl: meson: add pinctrl driver support for Meson-A1 SoC) Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230505125639.3605-5-ivprusov@sberdevices.ru Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-06-21usb: dwc2: Fix the write to W1C fields in HPRT registerTeik Heng Chong
Fix the write to the HPRT register which treat W1C fields as if they were mere RW. This leads to unintended clearing of such fields This bug was found during the testing on Simics model. Referring to specification DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG) Databook (3.30a)"5.3.4.8 Host Port Control and Status Register (HPRT)", the HPRT.PrtPwr is cleared by this mistake. In the Linux driver (contrary to U-Boot), HPRT is always read using dwc2_read_hprt0 helper function which clears W1C bits. So after write back those bits are zeroes. Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com>
2023-06-20drivers: spi: omap3_spi: Initialize mode for all channelsJulien Panis
At first SPI transfers, multiple chip selects can be enabled simultaneously. This is due to chip select polarity, which is not properly initialized for all channels. This patch fixes the issue. Signed-off-by: Julien Panis <jpanis@baylibre.com>
2023-06-20usb: eth: lan78xx: Fix logic in lan78xx_read_otp() to avoid a warningTom Rini
In lan78xx_read_otp() we want to know if sig is LAN78XX_OTP_INDICATOR_1 or LAN78XX_OTP_INDICATOR_2. In the case of matching the first one we set offset to itself, and clang warns about this. Rework the logic so that if sig is the second indicator we adjust the offset as today and if it does not match the first indicator we return -EINVAL Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2023-06-19nvme: pci: Enable for SPLMayuresh Chitale
Enable NVME and PCI NVMe drivers for SPL builds. Also enable PCI_PNP for SPL which is required to auto configure the PCIe devices. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
2023-06-19spl: blk: Support loading images from fsMayuresh Chitale
Add a generic API to support loading of SPL payload from any supported filesystem on a given partition of a block device. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
2023-06-19nvmxip: move header to includeRui Miguel Silva
Move header to include to allow external code to get the internal bdev structures to access block device operations. as at it, just add the UCLASS_NVMXIP string so we get the correct output in partitions listing. Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
2023-06-16serial: stm32: BRR must be set only when usart is disablePatrice Chotard
To avoid spurious chars, BRR register must only be written when USART is disabled. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-06-16serial: stm32: Wait TC bit before performing initializationPatrice Chotard
In case there is still chars from previous bootstage to transmit, wait for TC (Transmission Complete) bit to be set which ensure that the last data written in the USART_TDR has been transmitted out of the shift register. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-06-16pmic: stpmic1: support new prefix node name for regulatorPatrick Delaunay
The '_' character is discouraged in the node name, this patch adds the new prefix of regulator subnode, with the '-' character, in STM32MP1 driver to support the new naming rule in Linux kernel device trees. It is a preliminary patch before Linux device tree synchronization for STMicroelectronics boards. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16dfu: mtd: remove direct call of mtdparts_init functionPatrick Delaunay
With MTD support in driver model, the direct call of mtdparts_init should be avoided and replaced by mtd_probe_devices. With the modificaton when MTDIDS/MTDPARTS are empty the OF fallback with partition describe in device tree is correctly performed, introduced by commit dc339bf784f0 ("mtd: add support for parsing partitions defined in OF"). With this patch the dependency with CONFIG_CMD_MTDPARTS is removed. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-15net: fsl-mc: sync remaining MC commandsIoana Ciornei
This patch targets the last remaining commands left to sync to their latest form - mainly the mc_get_version() API. Besides this, remove any macro which is now of no help. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-06-15net: fsl-mc: sync DPIO MC APIsIoana Ciornei
Sync the Data Path IO APIs to their latest form, this means the layout of each command is created based on structures which clearly describe the endianness of each field rather than some macros. The command version is kept in place, meaning that the minimum MC version accepted is not changed in any way. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-06-15net: fsl-mc: sync DPSPARSER MC APIsIoana Ciornei
Sync the Data Path Soft Parser APIs to their latest form, this means the layout of each command is created based on structures which clearly describe the endianness of each field rather than some macros. The command version is kept in place, meaning that the minimum MC version accepted is not changed in any way. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-06-15net: fsl-mc: sync DPNI MC APIsIoana Ciornei
Sync the Data Path Network Interface APIs to their latest form, this means the layout of each command is created based on structures which clearly describe the endianness of each field rather than some macros. The command version is kept in place, meaning that the minimum MC version accepted is not changed in any way. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-06-15net: fsl-mc: sync DPRC MC APIsIoana Ciornei
Sync the Data Resource Container APIs to their latest form, this means the layout of each command is created based on structures which clearly describe the endianness of each field rather than some macros. The command version is kept in place, meaning that the minimum MC version accepted is not changed in any way. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-06-15net: fsl-mc: sync DPMAC MC APIsIoana Ciornei
Sync the Data Path MAC APIs to their latest form, this means the layout of each command is created based on structures which clearly describe the endianness of each field rather than some macros. The command version is kept in place, meaning that the minimum MC version accepted is not changed in any way. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-06-15net: fsl-mc: sync DPBP MC APIsIoana Ciornei
Sync the Data Path Buffer Pool APIs to their latest form, this means the layout of each command is created based on structures which clearly describe the endianness of each field rather than some macros. The command version is kept in place, meaning that the minimum MC version accepted is not changed in any way. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-06-15net: fsl-mc: remove unused MC APIsIoana Ciornei
There are multiple MC APIs which were added years ago but they are not used at all in the u-boot source code. Remove all these APIs. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-06-14net: rtl8169: add depends on PCIEugen Hristev
The rtl8169 driver uses calls to dm_pci_bus_to_phys, which are compiled under CONFIG_PCI. Without CONFIG_PCI, this happens: drivers/net/rtl8169.o: in function `rtl_recv_common': drivers/net/rtl8169.c:555: undefined reference to `dm_pci_bus_to_phys' It is only natural that this driver depends on CONFIG_PCI then. The device does not work connected in another way anyway, and the driver does not assume anything else at this moment. Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-06-14net: ldpaa_eth: export DPNI and DPMAC counters through 'net stats'Ioana Ciornei
Export the already existing DPNI and DPMAC counters through the newly added callbacks. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-06-14net: ldpaa_eth: extend debug capabilities with DPMAC statisticsIoana Ciornei
The ldpaa_eth driver already had a DPMAC statistics dump, this patch extends the list of stats and adds a bit more structure to the code. For a bit more context, the DPAA2 u-boot software architecture uses a default network interface object - a DPNI - which, at runtime, will get connected to the currently used DPMAC object. Each time the .stop() eth callback is called, the DPMAC is destroyed thus any previous counters will get lost. As a preparation for the next patches, we add a software kept set of DPMAC counters which will get updated before each destroy operation takes place. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-06-14net: ldpaa_eth: extend debug capabilities with DPNI statisticsIoana Ciornei
The ldpaa_eth driver already had a DPNI statistics dump, this patch extends the list of stats and adds a bit more structure to the code. For a bit more context, the DPAA2 u-boot software architecture uses a default network interface object - a DPNI - which, at runtime, will get connected to the currently used DPMAC object. Each time the .stop() eth callback is called, the DPNI is reset to its original state, including its counters. As a preparation for the next patches, we add a software kept set of DPNI counters which will get updated before each reset operation takes place. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-06-14net: ldpaa_eth: transform dpni_statistics from a struct to a unionIoana Ciornei
In order to simplify code, dpni_statistics can be written as a union. Using the raw accessors we can just loop through all the statistics from a page without trying to access each an every one independently. Make this change to a union. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>