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No device tree in U-Boot or linux use the wrong spelling used in code.
Use correct property name as defined in dwc3 bindings.
Fixes: 062790f46131 ("usb: xhci-dwc3: Add USB2 PHY configuration")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Marek Vasut <marex@denx.de>
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ring_idx was not correctly assigned in case of tflow_id is zero.
Which leads to wrong pairing of DMA for drivers like OSPI.
Fixes: 4312a1dfca26 ("dma: ti: k3-udma: Use ring_idx to pair k3 nav rings")
Reviewed-by: Jai Luthra <j-luthra@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
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In udma_probe() the return value of setup_resources() is stored in the
u32 "ch_count" member of "struct udma_dev", due to which any negative
return value which indicates an error is masked.
Fix this by storing the return value of setup_resources() in the already
declared integer variable "ret", followed by assigning it to the "ch_count"
member of "struct udma_dev" in case of no error.
While at it, change the "return ret" at the end of udma_probe() to a
"return 0", to explicitly indicate that probe was successful.
Fixes: a8837cf43839 ("dma: ti: k3-udma: Query DMA channels allocated from Resource Manager")
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
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Add support for DMA in J784S4 SoC.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # AM69-SK
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Add clk and device data which can be used by respective drivers
to configure clocks and PSC.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # AM69-SK
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Add support for J784S4 SoC Identification.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # AM69-SK
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Add J784S4 initialization files for initial SPL boot.
config SYS_K3_MCU_SCRATCHPAD_BASE default value is same
for J721E, J721S2, J784S4. So combined them into a single
default.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
[ add firewall configurations and change the R5 MCU scratchpad ]
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # AM69-SK
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During address translation #address/size-cells props are expected to
apply to child nodes. However, devfdt_get_addr_index() incorrectly use
the parent offset of the udevice parent instead of getting the offset of
the node parent. This will work in most cases when there is only one
udevice tied to a node.
On e.g. an Orange Pi R1 Plus TLS board the dwc3-generic (parent) and
dwc3-generic-host (child) udevice is tied to the same node.
In that case both the offset and parent values end up being the same.
As a result, the #address/size-cells props intended for child nodes
incorrectly gets applied to the node itself resulting in wrong addr
being returned, 0x0 instead of 0xff600000.
The following can be seen on console:
dwc3-generic-host usb@ff600000: this is not a DesignWare USB3 DRD Core
dwc3-generic-host usb@ff600000: failed to initialize core
Fix this by using the offset of the parent node and not the offset to
the node the parent udevice is tied to.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
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Pinconfig nodes normally bind recursively with PINCTRL_FULL and
PINCONF_RECURSIVE enabled. However, during U-Boot proper pre-relocation
any node marked with e.g. bootph-all will not bind unless its parent is
also marked for pre-reloc.
group1 {
pinconf1 {
bootph-all;
};
};
This cause the following warning message to be shown during U-Boot
proper pre-reloc stage on Rockchip devices, e.g on RK3568:
ns16550_serial serial@fe660000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
and on RK3328:
ns16550_serial serial@ff130000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
Check pinconfig nodes pre-reloc status recursively to fix this and to
make pinconfig_post_bind work same at both U-Boot proper pre-reloc and
at TPL/SPL stage.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
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Because of commit bf947d2a4b15 ("imx6ul: synchronise device tree with
linux"), the compatible property of lcdif in imx6ul.dtsi went from
compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif";
to
compatible = "fsl,imx6ul-lcdif", "fsl,imx6sx-lcdif";
without updating the mxsfb driver to match that change.
Add "fsl,imx6sx-lcdif" as a compatible id to fix that.
Fixes: bf947d2a4b15 ("imx6ul: synchronise device tree with linux")
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
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These SoCs have two SPI controllers that are quite similar to the SPI
on previous Allwinner SoCs. The main difference is that new SoCs
don't have a clock divider (SPI_CCR register) inside SPI IP.
Instead SPI sample mode should be configured depending on the input clock.
For now SPI input clock source selection is not supported by this driver,
and only HOSC@24MHz can be used as input clock. Therefore, according to
the, manual we could change the SPI sample mode from delay half
cycle(default) to normal.
This patch adds a quirk for this kind of SPI controllers
Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
Tested-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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Marek Vasut <marek.vasut+renesas@mailbox.org> says:
Rename R-Mobile to Renesas all over the place because the chips are
made by Renesas, while only a subset of them is from the R-Mobile line.
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Rename rmobile_is_gen3_mmc0() to rcar_is_gen3_mmc0() because
this particular function is specific to Renesas R-Car Gen3.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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Rename ARCH_RMOBILE to ARCH_RENESAS because all the chips are made
by Renesas, while only a subset of them is from the R-Mobile
line.
Use the following command to perform the rename:
"
$ git grep -l 'ARCH_RMOBILE' | xargs -I {} sed -i 's@ARCH_RMOBILE@ARCH_RENESAS@g' {}
"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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Rename rmobile.h to renesas.h because all the chips are made
by Renesas, while only a subset of them is from the R-Mobile
line.
Use the following command to perform the rename:
"
$ git grep -l 'include.*rmobile.h' | \
xargs -I {} sed -i '/include.*rmobile.h/ s@rmobile.h@renesas.h@g' {}
"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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Rename RMOBILE_CPU_TYPE_* to RENESAS_CPU_TYPE_* because all
the chips are made by Renesas, while only a subset of them is
from the R-Mobile line.
Use the following command to perform the rename:
"
$ git grep -l '\<RMOBILE_CPU_TYPE_[A-Z0-9]\+\>' | \
xargs -I {} sed -i 's@\<RMOBILE\(_CPU_TYPE_[A-Z0-9]\+\)\>@RENESAS\1@g' {}
"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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Rename rmobile_get_cpu_rev_*() to renesas_get_cpu_rev_*() because
all the chips are made by Renesas, while only a subset of them is
from the R-Mobile line.
Use the following command to perform the rename:
"
$ git grep -l '\<rmobile_get_cpu_rev_\(integer\|fraction\)\>' | \
xargs -I {} sed -i 's@\<rmobile_get_cpu_rev_\(integer\|fraction\)\>@renesas_get_cpu_rev_\1@g' {}
"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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Rename rmobile_get_cpu_type() to renesas_get_cpu_type() because
all the chips are made by Renesas, while only a subset of them
is from the R-Mobile line.
Use the following command to perform the rename:
"
$ git grep -l '\<rmobile_get_cpu_type\>' | \
xargs -I {} sed -i 's@\<rmobile_get_cpu_type\>@renesas_get_cpu_type@g' {}
"
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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FDT functions is not working when OF_LIVE is enabled.
Convert fdt parsing functions to ofnode parsing functions
Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
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Usage of common.h is deprecated.
* Remove common.h from RNG drivers.
* Sort includes.
* Add time.h to sandbox driver.
* Add linux/types.h to rng.h to provide size_t.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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The actual driver does not work when there is no linked PHY. These
changes add support for fixed-link feature in the device tree.
Signed-off-by: BELOUARGA Mohamed <m.belouarga@technologyandstrategy.com>
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This patch add XGMII support for connecting 2.5G PHY.
Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
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User can assign a specific MDC speed to the eth node as follow:
ð {
...
phy-mode = "usxgmii";
phy-handle = <&phy8>;
mdio {
clock-frequency = <10500000>;
};
phy8: eth-phy@8 {
compatible = "ethernet-phy-id31c3.1c12";
...
};
Signed-off-by: Bo-Cun Chen <bc-bocun.chen@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
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Add THRU0-3 and SIOPBI/SIOPBO pin groups/functions.
Signed-off-by: Ivan Mikhaylov <fr0st61te@gmail.com>
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- Reworks Qualcomm support to be more generic, dropping board specific
build targets and relying on DT as the only source of truth
- Switches all Qualcomm devices to use upstream devicetree
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When U-Boot as running as the first stage bootloader on MSM8916 devices,
early debug UART requires turning on the clocks (for some reason the
pre-loader turns them off?!).
To simplify developing for this platform, allow the
apq8016_clk_init_uart() function to be called externally. Developers can
call this from the serial_msm debug uart driver to configure the clocks
before the driver model is available.
As it is only possible to enable early debug UART in custom builds of
U-Boot, this solution at least gives developers the option.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Don't use hardcoded clock IDs, use the IDs from the dt-bindings to be
compatible with upstream.
Taken from kernel tag v6.7
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Use the root compatible strings from upstream Linux, add missing
'#clock-cells' property to the gcc node.
Adjust some of the msm8916/apq8016 drivers to use the correct upstream
compatible properties and DT bindings.
This prepares us to switch to upstream DT in a future patch.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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On the DB410c we support running as a first stage bootloader. This
requires initialising the GPIOs which are muxed to UART before they can
be used. Add DM_FLAG_PRE_RELOC to the apq8016 pinctrl driver to ensure
that we do this early enough.
This is required to prevent the first few lines of UART log from being
dropped.
Reported-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Upstream devicetrees label GPIOs with "gpioX", not "GPIO_X", fix this
for SoCs where we're now using upstream DT.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Most platforms have a handful of "special" GPIOs, like the MMC
clock/data lanes, UFS reset, etc. These don't follow the usual naming
scheme of "gpioX" and also have unique capabilities and registers. We
can get away without supporting them all for now, but DT compatibility
is still an issue.
Add support for allowing these to be specified after the other pins, and
make all pinmux/pinconf calls for them nop.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Introduce a basic pinctrl driver for the SPMI PMIC GPIOs. This is
necessary to make proper use of upstream DT bindings specifically on the
dragonboard410c where they're used to switch between USB host and device
modes.
Only support for driving the pins as output low or high is enabled for
now.
To minimise duplicated code and allow for sharing common DT data, the
pinctrl driver is initialised as a child of the existing GPIO driver.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Some platforms hard reset when attempting to configure PMIC GPIOs. Add
support for quirks specified in match data with a single quirk to skip
this configuration. We rely on the GPIO already be configured correctly,
which is always the case for volume up (the only current user of these
GPIOs).
This is not expected behaviour but appears to be due to a U-Boot
specific bug. This quirk at least allows for the volume buttons to be
used on platforms where this bug is apparent.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Qualcomm PMICs number their GPIOs starting from 1, implement a custom
.xlate method to handle this.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Use the modern helpers to fetch the clock and use the correct property
("clocks" instead of "clock"). Drop the call to pinctrl_select_state()
as no boards have a "uart" pinctrl state and this prints confusing
errors.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Introduce support for early debugging. This relies on the previous stage
bootloader to initialise the UART clocks, when running with U-Boot as
the primary bootloader this feature doesn't work. It will require a way
to configure the clocks before the driver model is available.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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We should be returning the rate that we set the clock to, drivers like
MMC rely on this. So fix it.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Adjust the apq8016 and apq8096 drivers to use the upstream compatible
properties, and adjust the associated dts files in U-Boot.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Use the clk_* helper functions and the correct property name for clocks.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org> #qcs404
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Add support for a vbus-supply regulator specified in devicetree. This
provides generic support to avoid hardcoded GPIO configuration in board
init code.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Roger Quadros <rogerq@kernel.org> says:
MUX driver should autoprobe if the device tree has "idle-states"
property. Drop using the custom "u-boot,mux-autoprobe" property
in TI device trees.
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Some platforms need the MUX state to be auto initialized at
boot time even if there are no explicit users for the MUX.
In these cases, the MUX device tree has "idle-states" property
which specifies what state the MUX should be initialized to.
So far we were relying on custom u-boot property "u-boot,mux-autoprobe"
to autoprobe such MUXes. This patch causes the MUX to autoprobe
if it has "idle-states" property in device tree.
This should allow us to stop using the custom "u-boot,mux-autoprobe"
property.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
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If SYSRESET support is enabled for the RAA215300 PMIC, we need to bind
the raa215300_sysreset driver as a child device of the PMIC.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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This patch adds support for resetting a board via the RAA215300 PMIC.
Note that the RAA215300 documentation names the available reset types
differently to u-boot:
* A "warm" reset via the RAA215300 PMIC will fully reset the SoC
(CPU & GPIOs), so this corresponds to SYSRESET_COLD.
* A "cold" reset via the RAA215300 PMIC will cycle all power supply
rails, so this corresponds to SYSRESET_POWER.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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The RZ/G2L SMARC module is powered via a Renesas RAA215300 PMIC which
provides several voltage converters, a real time clock (RTC) and reset
control. A basic driver is implemented for this device so that we can
read, write and dump the PMIC registers.
The raa215300_bind() function is added as a stub, binding of the
sysreset driver will be added in a later patch.
Additional features of this PMIC (such as reset control) may be
supported by future patches.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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This driver supports the I2C module on the Renesas RZ/G2L (R9A07G044)
SoC, also known as the RIIC module.
This patch is based on both the u-boot driver in the Renesas RZ BSP
3.0.5 release [1] (commit 7fcc1fdc2534), and the Linux v6.7 driver
(commit 0dd3ee311255).
Support for deblocking the I2C bus is included as this may be needed
after triggering a reset via the Power Management IC (PMIC) over I2C
(the PMIC asserts the reset line before the SoC completes the I2C write
transaction with obvious bus locking effects). If the SDA line is
observed to be low during initialisation, we automatically attempt to
deblock.
[1]: https://github.com/renesas-rz/renesas-u-boot-cip
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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When enabling/disabling a clock or reset signal, confirm that the change
has completed before returning from the function. A somewhat arbitrary
100ms timeout is defined to ensure that the system doesn't lock up in
the case of an error.
Since we need to dynamically determine if we're waiting for a 0 bit or a
1 bit, it's easier to use wait_for_bit_32() than readl_poll_timeout().
This change is needed for reliable initialization of the I2C driver
which is added in a following patch.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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https://gitlab.denx.de/u-boot/custodians/u-boot-snapdragon
- Two fixes for the qcom-pmic button driver
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