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2022-03-07watchdog: bcm6345: allow to use this driver on arm bcm6753Philippe Reynes
This IP is also used on some arm SoC, so we allow to use it on arm bcm6753 too. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07nand: brcmnand: add bcm6753 supportPhilippe Reynes
This adds the nand support for chipset bcm6753. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07gpio: bcm6345: allow to use this driver on arm bcm6753Philippe Reynes
This IP is also used on some arm SoC, so we allow to use it on arm bcm6753 too. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2022-03-07power: zynqmp: Use zynqmp_pmufw_node() from firmwareMichal Simek
Remove private xpm_configobject[] and use zynqmp_pmufw_node() which provides the same functionality. Also add debug messages for easier debugging. Fixes: e0283cbdfd49 ("power: zynqmp: Add power domain driver for ZynqMP") Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Link: https://lore.kernel.org/r/bddf11459b9b9e849fac9a50db2f1a5fdfae4119.1646122254.git.michal.simek@xilinx.com
2022-03-07gpio: slg7xl45106: Add support for slg7xl45106 i2c gpo expanderT Karthik Reddy
slg7xl45106 is i2c based 8-bit gpo expander, gpo pins are set and get by writing and reading corresponding gpo bit value into its data register. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/839f475cc75c97ffb3496a4caa93de2faabdbca2.1645629688.git.michal.simek@xilinx.com
2022-03-07mmc: zynq_sdhci: Enable card detect workaround for ZynqMPAshok Reddy Soma
Card detect state stable issue is observed on few ZynqMP boards(SOM), so enable the workaround 'commit b6f44082d5cd ("mmc: zynq_sdhci: Wait till sd card detect state is stable")' for ZynqMP platforms also. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/0bf6154c79f24227d786efc5e2c1f506185b2bce.1645625609.git.michal.simek@xilinx.com
2022-03-07mmc: zynq_sdhci: Change granularity of timeout to 1usAshok Reddy Soma
The timeout used in 'commit b6f44082d5cd ("mmc: zynq_sdhci: Wait till sd card detect state is stable")' workaround is 1000ms at a granularity of 1msec. Change it to 1usec, to not waste time incase the cd is stable. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/f008d2bcf864702a01564789f14f9cdecb8acd45.1645625609.git.michal.simek@xilinx.com
2022-03-07mmc: zynq_sdhci: Fix timeout issueAshok Reddy Soma
In the workaround added with 'commit b6f44082d5cd ("mmc: zynq_sdhci: Wait till sd card detect state is stable")' the timeout variable has post decrement. Whenever timeout happens, this post decrement is making timeout=0xffffffff, so timeout error print and return statement are never reached. Fix it by decrementing it inside the while loop. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/61fc1160ada0dd622cd29e381a74af7bf3d9a200.1645625609.git.michal.simek@xilinx.com
2022-03-07mtd: nand: Update driver to match new DT bindingMichal Simek
New binding changed node name from flash@e1000000 to nand-controller@0,0 which should be reflected in the driver. Both names are supported for backward compatibility. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/61f6edd965e0c0b179184823d5283c6c61a1eb35.1645625433.git.michal.simek@xilinx.com
2022-03-04arm64: a37xx: pinctrl: Fix PWM pins indexesMarek Behún
Commit 5534fb4f4833 ("arm64: a37xx: pinctrl: Correct PWM pins definitions") introduced bogus definitions os PWM pins: all 4 pins have index 11, instead of having indexes 11, 12, 13, 14. Fix this. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04drivers: rtc: fix null pointer access in armada38x_rtc_resetFrancois Berder
Replace null pointer by pointer to device registers when calling armada38x_rtc_write. Signed-off-by: Francois Berder <fberder@outlook.fr> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04pci: pci_mvebu: Cleanup macro namesPali Rohár
Use "MVPCIE_" prefix instead of generic "PCIE_" prefix for pci_mvebu.c specific macros. Define offset macros for Root Port registers and use standard register macros from pci.h when accessing Root Port registers. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04pci: pci_mvebu: Remove unused SELECT and lane_maskPali Rohár
Macro SELECT() is unused and struct mvebu_pcie field lane_mask is unused too. Remove them. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-03Convert CONFIG_CHIP_SELECTS_PER_CTRL to KconfigTom Rini
This converts the following to Kconfig: CONFIG_CHIP_SELECTS_PER_CTRL Cc: Alison Wang <alison.wang@nxp.com> Cc: Pramod Kumar <pramod.kumar_1@nxp.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com> Cc: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-03Convert CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS to KconfigTom Rini
This converts the following to Kconfig: CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-03powerpc: Remove unused MPC8540/60ADS codeTom Rini
Remove some code, primarily CPM2 related, that is now unused since the removal of MPC8540/60ADS. Fixes 3913191c8a6b ("powerpc: mpc8540ads: mpc8560ads: Drop support for MPC8540/60ADS") Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-03Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini
Update and fixes for sl28, lx2, pblimage generation for some powerpc products
2022-03-02clk: scmi: register scmi clocks with CCFEtienne Carriere
Implements SCMI APIs to retrieve the number exposed SCMI clocks using SCMI_PROTOCOL_ATTRIBUTES messages and the names of the clocks using SCMI_CLOCK_ATTRIBUTES messages. This change updates sandbox SCMI clock test driver to manage these 2 new message IDs. Cc: Lukasz Majewski <lukma@denx.de> Cc: Sean Anderson <seanga2@gmail.com> Cc: Clement Leger <clement.leger@bootlin.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-03-02firmware: scmi: fix sandbox and related tests for clock discoveryEtienne Carriere
Updates sandbox SCMI clock driver and tests since enabling CCF will mandate clock discovery that is all exposed SCMI clocks shall be discovered at initialization. For this reason, sandbox SCMI clock driver must emulate all clocks exposed by SCMI server, not only those effectively consumed by some other U-Boot devices. Therefore the sandbox SCMI test driver exposes 3 clocks (IDs 0, 1 and 2) and sandbox SCMI clock consumer driver gets 2 of them. Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-03-02scmi: change parameter dev in devm_scmi_process_msgEtienne Carriere
Changes devm_scmi_process_msg() first argument from target parent device to current SCMI device and lookup the SCMI agent device among SCMI device parents for find the SCMI agent operator needed for communication with the firmware. This change is needed in order to support CCF in clk_scmi driver unless what CCF will fail to find the right udevice related to exposed SCMI clocks. This patch allows to simplify the caller sequence, using SCMI device reference as parameter instead of knowing SCMI uclass topology. This change also adds some protection in case devm_scmi_process_msg() API function is called for an invalid device type. Cc: Lukasz Majewski <lukma@denx.de> Cc: Sean Anderson <seanga2@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-03-02sandbox: scmi: test against a single scmi agentEtienne Carriere
As per DT bindings since Linux kernel v5.14, the device tree can define only 1 SCMI agent node that is named scmi [1]. As a consequence, change implementation of the SCMI driver test through sandbox architecture to reflect that. This change updates sandbox test DT and sandbox SCMI driver accordingly since all these are impacted. Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2022-03-01phy: nop-phy: Fix phy reset if no reset-gpio definedTim Harvey
Ensure there is a valid reset-gpio defined before using it. Fixes: f9852acdce02 ("phy: nop-phy: Fix enabling reset") Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-02-28gpio: add sl28cpld driverMichael Walle
The gpio block is part of the sl28cpld sl28cpld management controller. There are three different flavors: the usual input and output where the direction is configurable, but also input only and output only variants. Signed-off-by: Michael Walle <michael@walle.cc> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-28watchdog: add sl28cpld watchdog driverMichael Walle
The watchdog timer is part of the sl28cpld management controller. The watchdog timer usually supervises the bootloader boot-up and if it bites the failsafe bootloader will be activated. Apart from that it supports the usual board level reset and one SMARC speciality: driving the WDT_TIMEOUT# signal. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-28misc: add sl28cpld base driverMichael Walle
Add a multi-function device driver which will probe its children and provides methods to access the device. Signed-off-by: Michael Walle <michael@walle.cc> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-25net: ravb: Add tx/rx delay flag checks and support for rgmii-rxidAdam Ford
Some boards like the Beacon RZ/G2 SOM use either flags for tx-internal-delay-ps, rx-internal-delay-ps or rgmii-rxid. In Linux the APSR_RDM flag is set when either rx-internal-delay-ps is set or the mode is rgmii-rxid, and the APSR_TDM is set when tx-internal-delay-ps is found or rgmii-txid is set, and both are set if rgmii-id is set. The ravb driver in U-Boot driver was missing rgmii-rxid support, so add that support in a similar fashion to what is done in Linux. Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-25clk: ccf: correct the test on the parent uclass in clk_enable/clk_disablePatrick Delaunay
It is safe to check if the uclass id on the device is UCLASS_CLK before to call the clk_ functions, but today this comparison is not done on the device used in API: clkp->dev->parent but on the device himself: clkp->dev. This patch corrects this behavior and tests if the parent device is a clock device before to call the clock API, clk_enable or clk_disable, on this device. Fixes: 0520be0f67e3 ("clk: prograte clk enable/disable to parent") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Sean Anderson <seanga2@gmail.com>
2022-02-25clk: Add clk_get_by_name_optionalSean Anderson
This adds a helper function for clk_get_by_name in cases where the clock is optional. Hopefully this helps point driver writers in the right direction. Also convert some existing users. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/20220115205247.566210-2-seanga2@gmail.com
2022-02-24clk: Inline clk_get_*_optionalSean Anderson
The optional varients of clk_get_* functions are just simple wrappers. Reduce code size a bit by inlining them. On platforms where it is not used (most of them), it will not be compiled in any more. On platforms where they are used, the inlined branch should not cause any significant growth. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/20211222171114.3091780-3-seanga2@gmail.com
2022-02-24clk: Rename clk_get_optional_nodevSean Anderson
This normalizes the name of this accessor function to put "_optional" last. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/20211222171114.3091780-2-seanga2@gmail.com
2022-02-24clk: cdce9xx: Convert .of_xlate to .requestSean Anderson
This xlate function just performs some checking. We can do this in request() instead and use the default xlate. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Tero Kristo <kristo@kernel.org> Link: https://lore.kernel.org/r/20211215164718.2778664-1-seanga2@gmail.com
2022-02-24clk: versaclock: Remove xlate functionSean Anderson
This function is the same as the default xlate. Remove it. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Adam Ford <aford173@gmail.com> Link: https://lore.kernel.org/r/20211201201317.2174547-1-seanga2@gmail.com
2022-02-24clk: Remove no-op request and rfree callbacksSean Anderson
These callbacks are optional. Remove ones which do nothing. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/20211201195100.2173465-1-seanga2@gmail.com
2022-02-24clk: Rename ICS8N3QV01 to CLK_ICS8N3QV01Sean Anderson
This driver was missing a clock prefix. Add one. Signed-off-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20211215163620.2770126-4-seanga2@gmail.com
2022-02-24clk: Alphabetize KconfigSean Anderson
This alphabetizes the Kconfig for the clock subsystem. This will help people find their clocks, and help prevent merge conflicts. Signed-off-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20211215163620.2770126-3-seanga2@gmail.com
2022-02-24clk: Alphabetize MakefileSean Anderson
This alphabetizes the clock makefile by Kconfig option. This will help prevent merge conflicts. Signed-off-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20211215163620.2770126-2-seanga2@gmail.com
2022-02-24driver: spi: add bcm iproc qspi supportRayagonda Kokatanur
IPROC qspi driver supports both BSPI and MSPI modes. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com> Acked-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Roman Bacik <roman.bacik@broadcom.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-02-24spi: dw: Fix broken dw_spi_mem_ops()Niklas Cassel
The driver is currently using sizeof(op->cmd.opcode) in the op_len calculation. Commit d15de623013c ("spi: spi-mem: allow specifying a command's extension") changed op->cmd.opcode from one byte to two. Instead, a new struct member op->cmd.nbytes is supposed to be used. For regular commands op->cmd.nbytes will be one. Commit d15de623013c ("spi: spi-mem: allow specifying a command's extension") did update some drivers that overload the generic mem_ops() implementation, but forgot to update dw_spi_mem_ops(). Calculating op_len incorrectly causes dw_spi_mem_ops() to misbehave, since op_len is used to determine how many bytes that should be read/written. On the canaan k210 board, this causes the probe of the SPI flash to fail. Fix the op_len calculation in dw_spi_mem_ops(). Doing so results in working SPI flash on the canaan k210 board. Fixes: d15de623013c ("spi: spi-mem: allow specifying a command's extension") Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Tested-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-02-24spi: cadence-qspi: Make reset control optionalChristian Gmeiner
In the TI am65 device tree files there is no reset defined. Also the Linux kernel driver uses devm_reset_control_get_optional_exclusive(..) to get the reset. Lets do the same as the kernel does and make thr reset optinal. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-02-23Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usbTom Rini
- OMAP EHCI updates
2022-02-23usb: ehci-omap: Remove OMAP_EHCI_PHYx_RESET_GPIO from KconfigAdam Ford
With the omap-ehci driver now using the phy subsystem to enable and disable reset, the driver no longer needs to know which GPIO's are used, and they can be removed from Kconfig. Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-23usb: ehci-omap: Use PHY system to manage phy resetsAdam Ford
There are a few boards that use hard-coded GPIO definitions in their respective defconfig files. If the GPIO's are listed in their device trees, the nop-phy can toggle the GPIO's, so the EHCI driver does not need to know anything about the GPIO's. Add functions for getting the phys and remove the GPIO toggles since the phy will now do that. Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-23usb: ehci-omap: Make Kconfig select PHY if USB_EHCI_OMAPAdam Ford
The USB_EHCI_OMAP driver currently has a series of Kconfig options which let users specify a GPIO for the reset pin. Some devices may have only one reset, while others might have more. Since there is a nop phy driver, let's selct enable the PHY system, and imply the nop phy driver. The nop phy driver can now toggle the reset pins when putting the phy in and out of reset. If the gpio is listed under the phy, it will get toggled and the hard-coded config options specifying the GPIO numbers can eventually go away. Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-23phy: nop-phy: Fix enabling resetAdam Ford
The reset function should place the phy into reset, while the init function should take the phy out of reset. Currently the reset function takes it out of reset, and the init calls the reset. Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-23usb: ehci-omap: Move omap_ehci_hcd_init to omap_ehci_probeAdam Ford
The OMAP3 hierarchy has the ehci node as a sub-node of the usbhshost. The usbhshost node contains an ohci and an ehci subnode. The configuration of the ehci belongs in the EHCI node and not its parent. Move it to the proper probe. usb start starting USB... Bus ehci@48064800: USB EHCI 1.00 Bus usb_otg_hs@480ab000: Port not available. scanning bus ehci@48064800 for devices... 3 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-23usb: ehci-omap: Drop dead codeAdam Ford
omap_ehci_hcd_stop appears to be dead code, and omap_ehci_hcd_init is only called by the probe function, so it can be static to that function. Remove both from the header along with some additional checking for DM_USB. Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-22phy: phy-uclass: check the parents for physAngus Ainslie
The port/hub leaf nodes don't contain the phy definitions in some dts files so check the parents. Signed-off-by: Angus Ainslie <angus@akkea.ca> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-02-21Merge branch '2022-02-21-platform-updates'Tom Rini
- Assorted updates / fixes for Apple, TI and Aspeed platforms
2022-02-21ti: i2c: fix probe_chip() return valueNikita Yushchenko
Per documentation, dm_i2c_ops.probe_chip() shall return -EREMOTEIO if probe fails. Currently, omap_i2c_probe_chip() returns 1 instead. Fix that. Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2022-02-21crypto: aspeed: fix polling RSA status wrong issueNeal Liu
Check interrupt status to see if RSA engine is completed. After completion of the task, write-clear the status to finish operation. Add missing register base for completion. Fixes: 89c36cca0b6 ("crypto: aspeed: Add AST2600 ACRY support") Signed-off-by: Neal Liu <neal_liu@aspeedtech.com> Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
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