From 92ca0f7446c5948f364bfb3377f9e08fad7ff857 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 29 Apr 2020 15:08:38 +0200 Subject: ARM: dts: stm32: Synchronize DDR setttings on DH SoMs Add custom DDR DRAM settings for the DHCOR and DHCOM SoMs and put them into use by the board file instead of the default ones. These new DRAM settings are a better fit for the SoMs. Signed-off-by: Marek Vasut Cc: Patrick Delaunay Cc: Patrice Chotard Reviewed-by: Patrick Delaunay --- arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi') diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi index c827e52b588..ef730a83220 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi @@ -9,8 +9,9 @@ #include #include "stm32mp15-u-boot.dtsi" -#include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi" -#include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi" +#include "stm32mp15-ddr3-dhsom-2x1Gb-1066-binG.dtsi" +#include "stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi" +#include "stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi" / { u-boot,dm-pre-reloc; -- cgit v1.2.3