From 386fca68960994ece0d9da8a69a14495b5f1aedf Mon Sep 17 00:00:00 2001 From: Jit Loon Lim Date: Tue, 12 Mar 2024 22:01:03 +0800 Subject: arch: arm: Agilex5 enablement This patch is to enable Agilex5 platform for Intel product. Changes, modification and new files are created for board, dts, configs and makefile to create the base for Agilex5. Signed-off-by: Jit Loon Lim Reviewed-by: Tien Fong Chee --- arch/arm/mach-socfpga/include/mach/clock_manager_agilex5.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_agilex5.h (limited to 'arch/arm/mach-socfpga/include/mach/clock_manager_agilex5.h') diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_agilex5.h b/arch/arm/mach-socfpga/include/mach/clock_manager_agilex5.h new file mode 100644 index 00000000000..1ae0a926032 --- /dev/null +++ b/arch/arm/mach-socfpga/include/mach/clock_manager_agilex5.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2024 Intel Corporation + */ + +#ifndef _CLOCK_MANAGER_AGILEX5_ +#define _CLOCK_MANAGER_AGILEX5_ + +#include +#include "../../../../../drivers/clk/altera/clk-agilex5.h" + +#endif /* _CLOCK_MANAGER_AGILEX5_ */ -- cgit v1.2.3