From 3b4ee40f20eb7bb687a4429546fd3cd3073b90d2 Mon Sep 17 00:00:00 2001 From: Tien Fong Chee Date: Sun, 7 Nov 2021 23:08:55 +0800 Subject: arm: socfpga: arria10: Reset MPFE NoC after program periph / combined RBF This patch triggers warm reset to recover the MPFE NoC from corruption due to high frequency transient clock output from HPS EMIF IOPLL at VCO startup after peripheral RBF is programmed. Signed-off-by: Tien Fong Chee Signed-off-by: Sin Hui Kho Reviewed-by: Tien Fong Chee --- arch/arm/mach-socfpga/include/mach/misc.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-socfpga/include/mach/misc.h') diff --git a/arch/arm/mach-socfpga/include/mach/misc.h b/arch/arm/mach-socfpga/include/mach/misc.h index 649d2f6ce24..74e8e2590fb 100644 --- a/arch/arm/mach-socfpga/include/mach/misc.h +++ b/arch/arm/mach-socfpga/include/mach/misc.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2016-2017 Intel Corporation + * Copyright (C) 2016-2021 Intel Corporation */ #ifndef _SOCFPGA_MISC_H_ @@ -45,7 +45,10 @@ int is_fpga_config_ready(void); #endif void do_bridge_reset(int enable, unsigned int mask); +bool is_regular_boot_valid(void); +void set_regular_boot(unsigned int status); void socfpga_pl310_clear(void); void socfpga_get_managers_addr(void); +int qspi_flash_software_reset(void); #endif /* _SOCFPGA_MISC_H_ */ -- cgit v1.2.3