From bb25aca1343304e0334e9eebfb9d350eaf276882 Mon Sep 17 00:00:00 2001 From: Ley Foon Tan Date: Fri, 8 Nov 2019 10:38:19 +0800 Subject: arm: socfpga: Convert reset manager from struct to defines Convert reset manager for Gen5, Arria 10 and Stratix 10 from struct to defines. Change to get reset manager base address from DT node instead of using #define. spl_early_init() initializes the DT setup. So, move spl_early_init() to beginning of function and before get base address from DT. Signed-off-by: Ley Foon Tan Reviewed-by: Simon Goldschmidt --- arch/arm/mach-socfpga/misc.c | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) (limited to 'arch/arm/mach-socfpga/misc.c') diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index 904b3d030ac..3f3ff8e23b8 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -23,6 +23,8 @@ DECLARE_GLOBAL_DATA_PTR; +phys_addr_t socfpga_rstmgr_base __section(".data"); + #ifdef CONFIG_SYS_L2_PL310 static const struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE; @@ -146,6 +148,8 @@ void socfpga_fpga_add(void *fpga_desc) int arch_cpu_init(void) { + socfpga_get_managers_addr(); + #ifdef CONFIG_HW_WATCHDOG /* * In case the watchdog is enabled, make sure to (re-)configure it @@ -203,3 +207,40 @@ U_BOOT_CMD(bridge, 3, 1, do_bridge, ); #endif + +static int socfpga_get_base_addr(const char *compat, phys_addr_t *base) +{ + const void *blob = gd->fdt_blob; + struct fdt_resource r; + int node; + int ret; + + node = fdt_node_offset_by_compatible(blob, -1, compat); + if (node < 0) + return node; + + if (!fdtdec_get_is_enabled(blob, node)) + return -ENODEV; + + ret = fdt_get_resource(blob, node, "reg", 0, &r); + if (ret) + return ret; + + *base = (phys_addr_t)r.start; + + return 0; +} + +void socfpga_get_managers_addr(void) +{ + int ret; + + ret = socfpga_get_base_addr("altr,rst-mgr", &socfpga_rstmgr_base); + if (ret) + hang(); +} + +phys_addr_t socfpga_get_rstmgr_addr(void) +{ + return socfpga_rstmgr_base; +} -- cgit v1.2.3 From db5741f7a85ec3ee79b64496172afaa7dc2cb225 Mon Sep 17 00:00:00 2001 From: Ley Foon Tan Date: Fri, 8 Nov 2019 10:38:20 +0800 Subject: arm: socfpga: Convert system manager from struct to defines Convert system manager for Gen5, Arria 10 and Stratix 10 from struct to defines. Change to get system manager base address from DT node instead of using #define. Signed-off-by: Ley Foon Tan Reviewed-by: Simon Goldschmidt --- arch/arm/mach-socfpga/misc.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm/mach-socfpga/misc.c') diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index 3f3ff8e23b8..1ef02a13bfb 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -24,6 +24,7 @@ DECLARE_GLOBAL_DATA_PTR; phys_addr_t socfpga_rstmgr_base __section(".data"); +phys_addr_t socfpga_sysmgr_base __section(".data"); #ifdef CONFIG_SYS_L2_PL310 static const struct pl310_regs *const pl310 = @@ -238,9 +239,18 @@ void socfpga_get_managers_addr(void) ret = socfpga_get_base_addr("altr,rst-mgr", &socfpga_rstmgr_base); if (ret) hang(); + + ret = socfpga_get_base_addr("altr,sys-mgr", &socfpga_sysmgr_base); + if (ret) + hang(); } phys_addr_t socfpga_get_rstmgr_addr(void) { return socfpga_rstmgr_base; } + +phys_addr_t socfpga_get_sysmgr_addr(void) +{ + return socfpga_sysmgr_base; +} -- cgit v1.2.3 From 94172c7961124a4abf1aeedb1705a88a77744103 Mon Sep 17 00:00:00 2001 From: Ley Foon Tan Date: Fri, 8 Nov 2019 10:38:21 +0800 Subject: arm: socfpga: Convert clock manager from struct to defines Convert clock manager for Gen5, Arria 10 and Stratix 10 from struct to defines. Change to get clock manager base address from DT node instead of using #define. Signed-off-by: Ley Foon Tan Reviewed-by: Simon Goldschmidt --- arch/arm/mach-socfpga/misc.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm/mach-socfpga/misc.c') diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index 1ef02a13bfb..b86ff962a8d 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -23,6 +23,7 @@ DECLARE_GLOBAL_DATA_PTR; +phys_addr_t socfpga_clkmgr_base __section(".data"); phys_addr_t socfpga_rstmgr_base __section(".data"); phys_addr_t socfpga_sysmgr_base __section(".data"); @@ -243,6 +244,10 @@ void socfpga_get_managers_addr(void) ret = socfpga_get_base_addr("altr,sys-mgr", &socfpga_sysmgr_base); if (ret) hang(); + + ret = socfpga_get_base_addr("altr,clk-mgr", &socfpga_clkmgr_base); + if (ret) + hang(); } phys_addr_t socfpga_get_rstmgr_addr(void) @@ -254,3 +259,8 @@ phys_addr_t socfpga_get_sysmgr_addr(void) { return socfpga_sysmgr_base; } + +phys_addr_t socfpga_get_clkmgr_addr(void) +{ + return socfpga_clkmgr_base; +} -- cgit v1.2.3 From c168fc71a32861a52a710015ee4a71e8cabe86d5 Mon Sep 17 00:00:00 2001 From: Ley Foon Tan Date: Wed, 27 Nov 2019 15:55:22 +0800 Subject: clk: agilex: Add clock driver for Agilex Add clock manager driver for Agilex. Provides clock initialization and get_rate functions. agilex-clock.h is from Linux commit ID cd2e1ad12247. Signed-off-by: Chee Hong Ang Signed-off-by: Ley Foon Tan Reviewed-by: Simon Goldschmidt --- arch/arm/mach-socfpga/misc.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/mach-socfpga/misc.c') diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index b86ff962a8d..db71105af34 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -245,7 +245,12 @@ void socfpga_get_managers_addr(void) if (ret) hang(); +#ifdef CONFIG_TARGET_SOCFPGA_AGILEX + ret = socfpga_get_base_addr("intel,agilex-clkmgr", + &socfpga_clkmgr_base); +#else ret = socfpga_get_base_addr("altr,clk-mgr", &socfpga_clkmgr_base); +#endif if (ret) hang(); } -- cgit v1.2.3