From 430b42f76a4e50ffef7cc2b3c195ff645a438433 Mon Sep 17 00:00:00 2001 From: Simon Goldschmidt Date: Mon, 13 May 2019 21:16:43 +0200 Subject: arm: socfpga: remove re-added ad-hoc reset code commit c5de2b7eae68 ("arm: socfpga: implement proper peripheral reset") has removed the call to 'reset_deassert_peripherals_handoff()' from socfpga gen5 SPL since the reset driver now handles resets. However, commit c1d4b464c8b8 ("ARM: socfpga: Disable bridges in SPL unless booting from FPGA") has re-added this ad-hoc reset code, so that all peripherals were now again enabled instead of letting the drivers enable them by request. While at it, remove this function for gen5 as it should not be used. Fixes: commit c1d4b464c8b8 ("ARM: socfpga: Disable bridges in SPL unless booting from FPGA") Signed-off-by: Simon Goldschmidt --- arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h | 1 - arch/arm/mach-socfpga/reset_manager_gen5.c | 8 -------- arch/arm/mach-socfpga/spl_gen5.c | 3 +-- 3 files changed, 1 insertion(+), 11 deletions(-) (limited to 'arch/arm/mach-socfpga') diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h index 5e490d182e3..f4dcb146230 100644 --- a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h @@ -8,7 +8,6 @@ #include -void reset_deassert_peripherals_handoff(void); void socfpga_bridges_set_handoff_regs(bool h2f, bool lwh2f, bool f2h); void socfpga_bridges_reset(int enable); diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c b/arch/arm/mach-socfpga/reset_manager_gen5.c index 89a384b59c8..9a32f5abfee 100644 --- a/arch/arm/mach-socfpga/reset_manager_gen5.c +++ b/arch/arm/mach-socfpga/reset_manager_gen5.c @@ -61,14 +61,6 @@ void socfpga_per_reset_all(void) writel(0xffffffff, &reset_manager_base->per2_mod_reset); } -/* - * Release peripherals from reset based on handoff - */ -void reset_deassert_peripherals_handoff(void) -{ - writel(0, &reset_manager_base->per_mod_reset); -} - #define L3REGS_REMAP_LWHPS2FPGA_MASK 0x10 #define L3REGS_REMAP_HPS2FPGA_MASK 0x08 #define L3REGS_REMAP_OCRAM_MASK 0x01 diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c index bd2a9fe5aed..1a60cdc8972 100644 --- a/arch/arm/mach-socfpga/spl_gen5.c +++ b/arch/arm/mach-socfpga/spl_gen5.c @@ -175,8 +175,7 @@ void board_init_f(ulong dummy) sysmgr_pinmux_init(); sysmgr_config_warmrstcfgio(0); - /* De-assert reset for peripherals and bridges based on handoff */ - reset_deassert_peripherals_handoff(); + /* Set bridges handoff value */ socfpga_bridges_set_handoff_regs(true, true, true); debug("Unfreezing/Thaw all I/O banks\n"); -- cgit v1.2.3 From 48ec73453ae909230585188191d0cace646a2b17 Mon Sep 17 00:00:00 2001 From: Simon Goldschmidt Date: Mon, 13 May 2019 21:16:44 +0200 Subject: arm: sofcpga: s10: remove unused ad-hoc reset code The stratix 10 reset manager ad-hoc code in arch/arm contains an unused function 'reset_deassert_peripherals_handoff' that has been added from the beginning. As this is probably a result of copying the gen5 reset manager and this function has never been used, remove it. Signed-off-by: Simon Goldschmidt --- arch/arm/mach-socfpga/include/mach/reset_manager_s10.h | 1 - arch/arm/mach-socfpga/reset_manager_s10.c | 11 ----------- 2 files changed, 12 deletions(-) (limited to 'arch/arm/mach-socfpga') diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h index b93bbaf5371..452147b0173 100644 --- a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h @@ -8,7 +8,6 @@ #define _RESET_MANAGER_S10_ void reset_cpu(ulong addr); -void reset_deassert_peripherals_handoff(void); int cpu_has_been_warmreset(void); void socfpga_bridges_reset(int enable); diff --git a/arch/arm/mach-socfpga/reset_manager_s10.c b/arch/arm/mach-socfpga/reset_manager_s10.c index 39753a13c4c..499a84aff53 100644 --- a/arch/arm/mach-socfpga/reset_manager_s10.c +++ b/arch/arm/mach-socfpga/reset_manager_s10.c @@ -94,17 +94,6 @@ void socfpga_bridges_reset(int enable) } } -/* - * Release peripherals from reset based on handoff - */ -void reset_deassert_peripherals_handoff(void) -{ - writel(0, &reset_manager_base->per1modrst); - /* Enable OCP first */ - writel(~RSTMGR_PER0MODRST_OCP_MASK, &reset_manager_base->per0modrst); - writel(0, &reset_manager_base->per0modrst); -} - /* * Return non-zero if the CPU has been warm reset */ -- cgit v1.2.3 From 990ed4452cb744402f82362ba2299f29d5a888b4 Mon Sep 17 00:00:00 2001 From: Wolfgang Grandegger Date: Sun, 12 May 2019 19:25:18 +0200 Subject: arm: socfpga: Re-add support for Aries MCV SoM and MCVEV[KP] board Re-add support for Aries Embedded MCV SoM, which is CycloneV based and the associated MCVEVK and MCVEVP baseboard. The board can boot from eMMC. Ethernet and USB is supported. The Aries Embedded boards have been removed with commit 03b54997d568 ("board/aries: Remove"). I will now take care of them. The device-tree files are from mainline Linux commit e93c9c99a629 ("Linux v5.1)". Signed-off-by: Wolfgang Grandegger CC: Marek Vasut CC: Simon Goldschmidt --- arch/arm/mach-socfpga/Kconfig | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm/mach-socfpga') diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index ea316d09d7b..48f02f08d44 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -64,6 +64,10 @@ choice prompt "Altera SOCFPGA board select" optional +config TARGET_SOCFPGA_ARIES_MCVEVK + bool "Aries MCVEVK (Cyclone V)" + select TARGET_SOCFPGA_CYCLONE5 + config TARGET_SOCFPGA_ARRIA10_SOCDK bool "Altera SOCFPGA SoCDK (Arria 10)" select TARGET_SOCFPGA_ARRIA10 @@ -128,6 +132,7 @@ config SYS_BOARD default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC default "de10-nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO default "is1" if TARGET_SOCFPGA_IS1 + default "mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES default "sr1500" if TARGET_SOCFPGA_SR1500 @@ -139,6 +144,7 @@ config SYS_VENDOR default "altera" if TARGET_SOCFPGA_ARRIA10_SOCDK default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK default "altera" if TARGET_SOCFPGA_STRATIX10_SOCDK + default "aries" if TARGET_SOCFPGA_ARIES_MCVEVK default "devboards" if TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1 default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA @@ -159,6 +165,7 @@ config SYS_CONFIG_NAME default "socfpga_de1_soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC default "socfpga_de10_nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO default "socfpga_is1" if TARGET_SOCFPGA_IS1 + default "socfpga_mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500 -- cgit v1.2.3