From 09bfd962bdc97359b916bfbf18a17e2a85396d65 Mon Sep 17 00:00:00 2001 From: Tony O'Brien Date: Fri, 2 Dec 2016 09:22:34 +1300 Subject: mpc85xx: pcie: Implement workaround for Erratum A007815 The read-only-write-enable bit is set by default and must be cleared to prevent overwriting read-only registers. This should be done immediately after resetting the PCI Express controller. Reviewed-by: Hamish Martin Signed-off-by: Tony O'Brien [York S: Move SYS_FSL_ERRATUM_A007815 to Kconfig] Reviewed-by: York Sun --- arch/powerpc/cpu/mpc85xx/cmd_errata.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/powerpc/cpu/mpc85xx/cmd_errata.c') diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index 822ae7251b1..b8be59659ea 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -333,6 +333,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_FSL_ERRATUM_A007907 puts("Work-around for Erratum A007907 enabled\n"); #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A007815 + puts("Work-around for Erratum A007815 enabled\n"); +#endif + return 0; } -- cgit v1.2.3