From 117bfc7fbe1cfe2a7e8a21f996adf9a59f60405d Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Tue, 19 Jan 2016 21:32:30 -0700
Subject: dm: x86: quark: Add an interrupt driver

Add a driver for interrupts on quark and move the code currently in
cpu_irq_init() into its probe() method.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
---
 arch/x86/cpu/quark/quark.c | 25 -------------------------
 1 file changed, 25 deletions(-)

(limited to 'arch/x86/cpu/quark/quark.c')

diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index 28370d17065..6e20930a4d2 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -7,12 +7,10 @@
 #include <common.h>
 #include <mmc.h>
 #include <asm/io.h>
-#include <asm/irq.h>
 #include <asm/mrccache.h>
 #include <asm/mtrr.h>
 #include <asm/pci.h>
 #include <asm/post.h>
-#include <asm/processor.h>
 #include <asm/arch/device.h>
 #include <asm/arch/msg_port.h>
 #include <asm/arch/quark.h>
@@ -346,29 +344,6 @@ int cpu_mmc_init(bd_t *bis)
 	return pci_mmc_init("Quark SDHCI", mmc_supported);
 }
 
-void cpu_irq_init(void)
-{
-	struct quark_rcba *rcba;
-	u32 base;
-
-	qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, LB_RCBA, &base);
-	base &= ~MEM_BAR_EN;
-	rcba = (struct quark_rcba *)base;
-
-	/*
-	 * Route Quark PCI device interrupt pin to PIRQ
-	 *
-	 * Route device#23's INTA/B/C/D to PIRQA/B/C/D
-	 * Route device#20,21's INTA/B/C/D to PIRQE/F/G/H
-	 */
-	writew(PIRQC, &rcba->rmu_ir);
-	writew(PIRQA | (PIRQB << 4) | (PIRQC << 8) | (PIRQD << 12),
-	       &rcba->d23_ir);
-	writew(PIRQD, &rcba->core_ir);
-	writew(PIRQE | (PIRQF << 4) | (PIRQG << 8) | (PIRQH << 12),
-	       &rcba->d20d21_ir);
-}
-
 int arch_misc_init(void)
 {
 #ifdef CONFIG_ENABLE_MRC_CACHE
-- 
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