From 3eafce05278f867678a66efd867f398cc055359a Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 12 Nov 2014 22:42:27 -0700 Subject: x86: ivybridge: Add LAPIC support The local advanced programmable interrupt controller is not used much in U-Boot but we do need to set it up. Add basic support for this, which will be extended as needed. Signed-off-by: Simon Glass --- arch/x86/include/asm/lapic.h | 59 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 arch/x86/include/asm/lapic.h (limited to 'arch/x86/include/asm/lapic.h') diff --git a/arch/x86/include/asm/lapic.h b/arch/x86/include/asm/lapic.h new file mode 100644 index 00000000000..948e643a7ed --- /dev/null +++ b/arch/x86/include/asm/lapic.h @@ -0,0 +1,59 @@ +/* + * From Coreboot file of same name + * + * Copyright (C) 2014 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef _ARCH_ASM_LAPIC_H +#define _ARCH_ASM_LAPIC_H + +#include +#include +#include +#include + +static inline __attribute__((always_inline)) + unsigned long lapic_read(unsigned long reg) +{ + return readl(LAPIC_DEFAULT_BASE + reg); +} + +static inline __attribute__((always_inline)) + void lapic_write(unsigned long reg, unsigned long val) +{ + writel(val, LAPIC_DEFAULT_BASE + reg); +} + +static inline __attribute__((always_inline)) void lapic_wait_icr_idle(void) +{ + do { } while (lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY); +} + +static inline void enable_lapic(void) +{ + msr_t msr; + + msr = msr_read(LAPIC_BASE_MSR); + msr.hi &= 0xffffff00; + msr.lo &= 0x000007ff; + msr.lo |= LAPIC_DEFAULT_BASE | (1 << 11); + msr_write(LAPIC_BASE_MSR, msr); +} + +static inline void disable_lapic(void) +{ + msr_t msr; + + msr = msr_read(LAPIC_BASE_MSR); + msr.lo &= ~(1 << 11); + msr_write(LAPIC_BASE_MSR, msr); +} + +static inline __attribute__((always_inline)) unsigned long lapicid(void) +{ + return lapic_read(LAPIC_ID) >> 24; +} + +#endif -- cgit v1.2.3