From 86ff2cfa80e9abb71789b299cfcbfc0b9337174d Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 19 Nov 2025 00:19:36 +0100 Subject: ARM: dts: stm32: Add 1 GiB DRAM settings for DH STM32MP13xx DHCOR SoM Add DRAM settings for 1 GiB variant of DH STM32MP13xx DHCOR SoM and support for SoM DRAM coding HW straps decoding and automatic DRAM configuration selection. Enable CONFIG_BOARD_EARLY_INIT_F on all STM32MP1 DHSOM, as it is required for the HW straps decoding. Signed-off-by: Marek Vasut Reviewed-by: Patrice Chotard --- board/dhelectronics/dh_stm32mp1/board.c | 30 +++++++++++++++++++++--------- 1 file changed, 21 insertions(+), 9 deletions(-) (limited to 'board/dhelectronics') diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c index c18f1911fe4..55526189d5a 100644 --- a/board/dhelectronics/dh_stm32mp1/board.c +++ b/board/dhelectronics/dh_stm32mp1/board.c @@ -304,17 +304,29 @@ static void board_get_coding_straps(void) int board_stm32mp1_ddr_config_name_match(struct udevice *dev, const char *name) { - if (ddr3code == 1 && - !strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-2x1gb-533mhz")) - return 0; + if (IS_ENABLED(CONFIG_TARGET_DH_STM32MP13X)) { + if (ddr3code == 1 && + !strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-1x2gb-533mhz")) + return 0; + + if (ddr3code == 2 && + !strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-1x4gb-533mhz")) + return 0; + } - if (ddr3code == 2 && - !strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-2x2gb-533mhz")) - return 0; + if (IS_ENABLED(CONFIG_TARGET_DH_STM32MP15X)) { + if (ddr3code == 1 && + !strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-2x1gb-533mhz")) + return 0; - if (ddr3code == 3 && - !strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-2x4gb-533mhz")) - return 0; + if (ddr3code == 2 && + !strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-2x2gb-533mhz")) + return 0; + + if (ddr3code == 3 && + !strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-2x4gb-533mhz")) + return 0; + } return -EINVAL; } -- cgit v1.2.3