From 4d66668300439972abc4990f23fdea771f0830fd Mon Sep 17 00:00:00 2001 From: Shengzhou Liu Date: Fri, 18 Apr 2014 16:43:40 +0800 Subject: board/t208xrdb: Add support of 2-stage NAND/SPI/SD boot Add support of 2-stage NAND/SPI/SD boot loader using SPL framework. PBL initializes the internal CPC-SRAM and copy SPL(160K) to it, SPL further initializes DDR using SPD and environment and copy u-boot(768K) from SPI/SD/NAND to DDR, finally SPL transfers control to u-boot. Signed-off-by: Shengzhou Liu Reviewed-by: York Sun --- board/freescale/t208xrdb/ddr.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'board/freescale/t208xrdb/ddr.c') diff --git a/board/freescale/t208xrdb/ddr.c b/board/freescale/t208xrdb/ddr.c index 01e917398f9..8a262762735 100644 --- a/board/freescale/t208xrdb/ddr.c +++ b/board/freescale/t208xrdb/ddr.c @@ -100,13 +100,15 @@ phys_size_t initdram(int board_type) { phys_size_t dram_size; +#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_RAMBOOT_PBL) puts("Initializing....using SPD\n"); - dram_size = fsl_ddr_sdram(); dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; - - puts(" DDR: "); +#else + /* DDR has been initialised by first stage boot loader */ + dram_size = fsl_ddr_sdram_size(); +#endif return dram_size; } -- cgit v1.2.3