From db4ff0df656f8ca8d363df64cddc7b5f835a7ecc Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Mon, 4 Feb 2019 11:26:18 +0100 Subject: stpmic1: update register names Alignment with STPMIC1 datasheet s/MAIN_CONTROL_REG/MAIN_CR/g s/MASK_RESET_BUCK/BUCKS_MRST_CR/g s/MASK_RESET_LDOS/LDOS_MRST_CR/g s/BUCKX_CTRL_REG/BUCKX_MAIN_CR/g s/VREF_CTRL_REG/REFDDR_MAIN_CR/g s/LDOX_CTRL_REG/LDOX_MAIN_CR/g s/USB_CTRL_REG/BST_SW_CR/g s/STPMIC1_NVM_USER_STATUS_REG/STPMIC1_NVM_SR/g s/STPMIC1_NVM_USER_CONTROL_REG/STPMIC1_NVM_CR/g and update all the associated defines. Signed-off-by: Patrick Delaunay --- board/st/stm32mp1/board.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) (limited to 'board/st/stm32mp1/board.c') diff --git a/board/st/stm32mp1/board.c b/board/st/stm32mp1/board.c index 2a94f101558..5c1acca20d7 100644 --- a/board/st/stm32mp1/board.c +++ b/board/st/stm32mp1/board.c @@ -50,39 +50,39 @@ int board_ddr_power_init(void) return 0; /* VTT = Set LDO3 to sync mode */ - ret = pmic_reg_read(dev, STPMIC1_LDOX_CTRL_REG(STPMIC1_LDO3)); + ret = pmic_reg_read(dev, STPMIC1_LDOX_MAIN_CR(STPMIC1_LDO3)); if (ret < 0) return ret; ret &= ~STPMIC1_LDO3_MODE; - ret &= ~STPMIC1_LDO12356_OUTPUT_MASK; - ret |= STPMIC1_LDO3_DDR_SEL << STPMIC1_LDO12356_OUTPUT_SHIFT; + ret &= ~STPMIC1_LDO12356_VOUT_MASK; + ret |= STPMIC1_LDO_VOUT(STPMIC1_LDO3_DDR_SEL); - ret = pmic_reg_write(dev, STPMIC1_LDOX_CTRL_REG(STPMIC1_LDO3), + ret = pmic_reg_write(dev, STPMIC1_LDOX_MAIN_CR(STPMIC1_LDO3), ret); if (ret < 0) return ret; /* VDD_DDR = Set BUCK2 to 1.35V */ ret = pmic_clrsetbits(dev, - STPMIC1_BUCKX_CTRL_REG(STPMIC1_BUCK2), - STPMIC1_BUCK_OUTPUT_MASK, + STPMIC1_BUCKX_MAIN_CR(STPMIC1_BUCK2), + STPMIC1_BUCK_VOUT_MASK, STPMIC1_BUCK2_1350000V); if (ret < 0) return ret; /* Enable VDD_DDR = BUCK2 */ ret = pmic_clrsetbits(dev, - STPMIC1_BUCKX_CTRL_REG(STPMIC1_BUCK2), - STPMIC1_BUCK_EN, STPMIC1_BUCK_EN); + STPMIC1_BUCKX_MAIN_CR(STPMIC1_BUCK2), + STPMIC1_BUCK_ENA, STPMIC1_BUCK_ENA); if (ret < 0) return ret; mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); /* Enable VREF */ - ret = pmic_clrsetbits(dev, STPMIC1_VREF_CTRL_REG, - STPMIC1_VREF_EN, STPMIC1_VREF_EN); + ret = pmic_clrsetbits(dev, STPMIC1_REFDDR_MAIN_CR, + STPMIC1_VREF_ENA, STPMIC1_VREF_ENA); if (ret < 0) return ret; @@ -90,8 +90,8 @@ int board_ddr_power_init(void) /* Enable LDO3 */ ret = pmic_clrsetbits(dev, - STPMIC1_LDOX_CTRL_REG(STPMIC1_LDO3), - STPMIC1_LDO_EN, STPMIC1_LDO_EN); + STPMIC1_LDOX_MAIN_CR(STPMIC1_LDO3), + STPMIC1_LDO_ENA, STPMIC1_LDO_ENA); if (ret < 0) return ret; -- cgit v1.2.3