From 04ea9147d5bdab1370ced118acf35db7ac9e281c Mon Sep 17 00:00:00 2001 From: Tingting Meng Date: Fri, 21 Feb 2025 21:49:41 +0800 Subject: ddr: altera: Add DDR driver for Agilex5 series Adding DDR driver support for Agilex5 series. Signed-off-by: Tingting Meng --- drivers/ddr/altera/sdram_soc64.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'drivers/ddr/altera/sdram_soc64.h') diff --git a/drivers/ddr/altera/sdram_soc64.h b/drivers/ddr/altera/sdram_soc64.h index 87a70a861ba..183b1a33080 100644 --- a/drivers/ddr/altera/sdram_soc64.h +++ b/drivers/ddr/altera/sdram_soc64.h @@ -1,6 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2017-2019 Intel Corporation + * Copyright (C) 2025 Altera Corporation + * */ #ifndef _SDRAM_SOC64_H_ @@ -13,11 +15,19 @@ struct altera_sdram_priv { struct reset_ctl_bulk resets; }; +#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5) +struct altera_sdram_plat { + fdt_addr_t mpfe_base_addr; + bool dualport; + bool dualemif; +}; +#else struct altera_sdram_plat { void __iomem *hmc; void __iomem *ddr_sch; void __iomem *iomhc; }; +#endif /* ECC HMC registers */ #define DDRIOCTRL 0x8 -- cgit v1.2.3